liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Test Planning for 3D Stacked ICs with Through-Silicon Vias
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
2011 (English)In: 3D-TEST, 2011Conference paper, Published paper (Refereed)
Abstract [en]

Test planning for core-based 3D stacked ICs with trough-silicon vias (3D TSV-SIC) is different from test planning for non-stacked ICs as the same test schedule cannot be applied both at wafer sort and package test. In this paper, we assume a test flow where each chip is tested individually at wafer sort and jointly at package test. We define cost functions and test planning optimization algorithms for non-stacked ICs and 3D TSV-SICs with two chips in the stack. We have implemented our techniques and experiments show significant reduction of test cost.

Place, publisher, year, edition, pages
2011.
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:liu:diva-77287OAI: oai:DiVA.org:liu-77287DiVA: diva2:526213
Conference
2nd IEEE Intl. Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D-TEST), Anaheim, CA, USA, September 22-23, 2011
Available from: 2012-05-10 Created: 2012-05-10 Last updated: 2012-05-21

Open Access in DiVA

No full text

Authority records BETA

SenGupta, BreetaIngelsson, UrbanLarsson, Erik

Search in DiVA

By author/editor
SenGupta, BreetaIngelsson, UrbanLarsson, Erik
By organisation
ESLAB - Embedded Systems LaboratoryThe Institute of Technology
Computer and Information Science

Search outside of DiVA

GoogleGoogle Scholar

urn-nbn

Altmetric score

urn-nbn
Total: 32 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf