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Implementering av en mjuk CPU i FPGA
Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
2012 (Swedish)Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesisAlternative title
Implementation of a soft CPU in FPGA (English)
Abstract [sv]

Målet med examensarbetet är att implementera en mjuk CPU i en FPGA-krets som finns tillgänglig på ett ALTERA DE2 Board. Denna mjuka processor integreras i ett projekt skapat i utvecklingsmiljön Quartus II. Den kommunicera med programmerad logik i FPGA:n och den signalbehandlar en audiosignal (stereo), så att ett eko kan genereras och att volym och balans blir justerbar. Detta styrs av ett tangentbord som kopplas till DE2-kortet och de olika förändringarna på utsignalen visas på en LCD.

Abstract [en]

The ambition with this thesis is to implement a soft CPU i a FPGA-circuit which is available on an ALTERA DE2 Board. This soft processor is integrated in a project designed in the development environment: Quartus II CAD System. It communicates with programmed logic in the FPGA and it alters an audiosignal so that an eco is generated and so that volume and balance can be adjusted. This is controled from a keyboard which is connected to the DE2-card and all the different adjustments of the outsignal are shown on an LCD.

Place, publisher, year, edition, pages
2012. , 55 p.
Keyword [sv]
SOPC, Quartus, VHDL, Mjuk CPU, Nios II
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:liu:diva-79337ISRN: LITH-ISY-EX-ET--12/0396--SEOAI: diva2:540673
Subject / course
Electronics Systems
2012-06-15, Nollstället, Linköping, 08:00 (Swedish)
Available from: 2012-07-11 Created: 2012-07-10 Last updated: 2012-07-11Bibliographically approved

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Nordmark, Daniel
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