EBRAM - Extending the BlockRAMs in FPGAs to support caches and hash tables inan efficient manner
2012 (English)Conference paper (Refereed)
In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.
Place, publisher, year, edition, pages
IEEE Computer Society, 2012. 242-242 p.
Cache, FPGA, BlockRAM
National CategoryEmbedded Systems
IdentifiersURN: urn:nbn:se:liu:diva-80348DOI: 10.1109/FCCM.2012.52ISI: 000309191400041ISBN: 978-1-4673-1605-7OAI: oai:DiVA.org:liu-80348DiVA: diva2:546551
IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, April 29 - May 1 2012, Toronto, ON, Canada