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EBRAM - Extending the BlockRAMs in FPGAs to support caches and hash tables inan efficient manner
Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.ORCID iD: 0000-0002-0111-2384
2012 (English)Conference paper (Refereed)
Abstract [en]

In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.

Place, publisher, year, edition, pages
IEEE Computer Society, 2012. 242-242 p.
Keyword [en]
Cache, FPGA, BlockRAM
National Category
Embedded Systems
URN: urn:nbn:se:liu:diva-80348DOI: 10.1109/FCCM.2012.52ISI: 000309191400041ISBN: 978-1-4673-1605-7OAI: diva2:546551
IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, April 29 - May 1 2012, Toronto, ON, Canada
Available from: 2012-08-23 Created: 2012-08-23 Last updated: 2015-02-18

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Ehliar, Andreas
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Computer EngineeringThe Institute of Technology
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