A study on power consumption of modified noise-shaper architectures for Sigma-Delta DACs
2011 (English)In: Circuit Theory and Design (ECCTD), 2011, IEEE , 2011, 274-277 p.Conference paper (Refereed)
In this paper, modified, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and power consumption. Two different architectures are investigated, both have variable configurations of the input and output word-length (i.e., the physical resolution of the DAC). A modified architecture, termed in this work as a composite architecture (CA), shows about 9 dB increase in SNR while maintaining a power-consumption at the same level as that of a so-called hybrid architecture (HA). The power estimation is done for modulators on the RTL level using a standard cell library in a 65-nm technology. The modulators are operated at a sampling frequency of 2 GHz.
Place, publisher, year, edition, pages
IEEE , 2011. 274-277 p.
Composite architecture, DAC Complexity, Hybrid architecture, Modulator's Complexity, Noise Shaper, Sigma-Delta Modulator
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-86542DOI: 10.1109/ECCTD.2011.6043335ISBN: 978-1-4577-0617-2ISBN: e-978-1-4577-0616-5OAI: oai:DiVA.org:liu-86542DiVA: diva2:578668
20th European Conference on Circuit Theory and Design (ECCTD 2011), 29-31 August 2011, Linköping, Sweden