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Implementation of a VBR MPEG-stream receiver in an FPGA
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
2012 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesisAlternative title
Implementering av en mottagare för MPEG-strömmar av variabel bitrate för FPGA (Swedish)
Abstract [en]

Nowdays, the transmission of digital TV-signals tends to move towards more untraditional medias, such as TCP/IP networks.

This thesis focused on the problems involved in receiving MPEG transport streams of variable bitrate from a TCP/IP connection, such as jitter and clock synchronization. A suggestion for recovering the transport stream is presented along with a implementation for an Xilinx FPGA targeted for a head end device. The implementation was written in a mix of VHDL and Verilog.

Place, publisher, year, edition, pages
2012. , 41 p.
National Category
Telecommunications Embedded Systems
URN: urn:nbn:se:liu:diva-89886ISRN: LiTH-ISY-EX--12/4625--SEOAI: diva2:613627
Subject / course
Electronics Systems
2012-09-07, Nollstället, Linköpings Universitet, B-huset, Linköping, 10:00 (Swedish)
Available from: 2013-04-02 Created: 2013-03-10 Last updated: 2013-04-04Bibliographically approved

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