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Compiling for VLIW DSPs
Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, The Institute of Technology. (PELAB)ORCID iD: 0000-0001-5241-0026
2010 (English)In: Handbook of signal processing systems / [ed] Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala, New York: Springer, 2010, 1, 603-638 p.Chapter in book (Refereed)
Place, publisher, year, edition, pages
New York: Springer, 2010, 1. 603-638 p.
Keyword [en]
Compiler, code generation, digital signal processor, clustered VLIW architecture, instruction scheduling, instruction selection, register allocation, integrated code generation, VLIW DSP processors
National Category
Computer Science
URN: urn:nbn:se:liu:diva-91498ISBN: 9781441963444ISBN: 9781441963451OAI: diva2:618126
Integrated Software Pipelining
Available from: 2013-04-25 Created: 2013-04-25 Last updated: 2015-03-23Bibliographically approved

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Kessler, Christoph
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