Adaptive Multiset Stochastic Decoding of Non-Binary LDPC Codes
2013 (English)In: IEEE Transactions on Signal Processing, ISSN 1053-587X, E-ISSN 1941-0476, Vol. 61, no 16, 4100-4113 p.Article in journal (Refereed) Published
We propose a non-binary stochastic decoding algorithm for low-density parity-check (LDPC) codes over GF(q) with degree two variable nodes, called Adaptive Multiset Stochastic Algorithm (AMSA). The algorithm uses multisets, an extension of sets that allows multiple occurrences of an element, to represent probability mass functions that simplifies the structure of the variable nodes. The run-time complexity of one decoding cycle using AMSA is O(q) for conventional memory architectures, and O(1) if a custom memory architecture is used. Two fully-parallel AMSA decoders are implemented on FPGA for two (192,96) (2,4)-regular codes over GF(64) and GF(256), both achieving a maximum clock frequency of 108 MHz. The GF(64) decoder has a coded throughput of 65 Mb/s at E-b/N-0 = 2.4 dB when using conventional memory, while a decoder using the custom memory version can achieve 698 Mb/s at the same E-b/N-0. At a frame error rate (FER) of 2 x 10(-6) the GF(64) version of the algorithm is only 0.04 dB away from the floating-point SPA performance, and for the GF(256) code the difference is 0.2 dB. To the best of our knowledge, this is the first fully parallel non-binary LDPC decoder over GF(256) reported in the literature.
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2013. Vol. 61, no 16, 4100-4113 p.
Iterative decoding, low-density parity-check code, non-binary codes, parallel architectures, stochastic decoding
IdentifiersURN: urn:nbn:se:liu:diva-96702DOI: 10.1109/TSP.2013.2264813ISI: 000322335100012OAI: oai:DiVA.org:liu-96702DiVA: diva2:642979