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Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
2013 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

To efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the capture of a desired signal event. A real-time 1024-point pipelined feedforward FFT-core is implemented to transform the signal from the time domain to the frequency domain. The system is designed and synthesized for a Virtex-6 FPGA (XC6VLX240T) and is integrated into SP Devices’ digitizer ADQ1600. The implemented system is able to handle a continuous stream of 1.6GS/s at 16-bit. A small software API is developed that provides runtime configuration of the Triggering conditions.

Place, publisher, year, edition, pages
2013. , 86 p.
Keyword [en]
FFT, digitizer, FPGA, triggering
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:liu:diva-99374ISRN: LiTH-ISY-EX--13/4716--SEOAI: diva2:656743
External cooperation
SP Devices
Subject / course
Electronics Systems
2013-08-30, Nollstället, 22:18 (English)
Available from: 2013-10-31 Created: 2013-10-16 Last updated: 2013-10-31Bibliographically approved

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Eriksson, Mattias
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