Parallel Programming and its architectures Based on data access separated algorithm Kernels
2010 (English)In: International Journal of Embedded and Real-Time Communication Systems, ISSN 1947-3176, Vol. 1, no 1, 65-85 p.Article in journal (Refereed) Published
A novel master-multi-SIMD architecture and its kernel (template) based parallel programming flow is introduced as a parallel signal processing platform. The name of the platform is ePUMA (embedded Parallel DSP processor architecture with Unique Memory Access). The essential technology is to separate data accessing kernels from arithmetic computing kernels so that the run-time cost of data access can be minimized by running it in parallel with algorithm computing. The SIMD memory subsystem architecture based on the proposed flow dramatically improves the total computing performance. The hardware system and programming flow introduced in this article will primarily aim at low-power high-performance embedded parallel computing with low silicon cost for communications and similar real-time signal processing. Copyright © 2010, IGI Global.
Place, publisher, year, edition, pages
IGI Global , 2010. Vol. 1, no 1, 65-85 p.
Conflict-Free Memory Access; EPUMA; Low Power; Memory Subsystem; Parallel DSP; Parallel Programming; Permutation; SIMD; Template-Based Programming; Vector Memory
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-100693DOI: 10.4018/jertcs.2010103004OAI: oai:DiVA.org:liu-100693DiVA: diva2:663316