Investigation of main memory bandwidth on intel single-chip cloud computer
2011 (English)In: 3rd Many-Core Applications Research Community Symposium, MARC 2011, 2011, 107-110 p.Conference paper (Refereed)
The Single-Chip Cloud Computer (SCC) is an experimental processor created by Intel Labs. It comprises 48 x86 cores linked by an on-chip high performance network, as well as four DDR3 memory controllers to access an off-chip main memory of up to 64GiB. This work evaluates the performance of the SCC when accessing the off-chip memory. The focus of this study is not on taxing the bare hardware. Instead, we are interested in the performance of applications that run on the Linux operating system and use the SCC as it is provided. We see that the per-core read memory bandwidth is largely independent of the number of cores accessing the memory simultaneously, but that the write memory access performance drops when more cores write simultaneously to the memory. In addition, the global and per-core memory bandwidth, both writing and reading, depends strongly on the memory access pattern.
Place, publisher, year, edition, pages
2011. 107-110 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-100708OAI: oai:DiVA.org:liu-100708DiVA: diva2:664296
3rd Many-Core Applications Research Community Symposium, MARC 2011