A Reconfigurable FFT Architecture for Variable-Length and Multi-Streaming OFDM Standards
2013 (English)In: IEEE International Symposium on Circuits and Systems (ISCAS), 2013, IEEE , 2013, 2066-2070 p.Conference paper (Refereed)
This paper presents a reconfigurable FFT architecture for variable-length and multi-streaming WiMax wireless standard. The architecture processes 1 stream of 2048-point FFT, up to 2 streams of 1024-point FFT or up to 4 streams of 512-point FFT. The architecture consists of a modified radix-2 single delay feedback (SDF) FFT. The sampling frequency of the system is varied in accordance with the FFT length. The latch-free clock gating technique is used to reduce power consumption. The proposed architecture has been synthesized for the Virtex-6 XCVLX760 FPGA. Experimental results show that the architecture achieves the throughput that is required by the WiMax standard and the design has additional features compared to the previous approaches. The design uses 1% of the total available FPGA resources and maximum clock frequency of 313.67 MHz is achieved. Furthermore, this architecture can be expanded to suit other wireless standards.
Place, publisher, year, edition, pages
IEEE , 2013. 2066-2070 p.
, Circuits and Systems (ISCAS), ISSN 0271-4302
Fast Fourier Transform (FFT); Radix-2; Single Delay Feedback (SDF); Decimation in Time (DIT); Variable-length; Multi-streaming; Pipelined Architecture; Worldwide Interoperability for Microwave Access (WiMax); OFDM
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-106535DOI: 10.1109/ISCAS.2013.6572279ISI: 000332006802073ISBN: 978-1-4673-5760-9OAI: oai:DiVA.org:liu-106535DiVA: diva2:716596
2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013; Beijing; China