Passive SC Sigma Delta Modulators Revisited: Analysis and Design Study
2015 (English)In: IEEE Journal of Emerging and Selected Topics in Power Electronics, ISSN 2168-6777, E-ISSN 2168-6785, Vol. 5, no 4, 624-637 p.Article in journal (Refereed) Published
In this paper we study passive switch-capacitor sigma-delta (ΣΔ) modulators suitable for low power applications. Using a one-bit quantizer as the only active block those modulators save power and achieve high linearity. However, their order is largely limited since the passive loop filter presents a significant attenuation to the signal. Typically with a secondorder filter the modulator can achieve a satisfactory signal-toquantization-noise ratio (SQNR) by using a large enough oversampling (OSR) that also creates a tradeoff with the power consumption. A passive ΣΔ modulator when modeled as a linear system requires extraction of the equivalent loop gain. It is shown that for this purpose the quantization and thermal noise should be considered jointly. The paper presents optimization of the modulator in the design space defined by the filter capacitor ratios and the feedback coefficients. Included is a detailedanalysis of the thermal noise, quantization noise, and other parasitic effects. The discussion is supported by 65 nm CMOS chip measurements showing power consumption < 0.62μW, SNDR = 73 dB, and energy efficiency < 0.17 pJ/step.
Place, publisher, year, edition, pages
IEEE Press, 2015. Vol. 5, no 4, 624-637 p.
Passive sigma-delta modulator, passive SC filter, ADC, CMOS, thermal noise in SC circuit, equivalent quantizer gain
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-112881DOI: 10.1109/JETCAS.2015.2502169ISI: 000367302600013OAI: oai:DiVA.org:liu-112881DiVA: diva2:773296
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