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Energy-Efficient Gear-Shift LDPC Decoders
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology. University of Idaho, USA.
Technion, Israel.
McGill University, Canada.
2014 (English)In: PROCEEDINGS OF THE 2014 IEEE 25TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2014), IEEE , 2014, 219-223 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, we present LDPC decoder designs based on gear-shift algorithms, which can use multiple decoding algorithms or update rules over the course of decoding a single frame. By first attempting to decode using low-complexity algorithms, followed by high-complexity algorithms, we increase energy efficiency without sacrificing error correction performance. We present the GSP and IGSP algorithms, and ASIC designs of these algorithms for the 10 Gbps Ethernet (2048,1723) LDPC code. In 65nm CMOS, our pipelined GSP decoder achieves a core area of 5.29mm(2), throughput of 88.1 Gbps, and energy efficiency of 39.3 pJ/bit, while our IGSP decoder achieves a core area of 6.00mm(2), throughput of 100.3 Gbps, and energy efficiency of 14.6 pJ/bit. Both algorithms achieve error correction performance equivalent to the offset min-sum algorithm. The throughput per unit area and energy efficiency of these decoders improve upon state-of-the-art decoders with comparable error correction performance.

Place, publisher, year, edition, pages
IEEE , 2014. 219-223 p.
Series
Proceedings IEEE International Conference of Application-Specific Systems Architectures and Processors, ISSN 2160-0511
Keyword [en]
Iterative decoding; energy efficiency; LDPC codes; VLSI; gear-shift
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-113227DOI: 10.1109/ASAP.2014.6868665ISI: 000345737000042Scopus ID: 2-s2.0-84906337159ISBN: 978-1-4799-3609-0 (print)OAI: oai:DiVA.org:liu-113227DiVA: diva2:779276
Conference
IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)
Available from: 2015-01-12 Created: 2015-01-12 Last updated: 2015-04-16Bibliographically approved

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Cushon, KevinHemati, Saied

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
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  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
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  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
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