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Design considerations for interface circuits to low-voltage piezoelectric energy harvesters
Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.ORCID iD: 0000-0003-2056-4762
Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
2014 (English)Conference paper, Published paper (Refereed)
Abstract [en]

In this work we investigate the limitations and describe the operation of passive fully integrated rectifiers in standard CMOS technology for low-voltage piezoelectric harvesters. These harvesters are typical for low-frequency and low-acceleration applications, such as body-motion scenarios, i.e., wearables. We motivate the choice of active rectifiers for low-voltage energy harvesters and techniques to boost the available input voltage to the rectifier. A test circuit recently taped-out in 0.35-μm CMOS is described to illustrate some of the challenges associated with rectifier design for low-voltage energy harvesters. The circuit occupies an area of 210 × 155 μm2 and operates at input voltages between 0.6 and 3.3 V. Post-layout simulations shows an efficiency of 79 % at a 0.7-V input.

Place, publisher, year, edition, pages
2014. 1-4 p.
National Category
Other Engineering and Technologies not elsewhere specified
Identifiers
URN: urn:nbn:se:liu:diva-114732DOI: 10.1109/NORCHIP.2014.7004722OAI: oai:DiVA.org:liu-114732DiVA: diva2:792214
Conference
IEEE Norchip Conference
Available from: 2015-03-03 Created: 2015-03-03 Last updated: 2016-05-04

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Nielsen Lönn, MartinWikner, JacobAlvandpour, Atila

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