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Memory Sharing Techniques for Multi-standard High-throughput FEC Decoder
Beijing Institute Technology, Peoples R China.
Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
2014 (English)In: 2014 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION (SAMOS XIV), IEEE , 2014, 93-98 p.Conference paper (Refereed)
Abstract [en]

Nowadays multi-standard wireless baseband, Convolutional Code (CC), Turbo code and LDPC code are widely applied and need to be integrated within one FEC module. Since memory occupies half or even more area of the decoder, memory sharing techniques for area saving purpose is valuable to consider. In this work, several memory merging techniques are proposed. A non-conflict access technique for merged path metric buffer is proposed. The results show that 41% of total memory bits are saved when integrating three different decoding schemes including CC (802.11a/g/n), LDPC (802.11n and 802.16e) and Turbo (3GPP-LTE). Synthesis result with 65nm process shows that the merged memory blocks consume merely 1.06mm(2) of the chip area.

Place, publisher, year, edition, pages
IEEE , 2014. 93-98 p.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-122086DOI: 10.1109/SAMOS.2014.6893199ISI: 000361019300012ISBN: 978-1-4799-3770-7OAI: oai:DiVA.org:liu-122086DiVA: diva2:861944
Conference
International Conference on Embedded Computer Systems - Architectures, Modeling, and Simulation (SAMOS)
Available from: 2015-10-19 Created: 2015-10-19 Last updated: 2015-10-19

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