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A Wide Range All-Digital Delay Locked Loop for Video Applications
Linköping University, Department of Electrical Engineering. Linköping University, Faculty of Science & Engineering.
COMSATS Institute IT, Pakistan.
Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
2015 (English)In: 2015 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), IEEE , 2015, 372-375 p.Conference paper, Published paper (Refereed)
Abstract [en]

An all-digital delay locked loop (DLL) for use in an analog video front end (AFE) is presented. The DLL is designed for a wide input frequency range of 40-300 MHz to cater to a range of different video standards currently in use. The proposed DLL has a closed loop architecture that tracks PVT variations and locks to the input signal in a maximum of nine clock cycles. At its output, the DLL generates 32 uniformly distributed phases of the input clock to provide an optimal sampling point for the analog to digital conversion of the input signal in the AFE.

Place, publisher, year, edition, pages
IEEE , 2015. 372-375 p.
National Category
Signal Processing
Identifiers
URN: urn:nbn:se:liu:diva-131537DOI: 10.1109/ECCTD.2015.7300049ISI: 000380498200031ISBN: 978-1-4799-9877-7 (print)OAI: oai:DiVA.org:liu-131537DiVA: diva2:974173
Conference
European Conference on Circuit Theory and Design (ECCTD)
Available from: 2016-09-25 Created: 2016-09-23 Last updated: 2016-09-29Bibliographically approved

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Pasha, Muhammad TouqirWikner, Jacob
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CiteExportLink to record
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Citation style
  • apa
  • harvard1
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Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf