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  • 1.
    A. Sani, Negar
    Linköping University, Department of Science and Technology, Physics and Electronics.
    M-PSK and M-QAM Modulation/Demodulation of UWB Signal Using Six-Port Correlator2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Nowadays high speed and high data rate communication are highly demanded. Consequently, wideband and high frequency transmitter and receivers should be designed. New transmitters and receivers should also have low power consumption, simple design and low manufacturing price in order to fulfill manufacturers’ requests for mass production. Having all above specifications, six-port correlator is a proper choice to be used as modulator and demodulator in transmitters and receivers.

    In this thesis the six-port correlator is introduced, modeled and simulated using Advanced Design System (ADS) software. A simple six-port transmitter/receiver system with a line of sight link is modeled and analyzed in BER, path length and noise terms. The modulation in this system is QAM, frequency is 7.5 GHz and symbol rate is 500 Msymbol/s.

    Furthermore two methods are proposed for high frequency and high symbol rate M-PSK and M-QAM modulation using six-port correlator. The 7.5 GHz modulators are modeled and simulated in ADS. Data streams generated by pseudo random bit generator with 1 GHz bandwidth are applied to modulators. Common source field effect transistors (FETs) with zero bias are used as controllable impedance termination to apply baseband data to modulator. Both modulators show good performance in M-PSK and M-QAM modulation.

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  • 2.
    Aamir, Syed Ahmed
    Linköping University. Linköping University, Department of Electrical Engineering.
    A 65nm, Low Voltage, Fully Differential, SC Programmable Gain Amplifier for Video AFE2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Due to rapid growth of home entertainment consumer market, video technology has been continuously pushed to deliver sharper pictures with higher resolution. This has brought about stringent requirements on the video analog front end, which often coupled with the low power and low voltage regulations had to deal with short channel effects of the deep submicron CMOS processes.

    This thesis presents the design of a fully differential programmable gain amplifier, as a subcircuit of a larger video digitizing IC designed at division of Electronic Systems. The switched capacitor architecture of the PGA does not only buffer the signal, but performs compensation for the sync-tip of analog video signal.

    The pseudo differential OTA eliminates tail current source and maintains high signal swing and has efficient common mode feedforward mechanism. When coupled with a similar stage provides inherent common moode feedback without using an additional SC-CMFB block.

    The PGA has been implemented using a 65 nm digital CMOS process. Expected difficulties in a 1.2 V OTA design make themselves evident in 65 nm, which is why cascaded OTA structures were inevitable for attaining gain specification of 60 dB. Nested Miller compensation with a pole shifting source follower, stabilizes the multipole system. The final circuit attains up to 200 MHz bandwidth and maintains high output swing of 0.85 V. High slew rate and good common mode and power supply rejection are observed. Noise requirements require careful design of input differential stage. Although output source follower stabilized the system, it reduces significant bandwidth and adds to second order non-linearity.

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    FULLTEXT01
  • 3.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 1.2-V pseudo-differential OTA with common-mode feedforward in 65-nm CMOS2010In: Proceedings of the 17th IEEE International Conference on Electronics, Circuits, and Systems, Institute of Electrical and Electronics Engineers (IEEE), 2010, p. 29-32Conference paper (Refereed)
    Abstract [en]

    In this work, we describe the implementation of a 1. 2-V pseudo-differential operational transconductance amplifier (OTA) with common-mode feedforward (CMFF) and inher­ent common-mode feedback (CMFB) in a 65-nm, digital CMOS process. The OTA architecture provides an inher­ent CMFB when cascaded OTA structures are utilized andthis work has studied a cascaded amplifier consisting of fourstages. Due to the low-gain using core 65-nm circuit de­vices, the overall gain must be distributed on all four stages to acquire a gain of more than 60 dB, while maintaining a-3-dB bandwidth of 200 MHz. To achieve high gain, we propose using a modified, positive-feedback, cross-coupled input differential stage. The modified OTA achieves a high output swing of ± 0.85 V due to only two stacked transistors, 88 dB DC gain and a third-order harmonic of -60 dB for 800 mVpp at 30 MHz. Further on, in a capacitive buffer configuration, we achieve a high slew rate of 1240 V/µS, -3-dB bandwidth of 509 MHz, signal-to-noise ratio of 63 dB while consuming 10.4 mW power.

  • 4.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 500-MHz low-voltage programmable gain amplifier for HD video in 65-nm CMOS2010In: Proceedings of 28th IEEE Norchip Conference., NORCHIP'10, Tampere: www.ieee.org , 2010, p. 1-4Conference paper (Refereed)
    Abstract [en]

    This work describes the implementation of a 1.2-V programmable gain amplifier (PGA) for high-definition (HD) video digitizers in a 65-nm digital CMOS process. The “pseudo” switched-capacitor (SC) PGA architecture buffers the video signal, without switching, during the active video. The SC circuitry is used for setup of DC operating point during horizontal and vertical blanking periods. Additionally, it compensates for the `sync-tip' of analog video signals to an equal blanking level for increased dynamic range to the digitizer following the PGA. The operational transconductance amplifier (OTA) employed as main amplifier in the PGA is a pseudo-differential, positive-feedback input stage architecture with a common-mode feedforward (CMFF) technique. The common-mode feedback (CMFB) is provided once two OTAs are cascaded. Schematic-level simulation results show that the OTA maintains a -3-dB bandwidth of 550 MHz, while keeping the distortion HD3 at -60 dB for a 30-MHz, 850 mVpp high definition video signal. The 88 dB DC gain is distributed among four OTA stages and the overall, combined PGA achieves a signal-to-noise ratio of 63 dB. Due to only two stacked transistors, it achieves high output swing of ±0.85 V, 1240 V/μs slew rate while consuming 10.4 mW power.

  • 5.
    Aaro, Gustav
    Linköping University, Department of Computer and Information Science.
    Smartphone Based Indoor Positioning Using Wi-Fi Round Trip Time and IMU Sensors2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    While GPS long has been an industry standard for localization of an entity or person anywhere in the world, it loses much of its accuracy and value when used indoors. To enable services such as indoor navigation, other methods must be used. A new standard of the Wi-Fi protocol, IEEE 802.11mc (Wi-Fi RTT), enables distance estimation between the transmitter and the receiver based on the Round-Trip Time (RTT) delay of the signal. Using these distance estimations and the known locations of the transmitting Access Points (APs), an estimation of the receiver’s location can be determined. In this thesis, a smartphone Wi-Fi RTT based Indoor Positioning System (IPS) is presented using an Unscented Kalman Filter (UKF). The UKF using only RTT based distance estimations as input, is established as a baseline implementation. Two extensions are then presented to improve the positioning performance; 1) a dead reckoning algorithm using smartphone sensors part of the Inertial Measurement Unit (IMU) as an additional input to the UKF, and 2) a method to detect and adjust distance measurements that have been made in Non-Line-of-Sight (NLoS) conditions. The implemented IPS is evaluated in an office environment in both favorable situations (plenty of Line-of-Sight conditions) and sub-optimal situations (dominant NLoS conditions). Using both extensions, meter level accuracy is achieved in both cases as well as a 90th percentile error of less than 2 meters.

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  • 6.
    Aasa, Amanda
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Svennblad, Amanda
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Design of an Automated Test Setup for Power-Controlled Nerve Stimulator Using NFC for Implantable Sensors2021Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Electrical stimulation on nerves is a relatively new area of research and has been proved to speed up recoveryfrom nerve damage. In this work, the efficiency and stability of antennas integrated on printed circuit boards provided by the department of electrical engineering are examined. An automated test bench containing a stepmotor with a slider and an Arduino is created. Different setups were used when measuring on the boards, which resulted in that the largest antenna gave the most stable output despite the distance between transmitterand receiver. The conclusion was that the second best antenna and the smallest one would be suitable as well,and the better choice if it is to be implemented under the skin. A physical setup consisting of LEDs, an Arduino, a computer, and a function generator was created to examinethe voltage control functionality, where colored LEDs were lit depending on the voltage level. The functionality was then implemented in a circuit that in the future shall be integrated on the printed circuit board. To control high voltages a limiter circuit was examined and implemented. The circuit was simulated and tested, with a realization that a feature covering voltage enlargement is needed for the future. 

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  • 7.
    Abara, Precious Ugo
    et al.
    Univ Padua, Italy; Tech Univ Munich, Germany.
    Ticozzi, Francesco
    Univ Padua, Italy; Dartmouth Coll, NH 03755 USA.
    Altafini, Claudio
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Spectral Conditions for Stability and Stabilization of Positive Equilibria for a Class of Nonlinear Cooperative Systems2018In: IEEE Transactions on Automatic Control, ISSN 0018-9286, E-ISSN 1558-2523, Vol. 63, no 2, p. 402-417Article in journal (Refereed)
    Abstract [en]

    Nonlinear cooperative systems associated to vector fields that are concave or subhomogeneous describe well interconnected dynamics that are of key interest for communication, biological, economical, and neural network applications. For this class of positive systems, we provide conditions that guarantee existence, uniqueness and stability of strictly positive equilibria. These conditions can be formulated directly in terms of the spectral radius of the Jacobian of the system. If control inputs are available, then it is shown how to use state feedback to stabilize an equilibrium point in the interior of the positive orthant.

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    fulltext
  • 8.
    Abarghouyi, Hadis
    et al.
    IUST, Iran; MTNi Co, Iran.
    Razavizadeh, S. Mohammad
    IUST, Iran.
    Björnson, Emil
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    QoE-Aware Beamforming Design for Massive MIMO Heterogeneous Networks2018In: IEEE Transactions on Vehicular Technology, ISSN 0018-9545, E-ISSN 1939-9359, Vol. 67, no 9, p. 8315-8323Article in journal (Refereed)
    Abstract [en]

    One of the main goals of the future wireless networks is improving the users quality of experience (QoE). In this paper, we consider the problem of the QoE-based resource allocation in the downlink of a massive multiple-input multiple-output heterogeneous network. The network consists of a macrocell with a number of small cells embedded in it. The small cells base stations (BSs) are equipped with a few antennas, while the macro BS is equipped with a massive number of antennas. We consider the two services Video and Web Browsing and design the beamforming vectors at the BSs. The objective is to maximize the aggregated mean opinion score (MOS) of the users under constraints on the BSs powers and the required quality of service of the users. We also consider extra constraints on the QoE of users to more strongly enforce the QoE in the beamforming design. To reduce the complexity of the optimization problem, we suggest suboptimal and computationally efficient solutions. Our results illustrate that increasing the number of antennas at the BSs and also increasing the number of small cells antennas in the network leads to a higher user satisfaction.

  • 9. Order onlineBuy this publication >>
    Abbas, Muhammad
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On the Implementation of Integer and Non-Integer Sampling Rate Conversion2012Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    The main focus in this thesis is on the aspects related to the implementation of integer and non-integer sampling rate conversion (SRC). SRC is used in many communication and signal processing applications where two signals or systems having different sampling rates need to be interconnected. There are two basic approaches to deal with this problem. The first is to convert the signal to analog and then re-sample it at the desired rate. In the second approach, digital signal processing techniques are utilized to compute values of the new samples from the existing ones. The former approach is hardly used since the latter one introduces less noise and distortion. However, the implementation complexity for the second approach varies for different types of conversion factors. In this work, the second approach for SRC is considered and its implementation details are explored. The conversion factor in general can be an integer, a ratio of two integers, or an irrational number. The SRC by an irrational numbers is impractical and is generally stated for the completeness. They are usually approximated by some rational factor.

    The performance of decimators and interpolators is mainly determined by the filters, which are there to suppress aliasing effects or removing unwanted images. There are many approaches for the implementation of decimation and interpolation filters, and cascaded integrator comb (CIC) filters are one of them. CIC filters are most commonly used in the case of integer sampling rate conversions and often preferred due to their simplicity, hardware efficiency, and relatively good anti-aliasing (anti-imaging) characteristics for the first (last) stage of a decimation (interpolation). The multiplierless nature, which generally yields to low power consumption, makes CIC filters well suited for performing conversion at higher rate. Since these filters operate at the maximum sampling frequency, therefore, are critical with respect to power consumption. It is therefore necessary to have an accurate and efficient ways and approaches that could be utilized to estimate the power consumption and the important factors that are contributing to it. Switching activity is one such factor. To have a high-level estimate of dynamic power consumption, switching activity equations in CIC filters are derived, which may then be used to have an estimate of the dynamic power consumption. The modeling of leakage power is also included, which is an important parameter to consider since the input sampling rate may differ several orders of magnitude. These power estimates at higher level can then be used as a feed-back while exploring multiple alternatives.

    Sampling rate conversion is a typical example where it is required to determine the values between existing samples. The computation of a value between existing samples can alternatively be regarded as delaying the underlying signal by a fractional sampling period. The fractional-delay filters are used in this context to provide a fractional-delay adjustable to any desired value and are therefore suitable for both integer and non-integer factors. The structure that is used in the efficient implementation of a fractional-delay filter is know as Farrow structure or its modifications. The main advantage of the Farrow structure lies in the fact that it consists of fixed finite-impulse response (FIR) filters and there is only one adjustable fractional-delay parameter, used to evaluate a polynomial with the filter outputs as coefficients. This characteristic of the Farrow structure makes it a very attractive structure for the implementation. In the considered fixed-point implementation of the Farrow structure, closed-form expressions for suitable word lengths are derived based on scaling and round-off noise. Since multipliers share major portion of the total power consumption, a matrix-vector multiple constant multiplication approach is proposed to improve the multiplierless implementation of FIR sub-filters.

    The implementation of the polynomial part of the Farrow structure is investigated by considering the computational complexity of different polynomial evaluation schemes. By considering the number of operations of different types, critical path, pipelining complexity, and latency after pipelining, high-level comparisons are obtained and used to short list the suitable candidates. Most of these evaluation schemes require the explicit computation of higher order power terms. In the parallel evaluation of powers, redundancy in computations is removed by exploiting any possible sharing at word level and also at bit level. As a part of this, since exponents are additive under multiplication, an ILP formulation for the minimum addition sequence problem is proposed.

    List of papers
    1. Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology
    Open this publication in new window or tab >>Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology
    2010 (English)In: Proceedings of International Conference on Green Circuits and Systems (ICGCS), 2010, Date: 21-23 June, 2010, IEEE , 2010, p. 221-225Conference paper, Published paper (Refereed)
    Abstract [en]

    The power modeling of different realizations of cascaded integrator-comb (CIC) decimation filters has been a subject of several recent works. In this work we have extended these with modeling of leakage power, which is an important factor since the input sample rate may differ several orders of magnitude. Furthermore, we have pointed out the importance of the input wordlength on the comparison of recursive and nonrecursive implementations.

    Place, publisher, year, edition, pages
    IEEE, 2010
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70451 (URN)10.1109/ICGCS.2010.5543063 (DOI)978-1-4244-6877-5 (ISBN)978-1-4244-6876-8 (ISBN)
    Conference
    International Conference on Green Circuits and Systems (ICGCS), June 21–23, Shanghai, China
    Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    2. Switching Activity Estimation of CIC Filter Integrators
    Open this publication in new window or tab >>Switching Activity Estimation of CIC Filter Integrators
    2010 (English)In: Proceedings of Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2010, Date:22-24 Sept. 2010, IEEE , 2010, p. 21-24Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, a method for estimation of the switching activity in integrators is presented. To achieve low power, it is always necessary to develop accurate and efficient methods to estimate the switching activity. The switching activities are then used to estimate the power consumption. In our work, the switching activity is first estimated for the general purpose integrators and then it is extended for the estimation of switching activity in cascaded integrators in CIC filters.

    Place, publisher, year, edition, pages
    IEEE, 2010
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70452 (URN)10.1109/PRIMEASIA.2010.5604971 (DOI)978-1-4244-6736-5 (ISBN)978-1-4244-6735-8 (ISBN)
    Conference
    Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 22-24 September, Shanghai, China
    Note
    ©2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. MUHAMMAD ABBAS and Oscar Gustafsson, Switching Activity Estimation of CIC Filter Integrators, 2010, Asia Pacific Conf. on Postgraduate Research in Microelectronics and Electronics, Shanghai, China. http://dx.doi.org/10.1109/PRIMEASIA.2010.5604971 Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    3. Scaling of fractional delay filters based on the Farrow structure
    Open this publication in new window or tab >>Scaling of fractional delay filters based on the Farrow structure
    2009 (English)In: Proceedings of IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009, Piscataway: IEEE , 2009, p. 489-492Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work we consider scaling of fractional delay filters using the Farrow structure. Based on the observation that the subfilters approximate the Taylor expansion of a differentiator, we derive estimates of the L2-norm scaling values at the outputs of each subfilter as well as at the inputs of each delay multiplier. The scaling values can then be used to derive suitable wordlengths in a fixed-point implementation.

    Place, publisher, year, edition, pages
    Piscataway: IEEE, 2009
    National Category
    Signal Processing
    Identifiers
    urn:nbn:se:liu:diva-51070 (URN)10.1109/ISCAS.2009.5117792 (DOI)000275929800123 ()978-1-4244-3827-3 (ISBN)
    Conference
    IEEE International Symposium on Circuits and Systems, 24-27 May 2009, Taipei,Taiwan
    Available from: 2009-10-15 Created: 2009-10-15 Last updated: 2018-09-01Bibliographically approved
    4. Computational and Implementation Complexity of Polynomial Evaluation Schemes
    Open this publication in new window or tab >>Computational and Implementation Complexity of Polynomial Evaluation Schemes
    2011 (English)In: Proceedings of NORCHIP, 2011 Date:14-15 Nov. 2011, IEEE conference proceedings, 2011, p. 1-6Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, we consider the computational complexity of different polynomial evaluation schemes. By considering the number of operations of different types, critical path, pipelining complexity, and latency after pipelining, high-level comparisons are obtained. These can then be used to short list suitable candidates for an implementation given the specifications. Not only multiplications are considered, but they are divided into data-data multiplications, squarers, and data-coefficient multiplications, as the latter can be optimized depending on implementation architecture and application.

    Place, publisher, year, edition, pages
    IEEE conference proceedings, 2011
    Keywords
    Adders, Computer architecture, Delay, Filtering algorithms, ISO, Pipeline processing, Polynomials
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73935 (URN)10.1109/NORCHP.2011.6126735 (DOI)978-1-4577-0515-1 (ISBN)978-1-4577-0514-4 (ISBN)
    Conference
    NORCHIP 2011. The Nordic Microelectronics event, 29th Norchip Conference 14-15 November 2011, Lund, Sweden
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
    5. Low-Complexity Parallel Evaluation of Powers Exploiting Bit-Level Redundancy
    Open this publication in new window or tab >>Low-Complexity Parallel Evaluation of Powers Exploiting Bit-Level Redundancy
    2010 (English)In: Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), 2010, 7-10 Nov. 2010 / [ed] Michael B. Matthews, Washington, DC, USA: IEEE Computer Society , 2010, p. 1168-1172Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, we investigate the problem of computing any requested set of power terms in parallel using summations trees. This problem occurs in applications like polynomial approximation, Farrow filters (polynomial evaluation part) etc. In the proposed technique, the partial product of each power term is initially computed independently. A redundancy check is then made in each and among all partial products matrices at bit level. The redundancy here relates to the fact that same three partial products may be present in more than one columns, and, hence, can be mapped to the same full adder. The proposed algorithm is tested for different sets of powers and wordlengths to exploit the sharing potential.

    Place, publisher, year, edition, pages
    Washington, DC, USA: IEEE Computer Society, 2010
    Series
    Asilomar Conference on Signals, Systems and Computers. Conference Record, ISSN 1058-6393
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70453 (URN)10.1109/ACSSC.2010.5757714 (DOI)978-1-4244-9722-5 (ISBN)
    Conference
    Signals, Systems and Computers (ASILOMAR), 2010, 7-10 Nov. 2010 , Pacific Grove, CA, USA
    Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    6. Integer Linear Programming Modeling of Addition Sequences With Additional Constraints for Evaluation of Power Terms
    Open this publication in new window or tab >>Integer Linear Programming Modeling of Addition Sequences With Additional Constraints for Evaluation of Power Terms
    (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In this work, an integer linear programming (ILP) based model is proposed for the computation of a minimal cost addition sequence for a given set of integers. Since exponents are additive under multiplication, the minimal length addition sequence will provide an optimal solution for the evaluation of a requested set of power terms. This in turn finds application in, e.g., window-based exponentiation for cryptography and polynomial evaluation. Not only is an optimal model proposed, the model is extended to consider different costs for multipliers and squarers as well as controlling the depth of the resulting addition sequence.

    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73936 (URN)
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
    7. Switching Activity Estimation of DDFS Phase Accumulators
    Open this publication in new window or tab >>Switching Activity Estimation of DDFS Phase Accumulators
    (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In this letter, equations for the one’s probability and switching activities for direct digital frequency synthesis (DDFS) phase accumulators are derived. These results are useful for obtaining good accuracy estimated of both leakage and dynamic power consumption for the phase accumulator and the phase-to-magnitude converter.

    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73937 (URN)
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
    Download full text (pdf)
    On the Implementation of Integer and Non-Integer Sampling Rate Conversion
    Download (pdf)
    omslag
  • 10.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Håkan
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On the Fixed-Point Implementation of Fractional-Delay Filters Based on the Farrow Structure2013In: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, ISSN 1549-8328, E-ISSN 1558-0806, Vol. 60, no 4, p. 926-937Article in journal (Refereed)
    Abstract [en]

    In this paper, the fixed-point implementation of adjustable fractional-delay filters using the Farrow structure is considered. Based on the observation that the sub-filters approximate differentiators, closed-form expressions for the L-2-norm scaling values at the outputs of each sub-filter as well as at the inputs of each delay multiplier are derived. The scaling values can then be used to derive suitable word lengths by also considering the round-off noise analysis and optimization. Different approaches are proposed to derive suitable word lengths including one based on integer linear programming, which always gives an optimal allocation. Finally, a new approach for multiplierless implementation of the sub-filters in the Farrow structure is suggested. This is shown to reduce register complexity and, for most word lengths, require less number of adders and subtracters when compared to existing approaches.

  • 11.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Håkan
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Scaling of fractional delay filters based on the Farrow structure2009In: Proceedings of IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009, Piscataway: IEEE , 2009, p. 489-492Conference paper (Refereed)
    Abstract [en]

    In this work we consider scaling of fractional delay filters using the Farrow structure. Based on the observation that the subfilters approximate the Taylor expansion of a differentiator, we derive estimates of the L2-norm scaling values at the outputs of each subfilter as well as at the inputs of each delay multiplier. The scaling values can then be used to derive suitable wordlengths in a fixed-point implementation.

  • 12.
    Abbasi, Muneeb Mehmood
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Jabbar, Mohammad Abdul
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Design and Performance Analysis of Low-Noise Amplifier with Band-Pass Filter for 2.4-2.5 GHz2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Low power wireless electronics is becoming more popular due to durability, portability and small dimension. Especially, electronic devices in instruments, scientific and medical (ISM) band is convenient from the spectrum regulations and technology availability point of view. In the communication engineering society, to make a robust transceiver is always a matter of challenges for the better performance.

    However, in this thesis work, a new approach of design and performance analysis of Low-Noise Amplifier with Band-Pass filter is performed at 2.45 GHz under the communication electronics research group of Institute of Science and Technology (ITN). Band-Pass Filtered Low-Noise Amplifier is designed with lumped components and transmission lines. Performances of different designs are compared with respect to noise figure, gain, input and output reflection coefficient. In the design process, a single stage LNA is designed with amplifier, ATF-58143. Maximally flat band-pass (BPF) filters were designed with lumped components and distributed elements. Afterwards, BPF is integrated with the LNA at the front side of LNA to get a compact Band-Pass Filtered Low-Noise Amplifier with good performance.

    Advanced Design System (ADS) tool was used for design and simulation, and each design was tuned to get the optimum value for noise figure, gain and input reflection coefficient. LNA stand-alone gives acceptable value of noise figure and gain but the bandwidth was too wide compared to specification. Band-Pass Filtered Low-Noise Amplifier with lumped components gives also considerable values of noise and gain. But the gain was not so flat and the bandwidth was also wide. Then, Band-Pass Filtered Low-Noise Amplifier was designed with transmission lines where the optimum value of noise figure and gain was found. The gain was almost flat over the whole band, i.e., 2.4-2.5 GHz compared to LNA stand-alone and Band-Pass Filtered Low-Noise Amplifier designed with lumped components. It is observed that deviations of results from schematic to layout level are considerable, i.e., electromagnetic simulation is needed to predict the Band-Pass Filtered Low-Noise Amplifier performance.

    Prototype of LNA, Band-Pass Filtered Low-Noise Amplifier with lumped and transmission lines are made at ITN’s PCB laboratory. Due to unavailability of exact values of Murata components and for some other technical reasons, the measured values of Band-Pass Filtered Low-Noise Amplifier with lumped components and transmission lines are deviated compared to predicted values from simulation.

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  • 13.
    Abd-Elmagid, Mohamed A.
    et al.
    Virginia Tech, VA 24061 USA.
    Dhillon, Harpreet S.
    Virginia Tech, VA 24061 USA.
    Pappas, Nikolaos
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    A Reinforcement Learning Framework for Optimizing Age of Information in RF-Powered Communication Systems2020In: IEEE Transactions on Communications, ISSN 0090-6778, E-ISSN 1558-0857, Vol. 68, no 8, p. 4747-4760Article in journal (Refereed)
    Abstract [en]

    In this paper, we study a real-time monitoring system in which multiple source nodes are responsible for sending update packets to a common destination node in order to maintain the freshness of information at the destination. Since it may not always be feasible to replace or recharge batteries in all source nodes, we consider that the nodes are powered through wireless energy transfer (WET) by the destination. For this system setup, we investigate the optimal online sampling policy (referred to as the age-optimal policy) that jointly optimizes WET and scheduling of update packet transmissions with the objective of minimizing the long-term average weighted sum of Age of Information (AoI) values for different physical processes (observed by the source nodes) at the destination node, referred to as the sum-AoI. To solve this optimization problem, we first model this setup as an average cost Markov decision process (MDP) with finite state and action spaces. Due to the extreme curse of dimensionality in the state space of the formulated MDP, classical reinforcement learning algorithms are no longer applicable to our problem even for reasonable-scale settings. Motivated by this, we propose a deep reinforcement learning (DRL) algorithm that can learn the age-optimal policy in a computationally-efficient manner. We further characterize the structural properties of the age-optimal policy analytically, and demonstrate that it has a threshold-based structure with respect to the AoI values for different processes. We extend our analysis to characterize the structural properties of the policy that maximizes average throughput for our system setup, referred to as the throughput-optimal policy. Afterwards, we analytically demonstrate that the structures of the age-optimal and throughput-optimal policies are different. We also numerically demonstrate these structures as well as the impact of system design parameters on the optimal achievable average weighted sum-AoI.

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  • 14.
    Abd-Elmagid, Mohamed A.
    et al.
    Virginia Tech, VA 24061 USA.
    Dhillon, Harpreet S.
    Virginia Tech, VA 24061 USA.
    Pappas, Nikolaos
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    AoI-Optimal Joint Sampling and Updating for Wireless Powered Communication Systems2020In: IEEE Transactions on Vehicular Technology, ISSN 0018-9545, E-ISSN 1939-9359, Vol. 69, no 11, p. 14110-14115Article in journal (Refereed)
    Abstract [en]

    This paper characterizes the structure of the Age of Information (AoI)-optimal policy in wireless powered communication systems while accounting for the time and energy costs of generating status updates at the source nodes. In particular, for a single source-destination pair in which a radio frequency (RF)-powered source sends status updates about some physical process to a destination node, we minimize the long-term average AoI at the destination node. The problem is modeled as an average cost Markov Decision Process (MDP) in which, the generation times of status updates at the source, the transmissions of status updates from the source to the destination, and the wireless energy transfer (WET) are jointly optimized. After proving the monotonicity property of the value function associated with the MDP, we analytically demonstrate that the AoI-optimal policy has a threshold-based structure w.r.t. the state variables. Our numerical results verify the analytical findings and reveal the impact of state variables on the structure of the AoI-optimal policy. Our results also demonstrate the impact of system design parameters on the optimal achievable average AoI as well as the superiority of our proposed joint sampling and updating policy w.r.t. the generate-at-will policy.

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  • 15.
    Abd-Elmagid, Mohamed A.
    et al.
    Virginia Tech, VA 24061 USA.
    Dhillon, Harpreet S.
    Virginia Tech, VA 24061 USA.
    Pappas, Nikolaos
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    Online Age-minimal Sampling Policy for RF-powered IoT Networks2019In: 2019 IEEE GLOBAL COMMUNICATIONS CONFERENCE (GLOBECOM), IEEE , 2019Conference paper (Refereed)
    Abstract [en]

    In this paper, we study a real-time Internet of Things (IoT)-enabled monitoring system in which a source node (e.g., IoT device or an aggregator located near a group of IoT devices) is responsible for maintaining the freshness of information status at a destination node by sending update packets. Since it may not always be feasible to replace or recharge batteries in all IoT devices, we consider that the source node is powered by wireless energy transfer (WET) by the destination. For this system setup, we investigate the optimal online sampling policy that minimizes the long-term average Age-of-Information (AoI), referred to as the age-optimal policy. The age-optimal policy determines whether each slot should be allocated for WET or update packet transmission while considering the dynamics of battery level, AoI, and channel state information (CSI). To solve this optimization problem, we model this setup as an average cost Markov Decision Process (MDP). After analytically establishing the monotonicity property of the value function associated with the MDP, the age-optimal policy is proven to be a threshold based policy with respect to each of the system state variables. We extend our analysis to characterize the structural properties of the policy that maximizes average throughput for our system setup, referred to as the throughput-optimal policy. Afterwards, we analytically demonstrate that the structures of the age optimal and throughput-optimal policies are different. We also numerically demonstrate these structures as well as the impact of system design parameters on the optimal achievable average AoI.

  • 16.
    Abd-Elmagid, Mohamed A.
    et al.
    Virginia Tech, VA 24061 USA.
    Pappas, Nikolaos
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    Dhillon, Arpreet S.
    Virginia Tech, VA 24061 USA.
    On the Role of Age of Information in the Internet of Things2019In: IEEE Communications Magazine, ISSN 0163-6804, E-ISSN 1558-1896, Vol. 57, no 12, p. 72-77Article in journal (Refereed)
    Abstract [en]

    In this article, we provide an accessible introduction to the emerging idea of Age of Information (AoI) that quantifies freshness of information and explore its possible role in the efficient design of freshness-aware Internet of Things (IoT). We start by summarizing the concept of AoI and its variants with emphasis on the differences between AoI and other well-known performance metrics in the literature, such as throughput and delay. Building on this, we explore freshness-aware IoT design for a network in which IoT devices sense potentially different physical processes and are supposed to frequently update the status of these processes at a destination node (e.g., a cellular base station). Inspired by recent interest, we also assume that these IoT devices are powered by wireless energy transfer by the destination node. For this setting, we investigate the optimal sampling policy that jointly optimizes wireless energy transfer and scheduling of update packet transmissions from IoT devices with the goal of minimizing long-term weighted sum-AoI. Using this, we characterize the achievable AoI region. We also compare this AoI-optimal policy with the one that maximizes average throughput (throughput-optimal policy), and demonstrate the impact of system state on their structures. Several promising directions for future research are also presented.

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  • 17.
    Abdollahi Sani, Negar
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Robertsson, Mats
    Linköping University, Department of Science and Technology. Linköping University, The Institute of Technology.
    Cooper, Philip
    De La Rue Plc, Overton, Hampshire, UK .
    Wang, Xin
    Acreo AB, Norrköping, Sweden.
    Svensson, Magnus
    Acreo AB, Norrköping, Sweden.
    Andersson Ersman, Peter
    Acreo AB, Norrköping, Sweden.
    Norberg, Petronella
    Acreo AB, Norrköping, Sweden.
    Nilsson, Marie
    Acreo AB, Norrköping, Sweden.
    Nilsson, David
    Acreo AB, Norrköping, Sweden.
    Liu, Xianjie
    Linköping University, Department of Physics, Chemistry and Biology, Surface Physics and Chemistry. Linköping University, The Institute of Technology.
    Hesselbom, Hjalmar
    Hesselbom Innovation and Development HB, Huddinge, Sweden .
    Akesso, Laurent
    De La Rue Plc, Overton, Hampshire, UK .
    Fahlman, Mats
    Linköping University, Department of Physics, Chemistry and Biology, Surface Physics and Chemistry. Linköping University, The Institute of Technology.
    Crispin, Xavier
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Engquist, Isak
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Berggren, Magnus
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology. Acreo AB, Norrköping, Sweden.
    Gustafsson, Goran
    Acreo AB, Norrköping, Sweden.
    All-printed diode operating at 1.6 GHz2014In: Proceedings of the National Academy of Sciences of the United States of America, ISSN 0027-8424, E-ISSN 1091-6490, Vol. 111, no 33, p. 11943-11948Article in journal (Refereed)
    Abstract [en]

    Printed electronics are considered for wireless electronic tags and sensors within the future Internet-of-things (IoT) concept. As a consequence of the low charge carrier mobility of present printable organic and inorganic semiconductors, the operational frequency of printed rectifiers is not high enough to enable direct communication and powering between mobile phones and printed e-tags. Here, we report an all-printed diode operating up to 1.6 GHz. The device, based on two stacked layers of Si and NbSi2 particles, is manufactured on a flexible substrate at low temperature and in ambient atmosphere. The high charge carrier mobility of the Si microparticles allows device operation to occur in the charge injection-limited regime. The asymmetry of the oxide layers in the resulting device stack leads to rectification of tunneling current. Printed diodes were combined with antennas and electrochromic displays to form an all-printed e-tag. The harvested signal from a Global System for Mobile Communications mobile phone was used to update the display. Our findings demonstrate a new communication pathway for printed electronics within IoT applications.

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  • 18.
    Abdollahi Sani, Negar
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Wang, Xin
    Acreo Swedish ICT AB, Sweden.
    Granberg, Hjalmar
    INNVENTIA AB, Sweden.
    Andersson Ersman, Peter
    Acreo Swedish ICT AB, Sweden.
    Crispin, Xavier
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Dyreklev, Peter
    Acreo Swedish ICT AB, Sweden.
    Engquist, Isak
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Gustafsson, Göran
    Acreo Swedish ICT AB, Sweden.
    Berggren, Magnus
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Flexible Lamination-Fabricated Ultra-High Frequency Diodes Based on Self-Supporting Semiconducting Composite Film of Silicon Micro-Particles and Nano-Fibrillated Cellulose2016In: Scientific Reports, E-ISSN 2045-2322, Vol. 6, no 28921Article in journal (Refereed)
    Abstract [en]

    Low cost and flexible devices such as wearable electronics, e-labels and distributed sensors will make the future "internet of things" viable. To power and communicate with such systems, high frequency rectifiers are crucial components. We present a simple method to manufacture flexible diodes, operating at GHz frequencies, based on self-adhesive composite films of silicon micro-particles (Si-mu Ps) and glycerol dispersed in nanofibrillated cellulose (NFC). NFC, Si-mu Ps and glycerol are mixed in a water suspension, forming a self-supporting nanocellulose-silicon composite film after drying. This film is cut and laminated between a flexible pre-patterned Al bottom electrode and a conductive Ni-coated carbon tape top contact. A Schottky junction is established between the Al electrode and the Si-mu Ps. The resulting flexible diodes show current levels on the order of mA for an area of 2 mm(2), a current rectification ratio up to 4 x 10(3) between 1 and 2 V bias and a cut-off frequency of 1.8 GHz. Energy harvesting experiments have been demonstrated using resistors as the load at 900 MHz and 1.8 GHz. The diode stack can be delaminated away from the Al electrode and then later on be transferred and reconfigured to another substrate. This provides us with reconfigurable GHz-operating diode circuits.

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  • 19.
    Abdul Aziz Hasan Ali, Aamir
    et al.
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Shahzad, Muhammad Adil
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    A Joint Subcarrier/Power allocation Scheme for OFDMA-based Cellular Networks2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The assignment of this master thesis consists of initiating power, subcarrier allocation in a dynamic FFR based scheme designed for multi-cell OFDMA networks and to enhance the throughput of all center users in bandwidth hungry borrower cells (overloaded cells) which was previously degraded by original FFR3 scheme as a result of partitioning of system bandwidth into center and edge bands respectively. The method uses band borrowing to compensate center user’s throughput loss in a semi and fully overloaded system. The scheme uses dynamic programming method (0/1 knapsack problem) to bargain an edge band on various power levels and tends to check the best combination (power and sub-carrier) which the system can utilize while still maintaining acceptable throughput loss for the users at the edge of the neighboring cell (lender cell).

    The algorithm consists of generating a borrowing request to neighboring cells for utilizing their edge bands by the overloaded borrower cell if their average center user throughput reaches below a minimum threshold value set in the system. The borrowing method uses 0/1 knapsack problem to capture an edge band based on limiting factors of total cost in average throughput losses by neighbors (Ci) and Un (tolerable mean user edge user throughput loss by lending cell). While solving knapsack problem the lender (neighbors) will check Ci and Un before granting the right to use its edge band. The later stage requires reducing subcarrier power level in order to utilize the lenders edge band using "soft borrower" mode. The borrowed sub-carriers will be activated take power from the original center band sub-carriers of the overloaded cell by taking into account the interference between the lender and the borrower. In case of negative (0) reply from the lender cell after the first request, multiple requests are generated at reduce power level at every step to order to acquire more bands. If a neighbor has band borrowing requests from multiple overloaded base stations, the band will be granted to the one which gives minimal loss in terms of throughput to the lender cell.

    The simulation results are analyzed w.r.t reuse-1 and FFR3 scheme of a multi cell regular and irregular scenarios comprising of lightly to heavily overloaded cells with various subcarrier allocation patterns. An overhead and time assessment is also presented between borrower and lender cells. Simulation results show an increase of 60% in center user’s throughput w.r.t original FFR3 scheme with an acceptable loss of 18% at the edges in complex overloaded scenarios while the overall system throughout increases by 35%.

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  • 20.
    Abdul Nazar, Mohamed
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Design of a Gysel Combiner at 100 MHz2019Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis relates to the design and implementation of a Gysel power combiner consisting of two input ports. The design is implemented using discrete (lumped) components over the conventional transmission line architecture and operates at 100 MHz. Because of the high power requirements for the power combiner, special attention is given to the power handling capabilities of the lumped elements and the other components involved. Simulations of an S-parameter of Gysel power combiner are performed using the Advanced Design System (ADS) from Keysight Technologies. The final design of two-way Gysel power combiner using PCB toroidal inductor was implemented, simulated and optimized at centre frequency of 100 MHz. Satisfactory results were obtained in terms of Insertion loss, Return loss and Port Isolation.

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    Design of a Gysel Combiner at 100 MHz
  • 21.
    Aberger, Martin
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Effects of Nonlinearities in Black Box Identification of an Industrial Robot2000Report (Other academic)
    Abstract [en]

    This paper discusses effects of nonlinearities in black box identification of one axis of a robot. The used data come from a commercial ABB robot, IRB1400. A three-mass flexible model for the robot was built in MathModelica. The nonlinearities in the model are nonlinear friction and backlash in the gear box.

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  • 22.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Direct proof of security of Wegman-Carter authentication with partially known key2014In: Quantum Information Processing, ISSN 1570-0755, E-ISSN 1573-1332, Vol. 13, no 10, p. 2155-2170Article in journal (Refereed)
    Abstract [en]

    Information-theoretically secure (ITS) authentication is needed in Quantum Key Distribution (QKD). In this paper, we study security of an ITS authentication scheme proposed by Wegman& Carter, in the case of partially known authentication key. This scheme uses a new authentication key in each authentication attempt, to select a hash function from an Almost Strongly Universal2 hash function family. The partial knowledge of the attacker is measured as the trace distance between the authentication key distribution and the uniform distribution; this is the usual measure in QKD. We provide direct proofs of security of the scheme, when using partially known key, first in the information-theoretic setting and then in terms of witness indistinguishability as used in the Universal Composability (UC) framework. We find that if the authentication procedure has a failure probability ε and the authentication key has an ε´ trace distance to the uniform, then under ITS, the adversary’s success probability conditioned on an authentic message-tag pair is only bounded by ε +|Ƭ|ε´, where |Ƭ| is the size of the set of tags. Furthermore, the trace distance between the authentication key distribution and the uniform increases to |Ƭ|ε´ after having seen an authentic message-tag pair. Despite this, we are able to prove directly that the authenticated channel is indistinguishable from an (ideal) authentic channel (the desired functionality), except with probability less than ε + ε´. This proves that the scheme is (ε + ε´)-UC-secure, without using the composability theorem.

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  • 23.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding.
    New Universal Hash Functions2012In: Lecture Notes in Computer Science, Vol. 7242 / [ed] Frederik Armknecht and Stefan Lucks, Springer Berlin Heidelberg , 2012, p. 99-108Conference paper (Refereed)
    Abstract [en]

    Universal hash functions are important building blocks for unconditionally secure message authentication codes. In this paper, we present a new construction of a class of Almost Strongly Universal hash functions with much smaller description (or key) length than the Wegman-Carter construction. Unlike some other constructions, our new construction has a very short key length and a security parameter that is independent of the message length, which makes it suitable for authentication in practical applications such as Quantum Cryptography.

  • 24.
    Abrahamsson, Henrik
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering.
    Carlson, Peter
    Linköping University, The Institute of Technology.
    Robust Torque Control for Automated Gear Shifting in Heavy Duty Vehicles2008Independent thesis Advanced level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    In an automated manual transmission it is desired to have zero torque in the transmission when disengaging a gear. This minimizes the oscillations in the driveline which increases the comfort and makes the speed synchronization easier. The automated manual transmission system in a Scania truck, called Opticruise, uses engine torque control to achieve zero torque in the transmission.In this thesis different control strategies for engine torque control are proposed in order to minimize the oscillations in the driveline and increase the comfort during a gear shift. A model of the driveline is developed in order to evaluate the control strategies. The main focus was to develop controllers that are easy to implement and that are robust enough to be used in different driveline configurations. This means that model dependent control strategies are not considered.A control strategy with a combination of a feedback from the speed difference between the output shaft speed and the wheel speed, and a feedforward with a linear ramp, showed very good performance in both simulations and tests in trucks. The amplitude of the oscillations in the output shaft speed after neutralengagement are halved compared to the results from the existing method in Scania trucks. The new concept is also more robust against initial conditions and time delay estimations.

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  • 25.
    Abrahamsson, Johan
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Loop impedance measurement tool2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This master´s thesis presents a prototype of a hand-held measurement tool used to measure the loop impedance of ground loops using two current probes. This tool allows the user to find bad shield connections in a system without disconnecting the shielded cables. The thesis explains the theory behind the measurement method, hardware requirements and design, how the software works and a demonstration of the implemented graphical user interface. The tool is powered by a two-cell lithium-ion battery and has an integrated battery charger with cell balancing.

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  • 26.
    Abrahamsson, Olle
    et al.
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    Danev, Danyo
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    Larsson, Erik G
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    Structural Balance Considerations for Networks with Preference Orders as Node Attributes2022In: 2022 56TH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS, AND COMPUTERS, IEEE , 2022, p. 1255-1261Conference paper (Refereed)
    Abstract [en]

    We discuss possible definitions of structural balance conditions in a network with preference orderings as node attributes. The main result is that for the case with three alternatives (A, B, C) we reduce the (3!)(3) = 216 possible configurations of triangles to 10 equivalence classes, and use these as measures of balance of a triangle towards possible extensions of structural balance theory. Moreover, we derive a general formula for the number of equivalent classes for preferences on n alternatives. Finally, we analyze a real-world data set and compare its empirical distribution of triangle equivalence classes to a null hypothesis in which preferences are randomly assigned to the nodes.

  • 27.
    Abrahamsson, Per
    Linköping University, Department of Electrical Engineering.
    Combined Platform for Boost Guidance and Attitude Control for Sounding Rockets2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This report handles the preliminary design of a control system that includes both attitude control and boost control functionality for sounding rockets. This is done to reduce the weight and volume for the control system.

    A sounding rocket is a small rocket compared to a satellite launcher. It is used to launch payloads into suborbital trajectories. The payload consists of scientific experiments, for example micro-gravity experiments and astronomic observations. The boost guidance system controls the sounding rocket during the launch phase. This is done to minimize the impact dispersion. The attitude control system controls the payload during the experiment phase.

    The system that is developed in this report is based on the DS19 boost guidance system from Saab Ericsson Space AB. The new system is designed by extending DS19 with software and hardware. The new system is therefore named DS19+. Hardware wise a study of the mechanical and electrical interfaces and also of the system budgets for gas, mass and power for the system are done to determine the feasibility for the combined system.

    Further a preliminary design of the control software is done. The design has been implemented as pseudo code in MATLAB for testing and simulations. A simulation model for the sounding rocket andits surroundings during the experiment phase has also been designed and implemented in MATLAB. The tests and simulations that have been performed show that the code is suitable for implementation in the real system.

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  • 28.
    Abrahamsson, Robin
    et al.
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Kovalev, Anton
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Lindell, Johan
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Lövhall, Jakob
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Nordfors, Per
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Rydström, Simon
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Stoltz, Robert
    Linköping University, Department of Computer and Information Science. Linköping University, The Institute of Technology.
    Utveckling av energioptimeringsprogrammet Humble: erfarenheter från projekt i programvaruutveckling2014Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesis
    Abstract [sv]

    Den här rapporten behandlar ett kandidatarbete som utfördes mot Institutionen för ekonomisk och industriell utveckling. Arbetet gick ut på att modernisera det existerande programmet MODEST som använts för att beräkna optimala energisystem. Moderniseringen gjordes genom att skapa programmet Humble, vars funktionalitet bygger på MODEST.

    I den här rapporten beskrivs hur program kan utvecklas för att de ska vara enkla att använda, samt hur de kan konstrueras för att möjliggöra vidareutveckling. Dessa aspekter framställdes av kunden som viktiga i projektet.

    Gruppens tillvägagångssätt för att utveckla programmet förklaras och en överskådlig bild över den arkitektur som använts ges. De erfarenheter som gruppen förskaffat sig under projektet beskrivs och reflekteras över. Detta gäller såväl tekniska erfarenheter som erfarenheter kopplade till projektprocessen. Gruppmedlemmarnas personliga erfarenheter kopplade till de roller de haft i projektet beskrivs i individuellt skrivna delar.

    Slutligen diskuteras projektet och hur resultatet har uppnåtts, varefter slutsatser kopplade till frågeställningarna dras. Dessa slutsatser är att prototypning och användbarhetstester är effektiva metoder för att skapa program som är enkla att använda, samt att program som tillämpar tydligt dokumenterade designmönster och är modulärt uppbyggda möjliggör vidareutveckling.

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  • 29.
    Abrahamsson, Sebastian
    et al.
    Linköping University, Department of Electrical Engineering.
    Råbe, Markus
    Linköping University, Department of Electrical Engineering.
    An FPGA implementation of a modulator for digital terrestrial television according to the DTMB standard2010Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The increasing data rates in digital television networks increase the demands on data capacity of the current transmission channels. Through new standards, the capacity of exisiting channels is increased with new methods of error correction coding and modulation.

    This thesis presents the design and implementation of a modulator for transmission of digital terrestrial television according to the Chinese DTMB standard.

    The system is written in VHDL and is intended for implementation on an FPGA.

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  • 30.
    Abrahamsson, Thomas
    et al.
    Saab Military Aircraft, Sweden.
    Andersson, Magnus
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    McKelvey, Tomas
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    A Finite Element Model Updating Formulation Using Frequency Responses and Eigenfrequencies1996Report (Other academic)
    Abstract [en]

    A novel frequency and modal domain formulation of the model updating problem is presented. Deviations in discrete frequency responses and eigenfrequencies, between the model to be updated and a reference model, constitute the criterion function. A successful updating thus results in a model with the reference's input-output relations at selected fre- quencies. The formulation is demonstrated to produce a criterion function with a global minimum having a large domain of attraction with respect to stiffness and mass variations. The method relies on mode grouping and uses a new extended modal assurance criterion number (eMAC) for identifying related modes. A quadratic objective with inexpensive evaluation of approximate Hessians give a rapid convergence to a minimum by the use of a regularized Gauss-Newton method. Physical bounds on parameters and complementary data, such as structural weight, are treated by imposing set constraints and linear equality constraints. Efficient function computation is obtained by model reduction using a moderately sized base of modes which is recomputed during the minimization. Statistical properties of updated parameters are discussed. A verification example show the performance of the method.

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  • 31.
    Abrahamsson, Tomas
    et al.
    Saab Military Aircraft, Sweden.
    McKelvey, Tomas
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Ljung, Lennart
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    A Study of some Approaches to Vibration Data Analysis1993Report (Other academic)
    Abstract [en]

    Using data from extensive vibrational tests of the new aircraft Saab 2000 three different methods for vibration analysis are studied. These methods are ERA (eigensystem realization algorithm), N4SID (a subspace method) and PEM (prediction error approach). We find that both the ERA and N4SID methods give good initial model parameter estimates that can be further improved by the use of PEM. We also find that all methods give good insights into the vibrational modes.

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  • 32.
    Abrikosov, Igor
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Theoretical Physics. Linköping University, Faculty of Science & Engineering. National University of Science and Technology MISIS, Russia.
    Ponomareva, A. V.
    National University of Science and Technology MISIS, Russia.
    Steneteg, Peter
    Linköping University, Department of Science and Technology, Media and Information Technology. Linköping University, Faculty of Science & Engineering.
    Barannikova, S. A.
    National University of Science and Technology MISIS, Russia; National Research Tomsk State University, Russia; SB RAS, Russia.
    Alling, Björn
    Linköping University, Department of Physics, Chemistry and Biology, Thin Film Physics. Linköping University, Faculty of Science & Engineering.
    Recent progress in simulations of the paramagnetic state of magnetic materials2016In: Current opinion in solid state & materials science, ISSN 1359-0286, E-ISSN 1879-0348, Vol. 20, no 2, p. 85-106Article, review/survey (Refereed)
    Abstract [en]

    We review recent developments in the field of first-principles simulations of magnetic materials above the magnetic order disorder transition temperature, focusing mainly on 3d-transition metals, their alloys and compounds. We review theoretical tools, which allow for a description of a system with local moments, which survive, but become disordered in the paramagnetic state, focusing on their advantages and limitations. We discuss applications of these theories for calculations of thermodynamic and mechanical properties of paramagnetic materials. The presented examples include, among others, simulations of phase stability of Fe, Fe-Cr and Fe-Mn alloys, formation energies of vacancies, substitutional and interstitial impurities, as well as their interactions in Fe, calculations of equations of state and elastic moduli for 3d-transition metal alloys and compounds, like CrN and steels. The examples underline the need for a proper treatment of magnetic disorder in these systems. (C) 2015 Elsevier Ltd. All rights reserved.

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  • 33.
    Abualigah, Laith
    et al.
    Al al Bayt Univ, Jordan; Al Ahliyya Amman Univ, Jordan; Lebanese Amer Univ, Lebanon; Middle East Univ, Jordan; Appl Sci Private Univ, Jordan; Univ Sains Malaysia, Malaysia; Sunway Univ Malaysia, Malaysia.
    Oliva, Diego
    Univ Guadalajara, Mexico.
    Jia, Heming
    Sanming Univ, Peoples R China.
    Gul, Faiza
    Air Univ, Pakistan.
    Khodadadi, Nima
    Florida Int Univ, FL USA.
    Hussien, Abdelazim
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering. Fayoum Univ, Egypt.
    Al Shinwan, Mohammad
    Appl Sci Private Univ, Jordan.
    Ezugwu, Absalom E.
    North West Univ, South Africa.
    Abuhaija, Belal
    Wenzhou Kean Univ, Peoples R China.
    Abu Zitar, Raed
    Sorbonne Univ Abu Dhabi, U Arab Emirates.
    Improved prairie dog optimization algorithm by dwarf mongoose optimization algorithm for optimization problems2023In: Multimedia tools and applications, ISSN 1380-7501, E-ISSN 1573-7721Article in journal (Refereed)
    Abstract [en]

    Recently, optimization problems have been revised in many domains, and they need powerful search methods to address them. In this paper, a novel hybrid optimization algorithm is proposed to solve various benchmark functions, which is called IPDOA. The proposed method is based on enhancing the search process of the Prairie Dog Optimization Algorithm (PDOA) by using the primary updating mechanism of the Dwarf Mongoose Optimization Algorithm (DMOA). The main aim of the proposed IPDOA is to avoid the main weaknesses of the original methods; these weaknesses are poor convergence ability, the imbalance between the search process, and premature convergence. Experiments are conducted on 23 standard benchmark functions, and the results are compared with similar methods from the literature. The results are recorded in terms of the best, worst, and average fitness function, showing that the proposed method is more vital to deal with various problems than other methods.

  • 34.
    Acevedo, Miguel
    Linköping University, Department of Electrical Engineering, Computer Engineering.
    FPGA-Based Hardware-In-the-Loop Co-Simulator Platform for SystemModeler2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis proposes and implements a flexible platform to perform Hardware-In-the-Loop (HIL) co-simulation using a Field-Programmable-Gate-Array (FPGA). The HIL simulations are performed with SystemModeler working as a software simulator and the FPGA as the co-simulator platform for the digital hardware design. The work presented in this thesis consists of the creation of: A communication library in the host computer, a system in the FPGA that allows implementation of different digital designs with varying architectures, and an interface between the host computer and the FPGA to transmit the data. The efficiency of the proposed system is studied with the implementation of two common digital hardware designs, a PID controller and a filter. The results of the HIL simulations of those two hardware designs are used to verify the platform and measure the timing and area performance of the proposed HIL platform.

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  • 35.
    Acsintoae, Andra
    et al.
    Univ Bucharest, Romania.
    Florescu, Andrei
    Univ Bucharest, Romania.
    Georgescu, Mariana-Iuliana
    Univ Bucharest, Romania; MBZ Univ Artificial Intelligence, U Arab Emirates; SecurifAI, Romania.
    Mare, Tudor
    SecurifAI, Romania.
    Sumedrea, Paul
    Univ Bucharest, Romania.
    Ionescu, Radu Tudor
    Univ Bucharest, Romania; SecurifAI, Romania.
    Khan, Fahad
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, Faculty of Science & Engineering. MBZ Univ Artificial Intelligence, U Arab Emirates.
    Shah, Mubarak
    Univ Cent Florida, FL 32816 USA.
    UBnormal: New Benchmark for Supervised Open-Set Video Anomaly Detection2022In: 2022 IEEE/CVF CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION (CVPR 2022), IEEE COMPUTER SOC , 2022, p. 20111-20121Conference paper (Refereed)
    Abstract [en]

    Detecting abnormal events in video is commonly framed as a one-class classification task, where training videos contain only normal events, while test videos encompass both normal and abnormal events. In this scenario, anomaly detection is an open-set problem. However, some studies assimilate anomaly detection to action recognition. This is a closed-set scenario that fails to test the capability of systems at detecting new anomaly types. To this end, we propose UBnormal, a new supervised open-set benchmark composed of multiple virtual scenes for video anomaly detection. Unlike existing data sets, we introduce abnormal events annotated at the pixel level at training time, for the first time enabling the use of fully-supervised learning methods for abnormal event detection. To preserve the typical open-set formulation, we make sure to include dis-joint sets of anomaly types in our training and test collections of videos. To our knowledge, UBnormal is the first video anomaly detection benchmark to allow a fair head-to-head comparison between one-class open-set models and supervised closed-set models, as shown in our experiments. Moreover, we provide empirical evidence showing that UB-normal can enhance the performance of a state-of-the-art anomaly detection framework on two prominent data sets, Avenue and ShanghaiTech. Our benchmark is freely available at https://github.com/lilygeorgescu/UBnormal.

  • 36.
    Adam, Wettring
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Adaptive Filtering and Nonlinear Models for Post-processing of Weather Forecasts2015Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Kalman filters have been used by SMHI to improve the quality of their forecasts. Until now they have used a linear underlying model to do this. In this thesis it is investigated whether the performance can be improved by the use of nonlinear models such as polynomials and neural networks. The results suggest that an improvement is hard to achieve by this approach and that it is likely not worth the effort to implement a nonlinear model.

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  • 37.
    Adhikarla, Sridhar
    Linköping University, Department of Computer and Information Science. Linköping University, Faculty of Arts and Sciences.
    Automated Bug Classification.: Bug Report Routing2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    With the growing software technologies companies tend to develop automated solutions to save time and money. Automated solutions have seen tremendous growth in the software industry and have benefited from extensive machine learning research. Although extensive research has been done in the area of automated bug classification, with the new data being collected, more precise methods are yet to be developed. An automated bug classifier will process the content of the bug report and assign it to the person or department that would fix the problem.

    A bug report typically contains an unstructured text field where the problem is described in detail. A lot of research regarding information extraction from such text fields has been done. This thesis uses a topic modeling technique, Latent Dirichlet Allocation (LDA), and a numerical statistic Term Frequency - Inverse Document Frequency (TF-IDF), to generate two different features from the unstructured text fields of the bug report. A third set of features was created by concatenating the TF-IDF and the LDA features. The class distribution of the data used in this thesis changes over time. To explore if time has an impact on the prediction, the age of the bug report was introduced as a feature. The importance of this feature, when used along with the LDA and TF-IDF features, was also explored in this thesis.

    These generated feature vectors were used as predictors to train three different classification models; multinomial logistic regression, dense neural networks, and DO-probit. The prediction of the classifiers, for the correct department to handle a bug, was evaluated on the accuracy and the F1-score of the prediction. For comparison, the predictions from a Support Vector Machine (SVM) using a linear kernel was treated as the baseline.

    The best results for the multinomial logistic regression and the dense neural networks classifiers were obtained when the TF-IDF features of the bug reports were used as predictors. Among the three classifiers trained the dense neural network had the best performance, though the classifier was not able to perform better than the SVM baseline. Using age as a feature did not give a significant improvement in the predictive performance of the classifiers, but was able to identify some interesting patterns in the data. Further research on other ways of using the age of the bug reports could be promising.

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  • 38.
    Adib Yaghmaie, Farnaz
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Gunnarsson, Svante
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    A New Result on Robust Adaptive Dynamic Programming for Uncertain Partially Linear Systems2019In: 2019 IEEE 58TH CONFERENCE ON DECISION AND CONTROL (CDC), IEEE , 2019, p. 7480-7485Conference paper (Refereed)
    Abstract [en]

    In this paper, we present a new result on robust adaptive dynamic programming for the Linear Quadratic Regulation (LQR) problem, where the linear system is subject to unmatched uncertainty. We assume that the states of the linear system are fully measurable and the matched uncertainty models unmeasurable states with an unspecified dimension. We use the small-gain theorem to give a sufficient condition such that the generated policies in each iteration of on-policy and off-policy routines guarantee robust stability of the overall uncertain system. The sufficient condition can be used to design the weighting matrices in the LQR problem. We use a simulation example to demonstrate the result.

  • 39.
    Adib Yaghmaie, Farnaz
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Gunnarsson, Svante
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Lewis, Frank L.
    Univ Texas Arlington, TX 76019 USA; Northeastern Univ, Peoples R China.
    Output regulation of unknown linear systems using average cost reinforcement learning2019In: Automatica, ISSN 0005-1098, E-ISSN 1873-2836, Vol. 110, article id 108549Article in journal (Refereed)
    Abstract [en]

    In this paper, we introduce an optimal average cost learning framework to solve output regulation problem for linear systems with unknown dynamics. Our optimal framework aims to design the controller to achieve output tracking and disturbance rejection while minimizing the average cost. We derive the Hamilton-Jacobi-Bellman (HJB) equation for the optimal average cost problem and develop a reinforcement algorithm to solve it. Our proposed algorithm is an off-policy routine which learns the optimal average cost solution completely model-free. We rigorously analyze the convergence of the proposed algorithm. Compared to previous approaches for optimal tracking controller design, we elevate the need for judicious selection of the discounting factor and the proposed algorithm can be implemented completely model-free. We support our theoretical results with a simulation example. (C) 2019 Elsevier Ltd. All rights reserved.

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  • 40.
    Adib Yaghmaie, Farnaz
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Gustafsson, Fredrik
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Using Reinforcement Learning for Model-free Linear Quadratic Control with Process and Measurement Noises2019In: 2019 IEEE 58TH CONFERENCE ON DECISION AND CONTROL (CDC), IEEE , 2019, p. 6510-6517Conference paper (Refereed)
    Abstract [en]

    In this paper, we analyze a Linear Quadratic (LQ) control problem in terms of the average cost and the structure of the value function. We develop a completely model-free reinforcement learning algorithm to solve the LQ problem. Our algorithm is an off-policy routine where each policy is greedy with respect to all previous value functions. We prove that the algorithm produces stable policies given that the estimation errors remain small. Empirically, our algorithm outperforms the classical Q and off-policy learning routines.

  • 41.
    Adib Yaghmaie, Farnaz
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Gustafsson, Fredrik
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Ljung, Lennart
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Linear Quadratic Control Using Model-Free Reinforcement Learning2023In: IEEE Transactions on Automatic Control, ISSN 0018-9286, E-ISSN 1558-2523, Vol. 68, no 2, p. 737-752Article in journal (Refereed)
    Abstract [en]

    In this article, we consider linear quadratic (LQ) control problem with process and measurement noises. We analyze the LQ problem in terms of the average cost and the structure of the value function. We assume that the dynamics of the linear system is unknown and only noisy measurements of the state variable are available. Using noisy measurements of the state variable, we propose two model-free iterative algorithms to solve the LQ problem. The proposed algorithms are variants of policy iteration routine where the policy is greedy with respect to the average of all previous iterations. We rigorously analyze the properties of the proposed algorithms, including stability of the generated controllers and convergence. We analyze the effect of measurement noise on the performance of the proposed algorithms, the classical off-policy, and the classical Q-learning routines. We also investigate a model-building approach, inspired by adaptive control, where a model of the dynamical system is estimated and the optimal control problem is solved assuming that the estimated model is the true model. We use a benchmark to evaluate and compare our proposed algorithms with the classical off-policy, the classical Q-learning, and the policy gradient. We show that our model-building approach performs nearly identical to the analytical solution and our proposed policy iteration based algorithms outperform the classical off-policy and the classical Q-learning algorithms on this benchmark but do not outperform the model-building approach.

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  • 42.
    Adib Yaghmaie, Farnaz
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Modares, Hamidreza
    Michigan State University, USA.
    Online Optimal Tracking of Linear Systems with Adversarial Disturbances2023In: Transactions on Machine Learning Research, E-ISSN 2835-8856, no 04Article in journal (Refereed)
    Abstract [en]

    This paper presents a memory-augmented control solution to the optimal reference tracking problem for linear systems subject to adversarial disturbances. We assume that the dynamics of the linear system are known and that the reference signal is generated by a linear system with unknown dynamics. Under these assumptions, finding the optimal tracking controller is formalized as an online convex optimization problem that leverages memory of past disturbance and reference values to capture their temporal effects on the performance. That is, a (disturbance, reference)-action control policy is formalized, which selects the control actions as a linear map of the past disturbance and reference values. The online convex optimization is then formulated over the parameters of the policy on its past disturbance and reference values to optimize general convex costs. It is shown that our approach outperforms robust control methods and achieves a tight regret bound O(√T) where in our regret analysis, we have benchmarked against the best linear policy.

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  • 43.
    Adolfsson, Henrik
    Linköping University, Department of Computer and Information Science, Database and information techniques.
    Comparison of Auto-Scaling Policies Using Docker Swarm2019Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    When deploying software engineering applications in the cloud there are two similar software components used. These are Virtual Machines and Containers. In recent years containers have seen an increase in popularity and usage, in part because of tools such as Docker and Kubernetes. Virtual Machines (VM) have also seen an increase in usage as more companies move to solutions in the cloud with services like Amazon Web Services, Google Compute Engine, Microsoft Azure and DigitalOcean. There are also some solutions using auto-scaling, a technique where VMs are commisioned and deployed to as load increases in order to increase application performace. As the application load decreases VMs are decommisioned to reduce costs.

    In this thesis we implement and evaluate auto-scaling policies that use both Virtual Machines and Containers. We compare four different policies, including two baseline policies. For the non-baseline policies we define a policy where we use a single Container for every Virtual Machine and a policy where we use several Containers per Virtual Machine. To compare the policies we deploy an image serving application and run workloads to test them. We find that the choice of deployment strategy and policy matters for response time and error rate. We also find that deploying applications as described in the methodis estimated to take roughly 2 to 3 minutes.

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  • 44.
    Adén, Sebastian
    Linköping University, Department of Electrical Engineering, Vehicular Systems. Linköping University, The Institute of Technology.
    Modellbaserad diagnostik tillämpad för hydrauliska applikationer2013Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [sv]

    I en globaliserad värld där produktägare finner sina produkter på alltmer avslägsna platser, ökar behovet av att på ett så ekonomiskt och tidseffektivt sätt som möjligt, utföra reperationer och underhållningsarbeten. Att erbjuda en stark och mer effektiv eftermarknadssupport kan öka företagens konkurrenskraft och framför allt göra dem kostnadseffektiva med avseende på lägre bemanningsstyrka. Ett sätt att underlätta underhållningsarbetet är genom att använda modellbaserad diagnos för att generera underlag vid exempelvis reperationsarbeten.

    Denna rapport undersöker möjligheterna att utifrån en modell av en hydraulisk applikation, utföra autogenererad diagnostik bland annat iform av felträdsanalys.

    Innehållet i rapporten beskriver även hur modelleringsarbetet har gått till och utveckling av modellens ingående komponenter.

    Examensarbetet är utfört på Combitech AB, Linköping. 

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  • 45.
    Afsarinejad, Arash
    Linköping University, Department of Electrical Engineering.
    Synkronisering med SyncML2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The last couple of years the use of mobile devices such as mobile phones and PDAs has increased tremendously. Most of the these devices have their own protocols for synchronising data and this has given rise to a need for a standard synchronisation protocol, SyncML. This thesis compares this protocol against the existing ones. The comparison shows that the preferred choice is SyncML.

    Also an application using SyncML has been developed. The application's task is to synchronise the calendar on a mobile phone with a database on a computer.

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  • 46. Order onlineBuy this publication >>
    Afzal, Nadeem
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Complexity and Power Reduction in Digital Delta-Sigma Modulators2014Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    A number of state-of-the-art low power consuming digital delta-sigma modulator (ΔΣ) architectures for digital-to-analog converters (DAC) are presented in this thesis. In an oversampling ΔΣ DAC, the primary job of the modulator is to reduce the word length of the digital control signal to the DAC and spectrally shape the resulting quantization noise. Among the ΔΣ topologies, error-feedback modulators (EFM) are well suited for so called digital to digital modulation.

    In order to meet the demands, various modifications to the conventional EFM architectures have been proposed. It is observed that if the internal and external digital signals of the EFM are not properly scaled then not only the design itself but also the signal processing blocks placed after it, may be over designed. In order to avoid the possible wastage of resources, a number of scaling criteria are derived. In this regard, the total number of signal levels of the EFM output is expressed in terms of the input scale, the order of modulation and the type of the loop filter.

    Further on, it is described that the architectural properties of a unit element-based DAC allow us to move some of the digital processing of the EFM to the analog domain with no additional hardware cost. In order to exploit the architectural properties, digital circuitry of an arbitrary-ordered EFM is split into two parts: one producing the modulated output and another producing the filtered quantization noise. The part producing the modulated output is removed after representing the EFM output with a set of encoded signals. For both the conventional and the proposed EFM architectures, the DAC structure remains unchanged. Thus, savings are obtained since the bits to be converted are not accumulated in the digital domain but instead fed directly to the DAC.

    A strategy to reduce the hardware of conventional EFMs has been devised recently that uses multiple cascaded EFM units. We applied the similar approach but used several cascaded modified EFM units. The compatibility issues among the units (since the output of each proposed EFM is represented by the set of encoded signals) are resolved by a number of architectural modifications. The digital processing is distributed among each unit by splitting the primary input bus. It is shown that instead of cascading the EFM units, it is enough to cascade their loop filters only. This leads not only to area reduction but also to the reduction of power consumption and critical path.

    All of the designs are subjected to rigorous analysis and are described mathematically. The estimates of area and power consumption are obtained after synthesizing the designs in a 65 nm standard cell library provided by the foundry.

    List of papers
    1. Power efficient arrangement of oversampling sigma-delta DAC
    Open this publication in new window or tab >>Power efficient arrangement of oversampling sigma-delta DAC
    2012 (English)In: NORCHIP, 2012, IEEE , 2012, p. 1-4Conference paper, Published paper (Refereed)
    Abstract [en]

    A hardware efficient arrangement of digital-to-analog conversion blocks is presented by segmenting digital-to-analog converter (DAC). This segmenting of DAC is done by using buss-split design of digital sigma-delta modulator (DSDM). The reduction in the word length of input to both DSDM and DAC is analyzed with respect to performance because the input word length decides the complexity of these components. We show that effective performance can be achieved from the presented hardware efficient arrangement. All conclusions are drawn based on theory and simulations.

    Place, publisher, year, edition, pages
    IEEE, 2012
    Keywords
    digital-analogue conversion;sigma-delta modulation;DSDM;buss-split design;digital sigma-delta modulator;digital-to-analog conversion blocks;hardware efficient arrangement;oversampling sigma-delta DAC;power efficient arrangement;Complexity theory;Hardware;Modulation;Quantization;Sigma delta modulation;Signal to noise ratio;DAC complexity;Digital sigma-delta modulator;bit-split;composite architecture;modulator’s complexity;noise shaping
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112892 (URN)10.1109/NORCHP.2012.6403119 (DOI)978-1-4673-2221-8 (ISBN)978-1-4673-2222-5 (ISBN)
    Conference
    2012 NORCHIP, November 12-14, Copenhagen, Denmark
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2018-11-08Bibliographically approved
    2. Reducing Complexity and Power of Digital Multibit Error-Feedback Delta Sigma Modulators
    Open this publication in new window or tab >>Reducing Complexity and Power of Digital Multibit Error-Feedback Delta Sigma Modulators
    2014 (English)In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 61, no 9, p. 641-645Article in journal (Refereed) Published
    Abstract [en]

    In this brief, we propose how the hardware complexity of arbitrary-order digital multibit error-feedback delta-sigma modulators can be reduced. This is achieved by splitting the combinatorial circuitry of the modulators into two parts, i.e., one producing the modulator output and another producing the error signal fed back. The part producing modulator output is removed by utilizing a unit-element-based digital-to-analog converter. To illustrate the reduced complexity and power consumption, we compare the synthesized results with those of conventional structures. Fourth-order modulators implemented with the proposed technique use up to 26% less area compared with conventional implementations. Due to the area reduction, the designs consume up to 33% less dynamic power. Furthermore, it can operate at a frequency 100 MHz higher than that of the conventional.

    Place, publisher, year, edition, pages
    Institute of Electrical and Electronics Engineers (IEEE), 2014
    Keywords
    Delta-sigma (Delta Sigma); error-feedback multibit modulator; oversampling digital-to-analog converter
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-111264 (URN)10.1109/TCSII.2014.2331105 (DOI)000341985600001 ()
    Available from: 2014-10-15 Created: 2014-10-14 Last updated: 2018-11-08Bibliographically approved
    3. On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators
    Open this publication in new window or tab >>On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators
    2012 (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In order to determine a maximum allowed input scale for the stable operation of higher-order delta-sigma modulators, the designers largely depend on the analytical and numerical analysis. In this brief, the maximum allowed input scale to a multi-bit digital error-feedback  deltasigma modulator of arbitrary order is derived, mathematically. The digital modulator with an arbitrary output word length is stable if its output does not overflow. Thus, to avoid overflow of the modulator output, the relations between the peak values of the involved digital signals are devised. A number of example configurations are presented to illustrate the usefulness of the derivations.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112895 (URN)
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2018-11-08Bibliographically approved
    4. Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption
    Open this publication in new window or tab >>Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption
    2012 (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    The hardware of the multi-bit digital error feedback modulator (EFM) of arbitrary order has recently been reduced by using multiple EFMs in cascade. In this paper, a modified cascading strategy is devised. Parts of the processing of consecutively placed EFM stages are merged such that a significant amount of circuitry is removed in each stage. In the proposed design, the modulated output is represented by a set of encoded signals to be used by the signal processing block placed after the EFM.

    To illustrate the savings, a number of configurations of fourth-order EFM designs, composed of two- and three-cascaded stages, have been synthesized in a 65 nm CMOS process technology using conventional and the proposed implementation techniques. Savings of 52.7% and 47%, in terms of area and power consumption, respectively, at an oversampling ratio of 4 could be obtain. The trade-off between sampling frequency and hardware cost is also presented. Due to reduced hardware an increase of up to 600 MHz in the sampling frequency is achieved.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112896 (URN)
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2018-11-08Bibliographically approved
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  • 47.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators2012Manuscript (preprint) (Other academic)
    Abstract [en]

    In order to determine a maximum allowed input scale for the stable operation of higher-order delta-sigma modulators, the designers largely depend on the analytical and numerical analysis. In this brief, the maximum allowed input scale to a multi-bit digital error-feedback  deltasigma modulator of arbitrary order is derived, mathematically. The digital modulator with an arbitrary output word length is stable if its output does not overflow. Thus, to avoid overflow of the modulator output, the relations between the peak values of the involved digital signals are devised. A number of example configurations are presented to illustrate the usefulness of the derivations.

  • 48.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Sadeghifar, Reza
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A study on power consumption of modified noise-shaper architectures for Sigma-Delta DACs2011In: Circuit Theory and Design (ECCTD), 2011, IEEE , 2011, p. 274-277Conference paper (Refereed)
    Abstract [en]

    In this paper, modified, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and power consumption. Two different architectures are investigated, both have variable configurations of the input and output word-length (i.e., the physical resolution of the DAC). A modified architecture, termed in this work as a composite architecture (CA), shows about 9 dB increase in SNR while maintaining a power-consumption at the same level as that of a so-called hybrid architecture (HA). The power estimation is done for modulators on the RTL level using a standard cell library in a 65-nm technology. The modulators are operated at a sampling frequency of 2 GHz.

  • 49.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Power efficient arrangement of oversampling sigma-delta DAC2012In: NORCHIP, 2012, IEEE , 2012, p. 1-4Conference paper (Refereed)
    Abstract [en]

    A hardware efficient arrangement of digital-to-analog conversion blocks is presented by segmenting digital-to-analog converter (DAC). This segmenting of DAC is done by using buss-split design of digital sigma-delta modulator (DSDM). The reduction in the word length of input to both DSDM and DAC is analyzed with respect to performance because the input word length decides the complexity of these components. We show that effective performance can be achieved from the presented hardware efficient arrangement. All conclusions are drawn based on theory and simulations.

  • 50.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption2012Manuscript (preprint) (Other academic)
    Abstract [en]

    The hardware of the multi-bit digital error feedback modulator (EFM) of arbitrary order has recently been reduced by using multiple EFMs in cascade. In this paper, a modified cascading strategy is devised. Parts of the processing of consecutively placed EFM stages are merged such that a significant amount of circuitry is removed in each stage. In the proposed design, the modulated output is represented by a set of encoded signals to be used by the signal processing block placed after the EFM.

    To illustrate the savings, a number of configurations of fourth-order EFM designs, composed of two- and three-cascaded stages, have been synthesized in a 65 nm CMOS process technology using conventional and the proposed implementation techniques. Savings of 52.7% and 47%, in terms of area and power consumption, respectively, at an oversampling ratio of 4 could be obtain. The trade-off between sampling frequency and hardware cost is also presented. Due to reduced hardware an increase of up to 600 MHz in the sampling frequency is achieved.

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