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  • 1.
    A. Sani, Negar
    Linköping University, Department of Science and Technology, Physics and Electronics.
    M-PSK and M-QAM Modulation/Demodulation of UWB Signal Using Six-Port Correlator2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Nowadays high speed and high data rate communication are highly demanded. Consequently, wideband and high frequency transmitter and receivers should be designed. New transmitters and receivers should also have low power consumption, simple design and low manufacturing price in order to fulfill manufacturers’ requests for mass production. Having all above specifications, six-port correlator is a proper choice to be used as modulator and demodulator in transmitters and receivers.

    In this thesis the six-port correlator is introduced, modeled and simulated using Advanced Design System (ADS) software. A simple six-port transmitter/receiver system with a line of sight link is modeled and analyzed in BER, path length and noise terms. The modulation in this system is QAM, frequency is 7.5 GHz and symbol rate is 500 Msymbol/s.

    Furthermore two methods are proposed for high frequency and high symbol rate M-PSK and M-QAM modulation using six-port correlator. The 7.5 GHz modulators are modeled and simulated in ADS. Data streams generated by pseudo random bit generator with 1 GHz bandwidth are applied to modulators. Common source field effect transistors (FETs) with zero bias are used as controllable impedance termination to apply baseband data to modulator. Both modulators show good performance in M-PSK and M-QAM modulation.

  • 2.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 1.2-V pseudo-differential OTA with common-mode feedforward in 65-nm CMOS2010In: Proceedings of the 17th IEEE International Conference on Electronics, Circuits, and Systems, Institute of Electrical and Electronics Engineers (IEEE), 2010, p. 29-32Conference paper (Refereed)
    Abstract [en]

    In this work, we describe the implementation of a 1. 2-V pseudo-differential operational transconductance amplifier (OTA) with common-mode feedforward (CMFF) and inher­ent common-mode feedback (CMFB) in a 65-nm, digital CMOS process. The OTA architecture provides an inher­ent CMFB when cascaded OTA structures are utilized andthis work has studied a cascaded amplifier consisting of fourstages. Due to the low-gain using core 65-nm circuit de­vices, the overall gain must be distributed on all four stages to acquire a gain of more than 60 dB, while maintaining a-3-dB bandwidth of 200 MHz. To achieve high gain, we propose using a modified, positive-feedback, cross-coupled input differential stage. The modified OTA achieves a high output swing of ± 0.85 V due to only two stacked transistors, 88 dB DC gain and a third-order harmonic of -60 dB for 800 mVpp at 30 MHz. Further on, in a capacitive buffer configuration, we achieve a high slew rate of 1240 V/µS, -3-dB bandwidth of 509 MHz, signal-to-noise ratio of 63 dB while consuming 10.4 mW power.

  • 3.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 500-MHz low-voltage programmable gain amplifier for HD video in 65-nm CMOS2010In: Proceedings of 28th IEEE Norchip Conference., NORCHIP'10, Tampere: www.ieee.org , 2010, p. 1-4Conference paper (Refereed)
    Abstract [en]

    This work describes the implementation of a 1.2-V programmable gain amplifier (PGA) for high-definition (HD) video digitizers in a 65-nm digital CMOS process. The “pseudo” switched-capacitor (SC) PGA architecture buffers the video signal, without switching, during the active video. The SC circuitry is used for setup of DC operating point during horizontal and vertical blanking periods. Additionally, it compensates for the `sync-tip' of analog video signals to an equal blanking level for increased dynamic range to the digitizer following the PGA. The operational transconductance amplifier (OTA) employed as main amplifier in the PGA is a pseudo-differential, positive-feedback input stage architecture with a common-mode feedforward (CMFF) technique. The common-mode feedback (CMFB) is provided once two OTAs are cascaded. Schematic-level simulation results show that the OTA maintains a -3-dB bandwidth of 550 MHz, while keeping the distortion HD3 at -60 dB for a 30-MHz, 850 mVpp high definition video signal. The 88 dB DC gain is distributed among four OTA stages and the overall, combined PGA achieves a signal-to-noise ratio of 63 dB. Due to only two stacked transistors, it achieves high output swing of ±0.85 V, 1240 V/μs slew rate while consuming 10.4 mW power.

  • 4.
    Abbasi, Muneeb Mehmood
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Jabbar, Mohammad Abdul
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Design and Performance Analysis of Low-Noise Amplifier with Band-Pass Filter for 2.4-2.5 GHz2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Low power wireless electronics is becoming more popular due to durability, portability and small dimension. Especially, electronic devices in instruments, scientific and medical (ISM) band is convenient from the spectrum regulations and technology availability point of view. In the communication engineering society, to make a robust transceiver is always a matter of challenges for the better performance.

    However, in this thesis work, a new approach of design and performance analysis of Low-Noise Amplifier with Band-Pass filter is performed at 2.45 GHz under the communication electronics research group of Institute of Science and Technology (ITN). Band-Pass Filtered Low-Noise Amplifier is designed with lumped components and transmission lines. Performances of different designs are compared with respect to noise figure, gain, input and output reflection coefficient. In the design process, a single stage LNA is designed with amplifier, ATF-58143. Maximally flat band-pass (BPF) filters were designed with lumped components and distributed elements. Afterwards, BPF is integrated with the LNA at the front side of LNA to get a compact Band-Pass Filtered Low-Noise Amplifier with good performance.

    Advanced Design System (ADS) tool was used for design and simulation, and each design was tuned to get the optimum value for noise figure, gain and input reflection coefficient. LNA stand-alone gives acceptable value of noise figure and gain but the bandwidth was too wide compared to specification. Band-Pass Filtered Low-Noise Amplifier with lumped components gives also considerable values of noise and gain. But the gain was not so flat and the bandwidth was also wide. Then, Band-Pass Filtered Low-Noise Amplifier was designed with transmission lines where the optimum value of noise figure and gain was found. The gain was almost flat over the whole band, i.e., 2.4-2.5 GHz compared to LNA stand-alone and Band-Pass Filtered Low-Noise Amplifier designed with lumped components. It is observed that deviations of results from schematic to layout level are considerable, i.e., electromagnetic simulation is needed to predict the Band-Pass Filtered Low-Noise Amplifier performance.

    Prototype of LNA, Band-Pass Filtered Low-Noise Amplifier with lumped and transmission lines are made at ITN’s PCB laboratory. Due to unavailability of exact values of Murata components and for some other technical reasons, the measured values of Band-Pass Filtered Low-Noise Amplifier with lumped components and transmission lines are deviated compared to predicted values from simulation.

  • 5.
    Abdollahi Sani, Negar
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Wang, Xin
    Acreo Swedish ICT AB, Sweden.
    Granberg, Hjalmar
    INNVENTIA AB, Sweden.
    Andersson Ersman, Peter
    Acreo Swedish ICT AB, Sweden.
    Crispin, Xavier
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Dyreklev, Peter
    Acreo Swedish ICT AB, Sweden.
    Engquist, Isak
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Gustafsson, Göran
    Acreo Swedish ICT AB, Sweden.
    Berggren, Magnus
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, Faculty of Science & Engineering.
    Flexible Lamination-Fabricated Ultra-High Frequency Diodes Based on Self-Supporting Semiconducting Composite Film of Silicon Micro-Particles and Nano-Fibrillated Cellulose2016In: Scientific Reports, ISSN 2045-2322, E-ISSN 2045-2322, Vol. 6, no 28921Article in journal (Refereed)
    Abstract [en]

    Low cost and flexible devices such as wearable electronics, e-labels and distributed sensors will make the future "internet of things" viable. To power and communicate with such systems, high frequency rectifiers are crucial components. We present a simple method to manufacture flexible diodes, operating at GHz frequencies, based on self-adhesive composite films of silicon micro-particles (Si-mu Ps) and glycerol dispersed in nanofibrillated cellulose (NFC). NFC, Si-mu Ps and glycerol are mixed in a water suspension, forming a self-supporting nanocellulose-silicon composite film after drying. This film is cut and laminated between a flexible pre-patterned Al bottom electrode and a conductive Ni-coated carbon tape top contact. A Schottky junction is established between the Al electrode and the Si-mu Ps. The resulting flexible diodes show current levels on the order of mA for an area of 2 mm(2), a current rectification ratio up to 4 x 10(3) between 1 and 2 V bias and a cut-off frequency of 1.8 GHz. Energy harvesting experiments have been demonstrated using resistors as the load at 900 MHz and 1.8 GHz. The diode stack can be delaminated away from the Al electrode and then later on be transferred and reconfigured to another substrate. This provides us with reconfigurable GHz-operating diode circuits.

  • 6.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding.
    New Universal Hash Functions2012In: Lecture Notes in Computer Science, Vol. 7242 / [ed] Frederik Armknecht and Stefan Lucks, Springer Berlin Heidelberg , 2012, p. 99-108Conference paper (Refereed)
    Abstract [en]

    Universal hash functions are important building blocks for unconditionally secure message authentication codes. In this paper, we present a new construction of a class of Almost Strongly Universal hash functions with much smaller description (or key) length than the Wegman-Carter construction. Unlike some other constructions, our new construction has a very short key length and a security parameter that is independent of the message length, which makes it suitable for authentication in practical applications such as Quantum Cryptography.

  • 7.
    Abrahamsson, Sebastian
    et al.
    Linköping University, Department of Electrical Engineering.
    Råbe, Markus
    Linköping University, Department of Electrical Engineering.
    An FPGA implementation of a modulator for digital terrestrial television according to the DTMB standard2010Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The increasing data rates in digital television networks increase the demands on data capacity of the current transmission channels. Through new standards, the capacity of exisiting channels is increased with new methods of error correction coding and modulation.

    This thesis presents the design and implementation of a modulator for transmission of digital terrestrial television according to the Chinese DTMB standard.

    The system is written in VHDL and is intended for implementation on an FPGA.

  • 8.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A Low-Complexity LMMSE Based Channel Estimation Algorithm for Multiple Standards in Mobile Terminals2010In: Proceedings of the Swedish System On Chip Conference, SSOCC 2010, 2010Conference paper (Other academic)
    Abstract [en]

    A less complex and generic channel estimation algorithm for long term evolution (LTE) and digital video broadcasting-handheld (DVB-H) downlink standards, is proposed. The technique, here referred to as minimum mean square error sliding window (MSW) technique, obtains less computational complexity than previous mean squared error (MSE) algorithms [3] at the cost of some 0.3 dB less SNR. The computational complexity is decreased by a factor 3 for the LTE 5-MHz downlink case and by 30 for the DVB-H standard case. Simulated results in terms of mean squared error and bit error rates are presented for a quadrature phase-shift keying (QPSK) systems with interleaving and coding of the data. All simulations are done at the behaviolar-level level.

  • 9.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Study of modified noise-shaper architectures for oversampled sigma-delta DACs2010In: NORCHIP, 2010, IEEE , 2010, p. 1-4Conference paper (Other academic)
    Abstract [en]

    In this paper, modified low-complex, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and subDAC complexity. The studied techniques illustrate the trade-off in terms of noise-shaper and DAC implementation complexity and loss in SNR. It is found that a fair amount of improvement in SNR is achieved by maintaining low-complexity of noise shaper. The complexity of the subDAC is yet a parameter, directly related to the number of output bits from the noise shaper. Two different architectures are investigated with respect to subDAC complexity and noise shaper complexity. It is shown that the required number of DAC unit elements (DUE) can be reduced to half.

  • 10.
    Aghaee Ghaleshahi, Nima
    et al.
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, The Institute of Technology.
    Peng, Zebo
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, The Institute of Technology.
    Eles, Petru
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, The Institute of Technology.
    An Integrated Temperature-Cycling Acceleration and Test Technique for 3D Stacked ICs2015In: 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), Chiba/Tokyo, Japan, Jan. 19-22, 2015., Institute of Electrical and Electronics Engineers (IEEE), 2015, p. 526-531Conference paper (Refereed)
    Abstract [en]

    In a modern 3D IC, electrical connections between vertically stacked dies are made using through silicon vias. Through silicon vias are subject to undesirable early-life effects such as protrusion as well as void formation and growth. These effects result in opens, resistive opens, and stress induced carrier mobility reduction, and consequently circuit failures. Operating the ICs under extreme temperature cycling can effectively accelerate such early-life failures and make them detectable at the manufacturing test process. An integrated temperature-cycling acceleration and test technique is introduced in this paper that integrates a temperature-cycling acceleration procedure with pre-, mid-, and post-bond tests for 3D ICs. Moreover, it reduces the need for costly temperature chamber based temperature-cycling acceleration procedures. All these result in a reduction in the overall test costs. The proposed method is a schedule-based solution that creates the required temperature cycling effect along with performing the tests. Experimental results demonstrate its efficiency.

  • 11.
    Aghel Dawood, Menhel
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Obradovic, Dragan
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Guidelines for control equipment2013Independent thesis Basic level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [sv]

    Detta examensarbete är utfört på ABB LV System som är en del av företaget ABB i Sverige. Detta är ett företag som bygger kontrollutrustning till kunder som befinner sig i många delar av världen. Vår uppgift var att sätta samman en pärm med riktlinjer för montörerna.

    Pärmen ska vara lättläst och samtidigt innehålla alla standarder samt viktig fakta som kan behövas vid byggandet av kontrollutrustning.

    Riktlinjerna som framställts ledde till att montörerna blev bättre uppdaterade om de senaste riktlinjerna och standarder som leder idag. Tack vara att montörerna nu har allt samlat i en lättläslig pärm blir ledtiderna kortare.

  • 12.
    Ahlström, Per
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Signalprediktering i vitt gaussiskt brus med hjälp av ett adaptivt signalanpassat filter1976Report (Other academic)
    Abstract [sv]

    Ett signalanpassat filter har ett impulssvar som är den exiterandesignalens spegelbild . Ett dylikt filter maximerar vid en viss tidpunkt signalbrusförhållandet på utgången.

    Ett adaptivt transversalfilter styrt av en gradientkännande algoritm, vilken maximerar signalbrusförhållandet på filterutgången, har studerats. Det spegelvända impulssvaret har använts som prediktion av signalen. Denna prediktion har, vid simulering gjord på dator, ej visat sig vara bättre än en klassisk prediktion med en ren summering av brusstörda upplagor av signalen. Inte ens då dylika summerade upplagor av den brusstörda signalenanvänts som insignal till filtret har signalprediktionen via filtrets impulssvar uppvisat ett lägre kvadratiskt medelfel än d en klassiska.

  • 13.
    Ahmed, Tanvir
    Linköping University, Department of Electrical Engineering, Electronics System.
    High Level Model of IEEE 802.15.3c Standard and Implementation of a Suitable FFT on ASIC2011Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    A high level model of HSIPHY mode of IEEE 802.15.3c standard has been constructedin Matlab to optimize the wordlength to achieve a specific bit error rate (BER) depending on the application, and later an FFT has been implemented for different wordlengths depending on the applications. The hardware cost and power is proportional to wordlength. However, the main objective of this thesis has been to implement a low power, low area cost FFT for this standard. For that the whole system has been modeled in Matlab and the signal to noise ratio (SNR) and wordlength of the system have been studied to achieve an acceptable BER. Later an FFT has been implemented on 65nm ASIC for a wordlength of 8, 12 and 16 bits. For the implementation, a Radix-8 algorithm with eight parallel samples has been adopted. That reduce the area and the power consumption significantly compared to other algorithms and architectures. Moreover, a simple control has been used for this implementation. Voltage scaling has been done to reduce thepower. The EDA synthesis result shows that for 16bit wordlength, the FFT has 2.64 GS/s throughput, it takes 1.439 mm2 area on the chip and consume 61.51mW power.

  • 14.
    Ainouz, Filip
    et al.
    Linköping University, Department of Electrical Engineering.
    Vedholm, Jonas
    Linköping University, Department of Electrical Engineering.
    Mean Value Model of the Gas Temperature at the Exhaust Valve2009Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Over the years many investigations of the gas temperature at the exhaust valve have been made. Nevertheless the modeling of the gas temperature still remains an unsolved problem. This master thesis approaches the problem by attempting to model the exhaust gas temperature by using the standard sensors equipped in SI engines, together with an in-cylinder pressure sensor which is needed in order to develop certain models. The concept in the master thesis is based upon a parameterization of the ideal Otto cycle with tuning parameters which all have physical meanings. Input variables required for the parameterization model is obtained from a fix point iteration method. This method was developed in order to improve the estimates of residual gas fraction, residual gas temperature and variables dependent of those, such as temperature at intake valve closing. The mean value model of the temperature, at the exhaust valve, is based upon the assumption of the ideal gas law, and that the burned gases undergoe a polytropic expansion into the exhaust manifold. Input variables to the entire model are intake manifold pressure, exhaust manifold pressure, intake manifold temperature, engine speed, air mass flow, cylinder pressure, air-to-fuel equivalence ratio, volume, and ignition timing. A useful aspect with modeling the exhaust gas temperature is the possibility to implement it in turbo modeling. By modeling the exhaust gas temperature the control of the turbo can be enhanced, due to the fact that energy is temperature dependent. Another useful aspect with the project is that the model can be utilized in diagnostics, to avoid hardware redundency in the creation of the desired residuals.

  • 15.
    Aizad, Noor
    Linköping University, Department of Electrical Engineering.
    Design and implementation of comparator for sigma delta modulator2006Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    Comparator is the main building block in an ADC architecture. Main purpose of the comparator is to compare a signal with a reference signal and produce an output depending on whether the input signal is greater or smaller than reference. Many architectures for comparators exist for various purposes. In this thesis, Latched comparator architecture is used for sigma delta modulator. This particular design has two main characteristics that are very important for sigma delta application. First characteristic is the cancellation of memory effect which increases the speed and reliability of the system and the second is, with this architecture, high sensitivity can be achieved.

    The design and implementation of lathed comparator for sigma delta modulator is presented in this thesis work. Various non-linearities and performance parameters are discussed in detail. Practical implementation and circuit design issues are highlighted to achieve maximum sensitivity along with reasonable speed and accuracy.

  • 16.
    Al Kadi Jazairli, Mohamad
    Linköping University, Department of Science and Technology.
    Growth of Zinc Oxide Nanoparticles on Top of Polymers and Organic Small Molecules as a Transparent Cathode in Tandem Photovoltaic Device2008Independent thesis Basic level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Organic solar cells have caught considerable attention in the past few years due to their potential for providing environmentally safe, flexible, lightweight, inexpensive, and roll-to-roll feasible production solar cells. However, the efficiency achieved in current organic solar cells is quite low, yet quick and successive improvements render it as a promising alternative. A hopeful approach to improve the efficiency is by exploiting the tandem concept which consists of stacking two or more organic solar cells in series.

    One important constituent in tandem solar cells is the middle electrode layer which is transparent and functions as a cathode for the first cell and an anode for the second cell. Most studies done so far have employed noble metals such as gold or silver as the middle electrode layer; however, they suffered from several shortcomings especially with respect to reproducibility.

    This thesis focuses on studying a new trend which employs an oxide material based on nano-particles as a transparent cathode (such as Zinc-oxide-nano-particles) along with a transparent anode so as to replace the middle electrode.

    Thus, this work presents a study on solution processable zinc oxide (ZnO) nanostructures, their proper handling techniques, and their potential as a middle electrode material in Tandem solar cells in many different configurations involving both polymer and small molecule materials. Moreover, the ZnO-np potential as a candidate for acceptor material is also investigated.

  • 17.
    Alam, Syed Asad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Implementation of Time-Multiplexed Sparse Periodic FIR Filters for FRM on FPGAs2011Conference paper (Refereed)
    Abstract [en]

    Frequency-response masking (FRM) is a set of techniques for lowering the computational complexity of narrow transition band FIR filters. These FRM use a combination of sparse periodic filters and non-sparse filters. In this work we consider the implementation of these filters in a time-multiplexed manner on FPGAs. It is shown that the proposed architectures produce lower complexity realizations compared to the vendor provided IP blocks, which do not take the sparseness into consideration. The designs are implemented on a Virtex-6 device utilizing the built-in DSP blocks.

  • 18.
    Albani, Giorgia
    et al.
    University of Milano Bicocca, Italy; Ist Nazl Fis Nucl, Italy.
    Perelli Cippo, Enrico
    CNR, Italy.
    Croci, Gabriele
    University of Milano Bicocca, Italy; Ist Nazl Fis Nucl, Italy.
    Muraro, Andrea
    CNR, Italy.
    Schooneveld, Erik
    Rutherford Appleton Lab, England.
    Scherillo, Antonella
    Rutherford Appleton Lab, England.
    Hall-Wilton, Richard
    European Spallat Source ERIC, Sweden; Mittuniversitetet, Sweden.
    Kanaki, Kalliopi
    European Spallat Source ERIC, Sweden.
    Höglund, Carina
    Linköping University, Department of Physics, Chemistry and Biology. Linköping University, Faculty of Science & Engineering. European Spallat Source ERIC, Sweden.
    Hultman, Lars
    Linköping University, Department of Physics, Chemistry and Biology, Thin Film Physics. Linköping University, Faculty of Science & Engineering.
    Birch, Jens
    Linköping University, Department of Physics, Chemistry and Biology, Thin Film Physics. Linköping University, Faculty of Science & Engineering.
    Claps, Gerardo
    Ist Nazl Fis Nucl, Italy.
    Murtas, Fabrizio
    Ist Nazl Fis Nucl, Italy.
    Rebai, Marica
    University of Milano Bicocca, Italy; Ist Nazl Fis Nucl, Italy.
    Tardocchi, Marco
    CNR, Italy.
    Gorini, Giuseppe
    University of Milano Bicocca, Italy; CNR, Italy; Ist Nazl Fis Nucl, Italy.
    Evolution in boron-based GEM detectors for diffraction measurements: from planar to 3D converters2016In: Measurement science and technology, ISSN 0957-0233, E-ISSN 1361-6501, Vol. 27, no 11, article id 115902Article in journal (Refereed)
    Abstract [en]

    The so-called He-3-crisis has motivated the neutron detector community to undertake an intense Ramp;D programme in order to develop technologies alternative to standard He-3 tubes and suitable for neutron detection systems in future spallation sources such as the European spallation source (ESS). Boron-based GEM (gas electron multiplier) detectors are a promising He-3-free technology for thermal neutron detection in neutron scattering experiments. In this paper the evolution of boron-based GEM detectors from planar to 3D converters with an application in diffraction measurements is presented. The use of 3D converters coupled with GEMs allows for an optimization of the detector performances. Three different detectors were used for diffraction measurements on the INES instrument at the ISIS spallation source. The performances of the GEM-detectors are compared with those of conventional He-3 tubes installed on the INES instrument. The conceptual detector with the 3D converter used in this paper reached a count rate per unit area of about 25% relative to the currently installed He-3 tube. Its timing resolution is similar and the signal-to-background ratio (S/B) is 2 times lower.

  • 19.
    Alene Asres, Georgies
    et al.
    University of Oulu, Finland.
    Dombovari, Aron
    University of Oulu, Finland.
    Sipola, Teemu
    University of Oulu, Finland.
    Puskas, Robert
    University of Szeged, Hungary.
    Kukovecz, Akos
    University of Szeged, Hungary; MTA SZTE Lendulet Porous Nanocomposites Research Grp, Hungary.
    Konya, Zoltan
    University of Szeged, Hungary; MTA SZTE React Kinet and Surface Chemistry Research Grp, Hungary.
    Popov, Alexey
    University of Oulu, Finland.
    Lin, Jhih-Fong
    University of Oulu, Finland.
    Lorite, Gabriela S.
    University of Oulu, Finland.
    Mohl, Melinda
    University of Oulu, Finland.
    Toth, Geza
    University of Oulu, Finland.
    Lloyd Spetz, Anita
    Linköping University, Department of Physics, Chemistry and Biology, Applied Sensor Science. Linköping University, Faculty of Science & Engineering. University of Oulu, Finland.
    Kordas, Krisztian
    University of Oulu, Finland.
    A novel WS2 nanowire-nanoflake hybrid material synthesized from WO3 nanowires in sulfur vapor2016In: Scientific Reports, ISSN 2045-2322, E-ISSN 2045-2322, Vol. 6, no 25610Article in journal (Refereed)
    Abstract [en]

    In this work, WS2 nanowire-nanoflake hybrids are synthesized by the sulfurization of hydrothermally grown WO3 nanowires. The influence of temperature on the formation of products is optimized to grow WS2 nanowires covered with nanoflakes. Current-voltage and resistance-temperature measurements carried out on random networks of the nanostructures show nonlinear characteristics and negative temperature coefficient of resistance indicating that the hybrids are of semiconducting nature. Bottom gated field effect transistor structures based on random networks of the hybrids show only minor modulation of the channel conductance upon applied gate voltage, which indicates poor electrical transport between the nanowires in the random films. On the other hand, the photo response of channel current holds promise for cost-efficient solution process fabrication of photodetector devices working in the visible spectral range.

  • 20.
    Alfredsson, Jon
    Linköping University, Department of Electrical Engineering.
    Design of a parallel A/D converter system on PCB: For high-speed sampling and timing error correction2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The goals for most of today’s receiver system are sampling at high-speed, with high resolution and with as few errors as possible. This master thesis describes the design of a high-speed sampling system with"state-of-the-art"components available on the market. The system is designed with a parallel Analog-to-digital converter (ADC) architecture, also called time interleaving. It aims to increase the sampling speed of the system. The system described in this report uses four 12-bits ADCs in parallel. Each ADC can sample at 125 MHz and the total sampling speed will then theoretically become 500 Ms/s. The system has been implemented and manufactured on a printed circuit board (PCB). Up to four boards can be connected in parallel to get 2 Gs/s theoretically.

    In an approach to increase the systems performance even further, a timing error estimation algorithm will be used on the sampled data. This algorithm estimates the timing errors that occur when sampling with non-uniform time interval between samples. After the estimations, the sampling clocks can be adjusted to correct the errors.

    This thesis is concerning some ADC theory, system design and PCB implementation. It also describes how to test and measure the system’s performance. No measurement results are presented in this thesis because measurements will be done after this project. The last part of the thesis discusses future improvementsto achieve even higher performance.

  • 21.
    Alfredsson, Sandra
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Model Based Diagnosis of an Air Source Heat Pump2011Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The purpose of a heat pump is to control the temperature of an enclosed space. This is done by using heat exchange with a heat source, for example water, air, or ground. In the air source heat pump that has been studied during this master thesis, a refrigerant exchanges heat with the outdoor air and with a water distribution system.

    The heat pump is controlled through the circuit containing the refrigerant and it is therefore crucial that this circuit is functional. To ensure this, a diagnosis system has been created, to be able to detect and isolate sensor errors. The diagnosis system is based on mathematical models of the refrigerant circuit with its main components: a compressor, an expansion valve, a plate heat exchanger, an air heat exchanger, and a four-way valve. Data has been collected from temperature- and pressure sensors on an air source heat pump. The data has then been divided into data for model estimation and data for model validation. The models are used to create test quantities, which in turn are used by a diagnosis algorithm to determine whether an error has occurred or not.

    There are nine temperature sensors and two pressure sensors on the studied air source heat pump. Four fault modes have been investigated for each sensor: Stuck, Offset, Short circuit and Open circuit. The designed diagnosis system is able to detect all of the investigated error modes and isolate 40 out of 44 single errors. However, there is room for improvement by constructing more test quantities to detect errors and decouple more fault modes. To further develop the diagnosis system, the existing models can be improved and new models can be created.

  • 22.
    Ali Shah, Syed Asmat
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Qazi, Sohaib Ayaz
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Design of an all-digital, reconfigurable sigma-deltamodulator2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis presents a model of reconfigurable sigma-delta modulator. These modulators areintended for high speed digital Digital to Analog Converters. The modulators are intendedto reduce complexity of current steering DACs and also considered as a front end of dataconverters. Quantization noise present in digital signal is pushed to higher frequencies bysigma-delta modulators. Noise in high band frequencies can be removed by a low pass filter.

    A test methodology involving generation of baseband signal, interpolation and digitizationis opted. Topologies tested in MATLAB® include signal feedback and error feedback modelsof first-order and second-order sigma-delta modulators. Error feedback and signal feedbackfirst-order modulators’ performance is quite similar. The SNR of a first-order error feedbackmodel is 52.3 dB and 55.9 dB for 1 and 2 quantization bits, respectively. In second-orderSDM, signal feedback provides best performance with 80 dB SNR.

    The other part of the thesis focuses on the implementation of the sigma-delta modulator(SDM) using faster time to market approach. SoC Encounter, a tool from Cadence, is theeasiest way to do this job. The modulators are implemented in 65-nm technology. The reconfigurablesigma-delta modulator is designed using Verilog-HDL language. Switches areintroduced to control the reconfigurable SDM for different input word lengths. Word-lengthcan vary from 0 to 4 bits. Modulator is designed to work for frequencies of 2 GHz. To netlistthe design, Design Compiler is used which is a tool from Synopsys®.

    The area of the chip reported by design compiler is 563.68 um. When the design is implementedin SoC Encounter, area of the chip is increased, because the core utilization, whiledesigning, is only 60%, which is 556.8 um. Remaining 40% area is used by buffers, inverterand filler cells during clock tree synthesis. The buffers and inverters are added to removethe clock phase delay between different registers. Power consumption of the chip is 319mW.Internal power of the modulators is 219.1 mW. Switching power of output capacitances is99.9 mW, which is 31% of the total power consumed. Main concern of the power loss isconsidered to be power leakage. To reduce the leakage power and achieve high speed designCORE65GPHVT libraries are used. Leakage power of the design is 2.825 uW which is0.00088% of the total power.

  • 23.
    Almfors, Johan
    Linköping University, Department of Electrical Engineering.
    A Pre-study in Programmable Logic for use in fast Trigger Based Data Communication2005Independent thesis Basic level (degree of Bachelor), 10 points / 15 hpStudent thesis
    Abstract [en]

    This Bachelor thesis is a pre-study of the possibilities of using programmable logic in the purpose to enable fast trigger based data communication. Triggerbased data communication is in this case referred to a context where the processed data is stored and examined so when the trig situation appears the data should be able read out to a computer for evaluating. The purpose of this thesis is to find difficult and time consuming elements but also to find elements that is well suited for implementation in programmable logic. The work should also support further development and verification of trig functionalities and additional hardware. This with the intent of constructing an Ethernet based oscilloscope.

    The result of this thesis is a conclusion that programmable logic is well suited for many of the implemented logic function

  • 24.
    Almquist, Tobias
    Linköping University, Department of Electrical Engineering.
    Layout-generator för sifferseriell tvåportsadaptor2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Digit serial arithmetics uses a number of parallel bits in each digit. To compare performance and power consumption relative the number of bits, the Department of Electric Engineering (ISY) needed a layout generator to generate layout for a digit serial two-port adaptor. The layout should be done in 0.18 micrometer process. The number of bits of the incoming data and the number of bits of the coefficient should be variable. Great concern was put in the planning of the layout to make the generation of the adaptor work well independent of the parameters. Code was written to connect the layout instances and to simplify the adaptor.

  • 25.
    Almén, Marcus
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Driver Model for Mission-Based Driving Cycles2017Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    When further demands are placed on emissions and performance of cars, trucks and busses, the vehicle manufacturers are looking to have cheap ways to evaluate their products for specific customers' needs. Using simulation tools to quickly compare use cases instead of manually recording data is a possible way forward. However, existing traffic simulation tools do not provide enough detail in each vehicle for the driving to represent real life driving patterns with regards to road features.

    For the purpose of this thesis data has been recorded by having different people drive a specific route featuring highway driving, traffic lights and many curves. Using this data, models have then been estimated that describe how human drivers adjust their speed through curves, how long braking distances typically are with respect to the driving speed, and the varying deceleration during braking sequences. An additional model has also been created that produces a speed variation when driving on highways. In the end all models are implemented in Matlab using a traffic control interface to interact with the traffic simulation tool SUMO.

    The results of this work are promising with the improved simulation being able to replicate the most significant characteristics seen from human drivers when approaching curves, traffic lights and intersections.

  • 26.
    Alner, Klas
    Linköping University, Department of Electrical Engineering.
    Layoutgenerator för en multiplikator i "overturned stairs" trädstruktur2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [sv]

    Multiplikatorer används ofta som ett byggblock vid konstruktion av kretsar som digitala filter, FFT-processorer och aritmetiska enheter. Olika trädstrukturer används i"höghastighet"applikationer för multiplikatorer. En typ av träd,"overturned-stairs"(OS) som är ett adderarträd av första ordningen har uppvisat lika optimal prestanda med avseende på hastighet som Wallace-träd, vid 18 eller färre ingångar. I moderna integrerade kretsar, ger ledningar och kopplingar upphov till fördröjningar och parasitiska laster. I en jämförelse mellan Wallace-träd, och OS1-träd har det sistnämda kortare och mindre komplicerad ledningsdragningar och är därför mer ändamålsenlig för VLSI implementationer.

  • 27.
    Alonso, Fabiola
    et al.
    Linköping University, Department of Biomedical Engineering, Biomedical Instrumentation. Linköping University, Faculty of Science & Engineering.
    Hemm-Ode, Simone
    Linköping University, Department of Biomedical Engineering, Biomedical Instrumentation. Linköping University, The Institute of Technology. University of Applied Sciences and Arts Northwestern Switzerland.
    Wårdell, Karin
    Linköping University, Department of Biomedical Engineering, Biomedical Instrumentation. Linköping University, Faculty of Science & Engineering.
    Influence on Deep Brain Stimulation from Lead Design, Operating Mode and Tissue Impedance Changes – A Simulation Study2015In: Brain Disorders and Therapy, ISSN 2168-975X, Vol. 4, no 3, article id 1000169Article in journal (Refereed)
    Abstract [en]

    Background: Deep brain stimulation (DBS) systems in current mode and new lead designs are recently available. To switch between DBS-systems remains complicated as clinicians may lose their reference for programming. Simulations can help increase the understanding.

    Objective: To quantitatively investigate the electric field (EF) around two lead designs simulated to operate in voltage and current mode under two time points following implantation.

    Methods: The finite element method was used to model Lead 3389 (Medtronic) and 6148 (St Jude) with homogenous surrounding grey matter and a peri-electrode space (PES) of 250 μm. The PES-impedance mimicked the acute (extracellular fluid) and chronic (fibrous tissue) time-point. Simulations at different amplitudes of voltage and current (n=236) were performed using two different contacts. Equivalent current amplitudes were extracted by matching the shape and maximum EF of the 0.2 V/mm isolevel.

    Results: The maximum EF extension at 0.2 V/mm varied between 2-5 mm with a small difference between the leads. In voltage mode EF increased about 1 mm at acute compared to the chronic PES. Current mode presented the opposite relationship. Equivalent EFs for lead 3389 at 3 V were found for 7 mA (acute) and 2.2 mA (chronic).

    Conclusions: Simulations showed a major impact on the electric field extension between postoperative time points. This may explain the clinical decisions to reprogram the amplitude weeks after implantation. Neither the EF extension nor intensity is considerably influenced by the lead design.

  • 28.
    Alonso, Javier
    Linköping University, Department of Electrical Engineering.
    M.I.M.O Channel Model for High Capacity Wireless Networks and Simulator for Performance Analysis2006Student paper first term, 20 points / 30 hpStudent thesis
    Abstract [en]

    The wireless communications have suffered, in these last years, one of the greater technological growth within the communications via radio. The application of multiple antennas, as much in transmission as in reception has taken to an impulse of the study of different models from propagation channels.

    Taking this into consideration, the different types from mentioned models are going to be studied.

    The work that the ISY department at the Institute of Technology of the Linköping University has proposed is to develop to a propagation channel model, with several antennas in reception and transmission, that one first approach allows a capacity of the channel study, in absence of measures of possible scenarios, as well as the development of a small simulator that allows to analyze its benefits.

  • 29.
    Altaf, Amjad
    Linköping University, Department of Electrical Engineering.
    Design of Millimeter-wave SiGe Frequency Doubler and Output Buffer for Automotive Radar Applications2007Independent thesis Advanced level (degree of Magister), 20 points / 30 hpStudent thesis
    Abstract [en]

    Automotive Radars have introduced various functions on automobiles for driver’s safety and comfort, as part of the Intelligent Transportation System (ITS) including Adaptive Cruise Control (ACC), collision warning or avoidance, blind spot surveillance and parking assistance. Although such radar systems with 24 GHz carrier frequency are already in use but due to some regulatory issues, recently a permanent band has been allocated at 77-81 GHz, allowing for long-term development of the radar service. In fact, switchover to the new band is mandatory by 2014.

    A frequency multiplier will be one of the key components for such a millimeter wave automotive radar system because there are limitations in direct implementation of low phase noise oscillators at high frequencies. A practical way to build a cost-effective and stable source at higher frequency is to use an active multiplier preceded by a high spectral purity VCO operating at a lower frequency. Recent improvements in the performance of SiGe technology allow the silicon microelectronics to advance into areas previously restricted to compound semiconductor devices and make it a strong competitor for automotive radar applications at 79 GHz.

    This thesis presents the design of active frequency doubler circuits at 20 GHz in a commercially available SiGe BiCMOS technology and at 40GHz in SiGe bipolar technology (Infineon-B7h200 design). Buffer/amplifier circuits are included at output stages to drive 50 Ω load. The frequency doubler at 20 GHz is based on an emitter-coupled pair operating in class-B configuration at 1.8 V supply voltage. Pre-layout simulations show its conversion gain of 10 dB at -5 dBm input, fundamental suppression of 25dB and NF of 12dB. Input and output impedance matching networks are designed to match 50 Ω at both sides.

    The millimeter wave frequency doubler is designed for 5 V supply voltage and has the Gilbert cell-based differential architecture where both RF and LO ports are tied together to act as a frequency doubler. Both pre-layout and post-layout simulation results are presented and compared together. The extracted circuit has a conversion gain of 8 dB at -8 dB input, fundamental suppression of 20 dB, NF of 12 dB and it consumes 42 mA current from supply. The layout occupies an area of 0.12 mm2 without pads and baluns at both input and output ports. The frequency multiplier circuits have been designed using Cadence Design Tool.

  • 30.
    Alvbrant, Joakim
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    A study on emerging electronics for systems accepting soft errors2016Licentiate thesis, monograph (Other academic)
    Abstract [en]

    Moore’s law has until today mostly relied on shrinkage of the size of the devices inintegrated circuits. However, soon the granularity of the atoms will set a limit together with increased error probability of the devices. How can Moore’s law continue in thefuture? To overcome the increased error rate, we need to introduce redundancy. Applyingmethods from biology may be a way forward, using some of the strategies that transformsan egg into a fetus, but with electronic cells.

    A redundant system is less sensitive to failing components. We define electronic clayas a massive redundancy system of interchangeable and unified subsystems. We show how a mean voter, which is simpler than a majority voter, impact a redundant systemand how optimization can be formalized to minimize the impact of failing subsystems.The performance at given yield can be estimated with a first order model, without the need for Monte-Carlo simulations. The methods are applied and verified on a redundant finite-impulse response filter.

    The elementary circuit behavior of the memristor, ”the missing circuit element”, is investigated for fundamental understanding and how it can be used in applications. Different available simulation models are presented and the linear drift model is simulated with Joglekar-Wolf and Biolek window functions. Driven by a sinusoidal current, the memristor is a frequency dependent component with a cut-off frequency. The memristor can be densely packed and used in structures that both stores and compute in the same circuit, as neurons do. Surrounding circuit has to affect (write) and react (read) to the memristor with the same two terminals.

    We looked at artificial neural network for pattern recognition, but also for self organization in electronic cell array. Finally we look at wireless sensor network and how such system can adopt to the environment. This is also a massive redundant clay-like system.

    Future electronic systems will be massively redundant and adaptive. Moore’s law will continue, not based on shrinking device sizes, but on cheaper, numerous, unified and interchangeable subsystems.

  • 31.
    Alvbrant, Joakim
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Study and Simulation Example of a Redundant FIR Filter2012In: Proceedings 30th Norchip Conference, IEEE, 2012, p. 1-4Conference paper (Refereed)
    Abstract [en]

    In this paper we present a study and simulation results of the structure and design of a redundant finite-impulse response (FIR) filter. The filter has been selected as an illustrative example for biologically-inspired circuits, but the structure can be generalized to cover other signal processing systems. In the presented study, we elaborate on signal processing properties of the filter if we apply a redundant architecture were different computing paths can be utilized. An option is to utilize different computing paths as inspired by biological architectures (BIAs). We present typical simulation results for a low-pass filter illustrating the trade-offs and costs associated with this architecture.

  • 32.
    Ambuluri, Sreehari
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, Faculty of Science & Engineering.
    Garrido, Mario
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Caffarena, Gabriel
    Boadilla del Monte, Madrid, Spain.
    Ogniewski, Jens
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, Faculty of Science & Engineering.
    Ragnemalm, Ingemar
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, Faculty of Science & Engineering.
    New Radix-2 and Radix-22 Constant Geometry Fast Fourier Transform Algorithms For GPUs2013Conference paper (Refereed)
    Abstract [en]

    This paper presents new radix-2 and radix-22 constant geometry fast Fourier transform (FFT) algorithms for graphics processing units (GPUs). The algorithms combine the use of constant geometry with special scheduling of operations and distribution among the cores. Performance tests on current GPUs show a significant improvements compared to the most recent version of NVIDIA’s well-known CUFFT, achieving speedups of up to 5.6x.

  • 33.
    Andersson, Christofer
    Linköping University, Department of Science and Technology.
    Design of a transmitter for Ultra Wideband Radio2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Ultra Wideband Radio (UWB) is an upcoming alternative for wireless communications. Since the Federal Communication Commission in the USA allowed UWB for unlicensed usage in April 2002, more and more companies have started developing UWB systems.

    The major difference with UWB compared to other RF systems is that UWB sends information with pulses instead of using a carrier wave. The technique is from the nineteenth century and was first developed by Heinrich Hertz (1857-1894), which led to transatlantic communications 1901.

    This Master thesis presents a proposal of a transmitter for Ultra Wideband Radio using multiple bands. The proposed transmitter is implemented on system level in Simulink, Matlab. The frequency generation in the transmitter is also implemented at component level in a 0.13 um IBM process. The thesis begins with an introduction of UWB theory and techniques.

  • 34.
    Andersson, Erik
    Linköping University, Department of Electrical Engineering, Vehicular Systems. Linköping University, Faculty of Science & Engineering.
    Modelling of Cranking Behaviour in Heavy Duty Truck Engines2015Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    In modern heavy duty trucks the battery is a central component. Its traditional role as an energy source for engine cranking has been extended to include powering a number of elec- trical components on the truck, both during driving and during standstill. As a consequence of this it is important to know how much a battery in use has aged and lost in terms of ca- pacity and power output. The difficulty in measuring these factors on a battery in use causes problem, since heavy duty truck batteries are often replaced too early or too late, leading to unnecessary high replacement costs or truck standstill respectively.

    The overall goal of the effort, of which this thesis is a part, is to use a model of the cranking behaviour of a heavy duty truck engine, which depends on the battery condition, to estimate the ageing and wear of a heavy duty truck battery. This thesis proposes a modelling approach to model the components involved in engine cranking.

    In the thesis work, system identification is made of the systems forming part of the cranking of a heavy duty truck engine. These components are the starter battery, the starter motor and its electrical circuit and the internal combustion engine. Measurement data has been provided by Scania AB for the evaluation of the models. The data has been collected from crankings of a heavy duty diesel engine at different temperatures and battery charge levels. For every cranking lapse the battery voltage and current have been measured as well as the engine rotational speed.

    A starter battery model is developed and evaluated. The resulting battery model is then incorporated into two different engine cranking models, Model 1 and Model 2, including a starter motor model and an internal combustion engine model apart form the battery model. The two cranking models differ in several aspects and their differences and resulting evalu- ations are discussed.

    The battery model is concluded to be sufficiently accurate during model verification, however the two cranking models are not. Model 2 is verified as more correct in in its output than Model 1, but neither is sufficiently accurate for their purpose. The conclusion is drawn that the modelling approach is sound but development of Model 2 is needed before the model can be used in model-based condition estimation. 

  • 35.
    Andersson, Erik
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Omkonstruktion och arkitekturbyte av autopilot för obemannade farkoster2012Independent thesis Basic level (university diploma), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [en]

    This thesis has been written at Linköping University for the company Instrument Control Sweden AB (ICS).

    ICS is a small company located in Linköping that develops software and hardware for Unmanned Aerial Vehicles, UAV. At present, ICS has a fully functional autopilot called EasyPilot but they want to reduce the autopilot’s size to make it more attractive.

    The purpose of this thesis was to investigate if it was possible to reduce the size of the autopilot and how, in that case, it would be done. It was also necessary to examine whether the old processors should be replaced by new ones and how hard it would be to convert the old software to these new processors.

    To succeed with the goals many of the old components had to be changed for new, smaller ones. Some less necessary parts were also completely removed. The results showed that the size could be reduced quite a bit, exactly how much is hard to say since no PCB-layout were done.

    By doing some programming tests on the new components it could be shown that some parts of the old code could be reused on the new design. It was mainly algorithms and other calculations. However, a lot of new code still had to be written in order to successfully convert the old software to the new hardware. 

  • 36.
    Andersson, Håkan
    Linköping University, Department of Management and Engineering, Solid Mechanics. Linköping University, Faculty of Science & Engineering.
    A Co-Simulation Approach for Hydraulic Percussion Units2018Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    This Licentiate of Engineering thesis concerns modelling and simulation of hydraulic percussion units. These units are often found in equipment for breaking or drilling in rock and concrete, and are also often driven by oil hydraulics, in which complex fluid-structure couplings are essential for their operation.

    Current methodologies used today when developing hydraulic percussion units are based on decoupled analyses, which are not correctly capturing the important coupled mechanisms. Hence, an efficient method for coupled simulations is of high importance, since these mechanisms are critical for the function of these units. Therefore, a co-simulation approach between a 1D system simulation model representing the fluid system and a structural 3D FE-model is proposed.

    This approach is presented in detail, implemented for two well-known simulation tools and evaluated for a simple but relevant model. The Hopsan simulation tool was used for the fluid system and the FE-simulation software LS-DYNA was used for the structural mechanics simulation. The co-simulation interface was implemented using the Functional Mock-up Interface-standard.

    The approach was further developed to also incorporate multiple components for coupled simulations. This was considered necessary when models for the real application are to be developed. The use of two components for co-simulation was successfully evaluated for two models, one using the simple rigid body representation, and a second where linear elastic representations of the structural material were implemented.

    An experimental validation of the co-simulation approach applied to an existing hydraulic hammer was performed. Experiments on the hydraulic hammer were performed using an in-house test rig, and responses were registered at four different running conditions. The co-simulation model was developed using the same approach as before. The corresponding running conditions were simulated and the responses were successfully validated against the experiments. A parameter study was also performed involving two design parameters with the objective to evaluate the effects of a parameter change.

    This thesis consists of two parts, where Part I gives an introduction to the application, the simulation method and the implementation, while Part II consists of three papers from this project.

    List of papers
    1. A co-simulation method for system-level simulation of fluid-structure couplings in hydraulic percussion units
    Open this publication in new window or tab >>A co-simulation method for system-level simulation of fluid-structure couplings in hydraulic percussion units
    Show others...
    2017 (English)In: Engineering with Computers, ISSN 0177-0667, E-ISSN 1435-5663, Vol. 33, no 2, p. 317-333Article in journal (Refereed) Published
    Abstract [en]

    This paper addresses a co-simulation method for fluid power driven machinery equipment, i.e. oil hydraulic machinery. In these types of machinery, the fluid-structure interaction affects the end-product performance to a large extent, hence an efficient co-simulation method is of high importance. The proposed method is based on a 1D system model representing the fluid components of the hydraulic machinery, within which structural 3D Finite Element (FE) models can be incorporated for detailed simulation of specific sub-models or complete structural assemblies. This means that the fluid system simulation will get a more accurate structural response, and that the structural simulation will get more correct fluid loads at every time step, compared to decoupled analysis. Global system parameters such as fluid flow, performance and efficiency can be evaluated from the 1D system model simulation results. From the 3D FE-models, it is possible to evaluate displacements, stresses and strains to be used in stress analysis, fatigue evaluation, acoustic analysis, etc. The method has been implemented using two well-known simulation tools for fluid power system simulations and FE-simulations, respectively, where the interface between the tools is realised by use of the Functional Mock-up Interface standard. A simple but relevant model is used to validate the method.

    Place, publisher, year, edition, pages
    SPRINGER, 2017
    Keywords
    Co-simulation; Fluid-structure coupling; System simulation; Functional mock-up interface; Fluid power machinery; Transmission line modelling
    National Category
    Computer Systems
    Identifiers
    urn:nbn:se:liu:diva-136875 (URN)10.1007/s00366-016-0476-8 (DOI)000398468100012 ()
    Note

    Funding Agencies|Atlas Copco Construction Tools

    Available from: 2017-04-30 Created: 2017-04-30 Last updated: 2018-09-11
    2. System level co-simulation of a control valve and hydraulic cylinder circuit in a hydraulic percussion unit
    Open this publication in new window or tab >>System level co-simulation of a control valve and hydraulic cylinder circuit in a hydraulic percussion unit
    Show others...
    2017 (English)In: Proceedings of 15:th Scandinavian International Conference on Fluid Power, June 7-9, 2017, Linköping, Sweden / [ed] Petter Krus, Liselott Ericson and Magnus Sethson, Linköping: Linköping University Electronic Press, 2017, Vol. 144, p. 225-235Conference paper, Published paper (Refereed)
    Abstract [en]

    In this study a previously developed co-simulation method that is based on a 1D system model representing the fluid components of a hydraulic machinery, within which structural 3D Finite Element (FE) models can be incorporated for detailed simulation of specific sub-models or complete structural assemblies, is further developed. The fluid system model consists of ordinary differential equation sub-models that are computationally very inexpensive, but still represents the fluid dynamics very well. The co-simulation method has been shown to work very well for a simple model representing a hydraulic driven machinery. A more complex model was set up in this work, in which two cylinders in the hydraulic circuit were evaluated. Such type of models, including both the main piston and control valves, are necessary as they represent the real application to a further extent than the simple model, of only one cylinder. Two models have been developed and evaluated, from the simple rigid body representation of the structural mechanics model, to the more complex model using linear elastic representation. The 3D FE-model facilitates evaluation of displacements, stresses, and strains on a local level of the model. The results can be utilised for fatigue assessment, wear analysis and for predictions of noise radiation.

    Place, publisher, year, edition, pages
    Linköping: Linköping University Electronic Press, 2017
    Series
    Linköping Electronic Conference Proceedings, ISSN 1650-3686, E-ISSN 1650-3740 ; 144
    Keywords
    Co-simulation, Fluid-structure coupling, System simulation, Functional mockup interface, Fluid power machinery, Transmission line modelling
    National Category
    Applied Mechanics Vehicle Engineering Control Engineering
    Identifiers
    urn:nbn:se:liu:diva-151015 (URN)10.3384/ecp17144225 (DOI)9789176853696 (ISBN)
    Conference
    15th Scandinavian International Conference on Fluid Power, June 7-9, 2017, Linköping, Sweden
    Available from: 2018-09-11 Created: 2018-09-11 Last updated: 2018-09-11Bibliographically approved
  • 37.
    Andersson, Johan
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Automated Fault Tree Generation from Requirement Structures2015Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The increasing complexity of today’s vehicles gives drivers help with everything from adaptive cruisecontrol to warning lights for low fuel level. But the increasing functionality also increases the risk offailures in the system. To prevent system failures, different safety analytic methods can be used, e.g.,fault trees and/or FMEA-tables. These methods are generally performed manually, and due to thegrowing system size the time spent on safety analysis is growing with increased risk of human errors. If the safety analysis can be automated, lots of time can be saved.

    This thesis investigates the possibility to generate fault trees from safety requirements as wellas which additional information, if any, that is needed for the generation. Safety requirements are requirements on the systems functionality that has to be fulfilled for the safety of the system to be guaranteed. This means that the safety of the truck, the driver, and the surroundings, depend on thefulfillment of those requirements. The requirements describing the system are structured in a graphusing contract theory. Contract theory defines the dependencies between requirements and connectsthem in a contract structure.

    To be able to automatically generate the fault tree for a system, information about the systems failure propagation is needed. For this a Bayesian network is used. The network is built from the contract structure and stores the propagation information in all the nodes of the network. This will result in a failure propagation network, which the fault tree generation will be generated from. The failure propagation network is used to see which combinations of faults in the system can violate thesafety goal, i.e., causing one or several hazards. The result of this will be the base of the fault tree.

    The automatic generation was tested on two different Scania systems, the fuel level displayand the dual circuit steering. Validation was done by comparing the automatically generated trees withmanually generated trees for the two systems showing that the proposed method works as intended. The case studies show that the automated fault tree generation works if the failure propagationinformation exists and can save a lot of time and also minimize the errors made by manuallygenerating the fault trees. The generated fault trees can also be used to validate written requirementsto by analyzing the fault trees created from them.

  • 38.
    Andersson, Martin
    Linköping University, Department of Electrical Engineering.
    Konstruktion av förstärkare och insamplingssteg till en PSAADC i 0.25 um CMOS2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. The main specifications for the voltage reference generator is to generate stable reference voltages with low noise and a good PSRR. Efforts has also been made to minimize the power consumption.

  • 39.
    Andersson, Niklas
    et al.
    Ericsson Microelectronics AB.
    Andersson, Ola
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Models and Implementation of a Dynamic Element Matching DAC2003In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 34, no 1, p. 7-16Article in journal (Refereed)
    Abstract [en]

    The dynamic element matching (DEM) techniques for digital-to-analog converters (DACs) has been suggested as a promising method to improve matching between the DAC''s reference levels. However, no work has so far taken the dynamic effects that limit the performance for higher frequenciesinto account. In this paper we present a model describing the dynamic properties of a DEM DAC and compare the simulated results with measurements of a 14-bit current-steering DEM DAC implemented in a 0.35-μm CMOS process. The measured data agrees well with the results predicted by the used model. It is also shown that the DEM technique does not necessarily increase the performance of a DAC when dynamic errors are dominating the achievable performance.

  • 40.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System.
    Rudberg, Mikael
    Linköping University, Department of Electrical Engineering, Electronics System.
    Improvement of segmented DACs (Swedish pat. 0001917-4)2000Patent (Other (popular science, discussion, etc.))
  • 41.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A strategy for implementing dynamic element matching in current-steering DACs2000In: Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on, IEEE , 2000, p. 51-56Conference paper (Other academic)
    Abstract [en]

    Interesting comparisons of dynamic element matching (DEM) techniques, have been presented during the last decade. However, not many chip implementations of these DEM techniques have been presented so far. A brief review of different DEM techniques are presented in this paper together with a strategy for implementing the partial randomization DEM, PRDEM, technique in a 3.3 V supply, 14 bit CMOS current-steering wideband digital-to-analog converter (DAC)

  • 42.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Comparison of Different Dynamic Element Matching Techniques for Wideband CMOS DACs1999In: Proceedings of the 17th Norchip Conference, 1999Conference paper (Other academic)
    Abstract [en]

    In the field of dynamic element matching, DEM, techniques, some ”new” important theoretical results have been presented during the last decade. However, no comparison between these different DEM techniques (FRDEM, PRDEM, NSDEM) used in wideband digital-to-analog converters, DACs, has been reported. A brief review of different DEM techniques and a comparison between their properties in terms of complexity, etc., are presented in this paper together with simulation results showing the impact of using different DEM techniques.

  • 43.
    Andersson, Ola
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Modeling and Implementation of Current-Steering Digital-to-Analog Converters2005Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Data converters, i.e., analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), are interface circuits between the analog and digital domains. They are used in, e.g., digital audio applications, data communication applications, and other types of applications where conversion between analog and digital signal representation is required. This work covers different aspects related to modeling, error correction, and implementation of DACs for communication applications where the requirements on the circuits in terms of speed and linearity are hard. The DAC architecture considered in this work is the current-steering DAC, which is the most commonly used architecture for high-speed applications.

    Transistor-level simulation of complex circuits using accurate transistor models require long simulation times. A transistor-level model of a DAC used in a system simulation is likely to be a severe bottleneck limiting the overall system simulation speed. Moreover, investigations of stochastic parameter variations require multiple simulation runs with different parameter values making transistor-level models unsuitable. Therefore, there is a need for behavioral-level models with reasonably short simulation times. Behavioral-level models can also be used to find the requirements on different building blocks on high abstraction levels, enabling the use of efficient topdown design methodologies. Models of different nonideal properties in current-steering DACs are used and developed in this work.

    Static errors typically dominates the low-frequency behavior of the DAC. One of the limiting factors for the static linearity of a current-steering DAC is mismatch between current sources. A well-known model of this problem is used extensively in this work for evaluation of different ideas and techniques for linearity enhancement. The highfrequency behavior of the DAC is typically dominated by dynamic errors. Models oftwo types of dynamic errors are developed in this work. These are the dynamic errors caused by parasitic capacitance in wires and transistors and glitches caused by asymmetry in the settling behavior of a current source.

    The encoding used for the digital control word in a current steering DAC has a large influence on the circuit performance, e.g., in terms static linearity and glitches. In this work, two DAC architectures are developed. These are denoted the decomposed and partially decomposed architectures and utilize encoding strategies aiming at a high circuit performance by avoiding unnecessary switching of current sources. The developed architectures are compared with the well-known binary-weighted and segmented architectures using behavioral-level simulations.

    It can be hard to meet a DAC design specification using a straightforward implementation. Techniques for compensation of errors that can be applied to improve the DAC linearity are studied. The well-known dynamic element matching (DEM) techniques are used for transforming spurious tones caused by matching errors into white or shaped noise. An overview of these techniques are given in this work and a DEM technique for the decomposed DAC architecture is developed. In DS modulation, feedback of the quantization error is utilized to spectrally shape the quantization noise to reduce its power within the signal band. A technique based on this principle is developed for spectral shaping of DAC nonlinearity errors utilizing a DAC model in a feedback loop. Two examples of utilization of the technique are given.

    Four different current-steering DACs implemented in CMOS technology are developed to enable comparison between behavioral-level simulations and measurements on actual implementations and to provide platforms for evaluation of different techniques for linearity improvement. For example, a 14-bit DEM DAC is implemented and measurement results are compared with simulation results. A good agreement between measured and simulated results is obtained. Moreover, a configurable 12-bit DAC capable of operating with different degrees of segmentation and decomposition is implemented to evaluate the proposed decomposed architecture. Measurement results agree with results from behavioral-level simulations and indicate that the decomposed architecture is a viable alternative to the commonly used segmented architecture.

  • 44.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 14-Bit dual current-steering DAC2003In: Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003Conference paper (Other academic)
    Abstract [en]

    A 14-bit dual current-steering digital-to-analog converter implemented in a 0.25 µm CMOS process is presented in this work. Both implementation issues and measurement results are presented. The measured spurious-free dynamic range is higher than 73 dB for signal frequencies up to 3 MHz, and a measured multi-tone power ratio of approximately 71 dB is reported for an ADSL-like input.

  • 45.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A differential DAC architecture with variable common-mode level2002In: Proc. 2002 IEEE Int. Symp. on Circuits and Systems, ISCAS'02, 2002, p. I-113-I-116Conference paper (Refereed)
    Abstract [en]

    A differential current-steering digital-to-analog converter (DAC) architecture allowing the common-mode level of the input signal to be varied is presented. Simulation results with models of different DAC nonlinearities indicate that the proposed architecture has a potential of improving the linearity of the converters.

  • 46.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A method of segmenting digital-to-analog converters2003In: Proc. IEEE Southwest Symposium on Mixed-Signal Design, SSMSD'03, 2003, p. 32-37Conference paper (Refereed)
    Abstract [en]

    Segmented architectures are often used in digital-to-analog converters (DACs). Here we propose a DAC structure based on recursive decomposition of an N-bit binary DAC into two (N-1) bit DACs and one 1 bit DAC. A DAC model that includes matching errors has been simulated. The simulation results indicate that by using four layers of decomposition it is possible to achieve similar performance as when using seven bits of traditional segmentation.

  • 47.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Combining DACs for improved performance2002In: Proc. 4th IEE Int. Conf. on Advanced A/D and D/A Conversion Techniques and their Applications, ADDA'02, 2002Conference paper (Refereed)
    Abstract [en]

    This work is an overview of recently proposed methods on combining DACs in order to improve performance. Some further development of these techniques are also presented. The techniques aim at reducing glitches and sensitivity towards limited output impedance in current sources.

  • 48.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Spectral shaping of DAC nonlinearity errors through modulation of expected errors2001In: Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, IEEE , 2001, Vol. 3, p. 417-420Conference paper (Refereed)
    Abstract [en]

    Traditionally, delta-sigma modulation has been used for shaping of quantization noise. We present a modified version of delta-sigma modulation which also takes into account unwanted nonlinearities by feeding back not only the quantization error, but also the expected physical error. Behavioral-level simulations of a 5th-order structure showing an improvement of up to 4 effective bits are included

  • 49.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering. Linköping University, Department of Electrical Engineering, Electronics System.
    A parameterized cell-based design approach for digital-to-analog converters2004In: Proc. IEEE Int. Workshop on System-on-Chip for Real-Time Applications, IWSOC'04, 2004, p. 225-228Conference paper (Refereed)
    Abstract [en]

    Due to the lack of proper design automation tools, designers are often forced to use full-custom design methodologies when designing analog and mixed-signal circuits. In this work, we discuss a design methodology based on parameterized cells intended for efficient design. The methodology is illustrated with the design of a 12-bit configurable current-steering DAC. Because the cells are parameterized, their layout must be described in a generalized way, resulting in a longer design time compared with a manual layout of a fixed circuit. However, the parameterized approach simplifies iteration of the layout process and block reuse.

  • 50.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering.
    A testbed for different codes in digital-to-analog converters2004In: Proc. Swedish System-on-Chip Conf. 2004, SSoCC'04, 2004Conference paper (Other academic)
1234567 1 - 50 of 968
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