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  • 1.
    Bergman, Sara
    et al.
    Linköping University, Department of Computer and Information Science. Linköping University, Faculty of Science & Engineering. Microsoft Corporation, Oslo, Norway.
    Asplund, Mikael
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering.
    Nadjm-Tehrani, Simin
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering.
    Permissioned Blockchains and Distributed Databases: A Performance Study2019In: Concurrency and Computation, ISSN 1532-0626, E-ISSN 1532-0634, Concurrency and Computation, Practice and ExperienceArticle in journal (Refereed)
    Abstract [en]

    Blockchains are increasingly studied in the context of new applications. Permissioned blockchains promise to deal with the issue of complete removal of trust, a notion that is currently the hallmark of the developed society. Before the idea is adopted in contexts where resource efficiency and fast operation is a requirement, one could legitimately ask the question: can permissioned blockchains match the performance of traditional large‐scale databases? This paper compares two popular frameworks, Hyperledger Fabric and Apache Cassandra, as representatives of permissioned blockchains and distributed databases, respectively. We compare their latency for varying workloads and network sizes. The results show that, for small systems, blockchains can start to compete with traditional databases, but also that the difference in consistency models and differences in setup can have a large impact on the resulting performance.

  • 2.
    Ernstsson, August
    et al.
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering.
    Kessler, Christoph
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering.
    Extending smart containers for data locality-aware skeleton programming2019In: Concurrency and Computation, ISSN 1532-0626, E-ISSN 1532-0634, Vol. 31, no 5, article id e5003Article in journal (Refereed)
    Abstract [en]

    We present an extension for the SkePU skeleton programming framework to improve the performance of sequences of transformations on smart containers. By using lazy evaluation, SkePU records skeleton invocations and dependencies as directed by smart container operands. When a partial result is required by a different part of the program, the run-time system will process the entire lineage of skeleton invocations; tiling is applied to keep chunks of container data in the working set for the whole sequence of transformations. The approach is inspired by big data frameworks operating on large clusters where good data locality is crucial. We also consider benefits other than data locality with the increased run-time information given by the lineage structures, such as backend selection for heterogeneous systems. Experimental evaluation of example applications shows potential for performance improvements due to better cache utilization, as long as the overhead of lineage construction and management is kept low.

  • 3.
    Kessler, Christoph
    Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory.
    Managing distributed shared arrays in a bulk-synchronous parallel programming environment2004In: Concurrency and Computation, ISSN 1532-0626, E-ISSN 1532-0634, Vol. 16, no 02-Mar, p. 133-153Article in journal (Refereed)
    Abstract [en]

    NestStep is a parallel programming language for the BSP (bulk-hronous parallel) programming model. In this article we describe the concept of distributed shared arrays in NestStep and its implementation on top of MPI. In particular, we present a novel method for runtime scheduling of irregular, direct remote accesses to sections of distributed shared arrays. Our method, which is fully parallelized, uses conventional two-sided message passing and thus avoids the overhead of a standard implementation of direct remote memory access based on one-sided communication. The main prerequisite is that the given program is structured in a BSP-compliant way. Copyright (C) 2004 John Wiley Sons, Ltd.

  • 4.
    Kessler, Christoph
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory.
    Bednarski, Andrzej
    Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory.
    Optimal integrated code generation for VLIW architectures2006In: Concurrency and Computation, ISSN 1532-0626, E-ISSN 1532-0634, Vol. 18, no 11, p. 1353-1390Article in journal (Refereed)
    Abstract [en]

    We present a dynamic programming method for optimal integrated code generation for basic blocks that minimizes execution time. It can be applied to single-issue pipelined processors, in-order-issue superscalar processors, VLIW architectures with a single homogeneous register set, and clustered VLIW architectures with multiple register sets. For the case of a single register set, our method simultaneously copes with instruction selection, instruction scheduling, and register allocation. For clustered VLIW architectures, we also integrate the optimal partitioning of instructions, allocation of registers for temporary variables, and scheduling of data transfer operations between clusters. Our method is implemented in the prototype of a retargetable code generation framework for digital signal processors (DSPs), called OPTIMIST. We present results for the processors ARM9E, TI C62x, and a single-cluster variant of C62x. Our results show that the method can produce optimal solutions for small and (in the case of a single register set) medium-sized problem instances with a reasonable amount of time and space. For larger problem instances, our method can be seamlessly changed into a heuristic. Copyright (c) 2006 John Wiley & Sons, Ltd.

  • 5.
    Kessler, Christoph
    et al.
    Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory. Linköping University, The Institute of Technology.
    Lowe, W
    Linnaeus University.
    Optimized composition of performance-aware parallel components2012In: Concurrency and Computation, ISSN 1532-0626, E-ISSN 1532-0634, Vol. 24, no 5, p. 481-498Article in journal (Refereed)
    Abstract [en]

    We describe the principles of a novel framework for performance-aware composition of sequential and explicitly parallel software components with implementation variants. Automatic composition results in a table-driven implementation that, for each parallel call of a performance-aware component, looks up the expected best implementation variant, processor allocation and schedule given the current problem, and processor group sizes. The dispatch tables are computed off-line at component deployment time by an interleaved dynamic programming algorithm from time-prediction meta-code provided by the component supplier.

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