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  • 1.
    Aamir, Syed Ahmed
    Linköping University. Linköping University, Department of Electrical Engineering.
    A 65nm, Low Voltage, Fully Differential, SC Programmable Gain Amplifier for Video AFE2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Due to rapid growth of home entertainment consumer market, video technology has been continuously pushed to deliver sharper pictures with higher resolution. This has brought about stringent requirements on the video analog front end, which often coupled with the low power and low voltage regulations had to deal with short channel effects of the deep submicron CMOS processes.

    This thesis presents the design of a fully differential programmable gain amplifier, as a subcircuit of a larger video digitizing IC designed at division of Electronic Systems. The switched capacitor architecture of the PGA does not only buffer the signal, but performs compensation for the sync-tip of analog video signal.

    The pseudo differential OTA eliminates tail current source and maintains high signal swing and has efficient common mode feedforward mechanism. When coupled with a similar stage provides inherent common moode feedback without using an additional SC-CMFB block.

    The PGA has been implemented using a 65 nm digital CMOS process. Expected difficulties in a 1.2 V OTA design make themselves evident in 65 nm, which is why cascaded OTA structures were inevitable for attaining gain specification of 60 dB. Nested Miller compensation with a pole shifting source follower, stabilizes the multipole system. The final circuit attains up to 200 MHz bandwidth and maintains high output swing of 0.85 V. High slew rate and good common mode and power supply rejection are observed. Noise requirements require careful design of input differential stage. Although output source follower stabilized the system, it reduces significant bandwidth and adds to second order non-linearity.

  • 2.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 1.2-V pseudo-differential OTA with common-mode feedforward in 65-nm CMOS2010In: 17th IEEE International Conference on Electronics, Circuits, and Systems., www.ieee.org , 2010, 29-32 p.Conference paper (Refereed)
    Abstract [en]

    In this work, we describe the implementation of a 1. 2-V pseudo-differential operational transconductance amplifier (OTA) with common-mode feedforward (CMFF) and inher­ent common-mode feedback (CMFB) in a 65-nm, digital CMOS process. The OTA architecture provides an inher­ent CMFB when cascaded OTA structures are utilized andthis work has studied a cascaded amplifier consisting of fourstages. Due to the low-gain using core 65-nm circuit de­vices, the overall gain must be distributed on all four stages to acquire a gain of more than 60 dB, while maintaining a-3-dB bandwidth of 200 MHz. To achieve high gain, we propose using a modified, positive-feedback, cross-coupled input differential stage. The modified OTA achieves a high output swing of ± 0.85 V due to only two stacked transistors, 88 dB DC gain and a third-order harmonic of -60 dB for 800 mVpp at 30 MHz. Further on, in a capacitive buffer configuration, we achieve a high slew rate of 1240 V/µS, -3-dB bandwidth of 509 MHz, signal-to-noise ratio of 63 dB while consuming 10.4 mW power.

  • 3.
    Aamir, Syed Ahmed
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 500-MHz low-voltage programmable gain amplifier for HD video in 65-nm CMOS2010In: Proceedings of 28th IEEE Norchip Conference., NORCHIP'10, Tampere: www.ieee.org , 2010, 1-4 p.Conference paper (Refereed)
    Abstract [en]

    This work describes the implementation of a 1.2-V programmable gain amplifier (PGA) for high-definition (HD) video digitizers in a 65-nm digital CMOS process. The “pseudo” switched-capacitor (SC) PGA architecture buffers the video signal, without switching, during the active video. The SC circuitry is used for setup of DC operating point during horizontal and vertical blanking periods. Additionally, it compensates for the `sync-tip' of analog video signals to an equal blanking level for increased dynamic range to the digitizer following the PGA. The operational transconductance amplifier (OTA) employed as main amplifier in the PGA is a pseudo-differential, positive-feedback input stage architecture with a common-mode feedforward (CMFF) technique. The common-mode feedback (CMFB) is provided once two OTAs are cascaded. Schematic-level simulation results show that the OTA maintains a -3-dB bandwidth of 550 MHz, while keeping the distortion HD3 at -60 dB for a 30-MHz, 850 mVpp high definition video signal. The 88 dB DC gain is distributed among four OTA stages and the overall, combined PGA achieves a signal-to-noise ratio of 63 dB. Due to only two stacked transistors, it achieves high output swing of ±0.85 V, 1240 V/μs slew rate while consuming 10.4 mW power.

  • 4.
    Abbas, Muhammad
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On the Implementation of Integer and Non-Integer Sampling Rate Conversion2012Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    The main focus in this thesis is on the aspects related to the implementation of integer and non-integer sampling rate conversion (SRC). SRC is used in many communication and signal processing applications where two signals or systems having different sampling rates need to be interconnected. There are two basic approaches to deal with this problem. The first is to convert the signal to analog and then re-sample it at the desired rate. In the second approach, digital signal processing techniques are utilized to compute values of the new samples from the existing ones. The former approach is hardly used since the latter one introduces less noise and distortion. However, the implementation complexity for the second approach varies for different types of conversion factors. In this work, the second approach for SRC is considered and its implementation details are explored. The conversion factor in general can be an integer, a ratio of two integers, or an irrational number. The SRC by an irrational numbers is impractical and is generally stated for the completeness. They are usually approximated by some rational factor.

    The performance of decimators and interpolators is mainly determined by the filters, which are there to suppress aliasing effects or removing unwanted images. There are many approaches for the implementation of decimation and interpolation filters, and cascaded integrator comb (CIC) filters are one of them. CIC filters are most commonly used in the case of integer sampling rate conversions and often preferred due to their simplicity, hardware efficiency, and relatively good anti-aliasing (anti-imaging) characteristics for the first (last) stage of a decimation (interpolation). The multiplierless nature, which generally yields to low power consumption, makes CIC filters well suited for performing conversion at higher rate. Since these filters operate at the maximum sampling frequency, therefore, are critical with respect to power consumption. It is therefore necessary to have an accurate and efficient ways and approaches that could be utilized to estimate the power consumption and the important factors that are contributing to it. Switching activity is one such factor. To have a high-level estimate of dynamic power consumption, switching activity equations in CIC filters are derived, which may then be used to have an estimate of the dynamic power consumption. The modeling of leakage power is also included, which is an important parameter to consider since the input sampling rate may differ several orders of magnitude. These power estimates at higher level can then be used as a feed-back while exploring multiple alternatives.

    Sampling rate conversion is a typical example where it is required to determine the values between existing samples. The computation of a value between existing samples can alternatively be regarded as delaying the underlying signal by a fractional sampling period. The fractional-delay filters are used in this context to provide a fractional-delay adjustable to any desired value and are therefore suitable for both integer and non-integer factors. The structure that is used in the efficient implementation of a fractional-delay filter is know as Farrow structure or its modifications. The main advantage of the Farrow structure lies in the fact that it consists of fixed finite-impulse response (FIR) filters and there is only one adjustable fractional-delay parameter, used to evaluate a polynomial with the filter outputs as coefficients. This characteristic of the Farrow structure makes it a very attractive structure for the implementation. In the considered fixed-point implementation of the Farrow structure, closed-form expressions for suitable word lengths are derived based on scaling and round-off noise. Since multipliers share major portion of the total power consumption, a matrix-vector multiple constant multiplication approach is proposed to improve the multiplierless implementation of FIR sub-filters.

    The implementation of the polynomial part of the Farrow structure is investigated by considering the computational complexity of different polynomial evaluation schemes. By considering the number of operations of different types, critical path, pipelining complexity, and latency after pipelining, high-level comparisons are obtained and used to short list the suitable candidates. Most of these evaluation schemes require the explicit computation of higher order power terms. In the parallel evaluation of powers, redundancy in computations is removed by exploiting any possible sharing at word level and also at bit level. As a part of this, since exponents are additive under multiplication, an ILP formulation for the minimum addition sequence problem is proposed.

    List of papers
    1. Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology
    Open this publication in new window or tab >>Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology
    2010 (English)In: Proceedings of International Conference on Green Circuits and Systems (ICGCS), 2010, Date: 21-23 June, 2010, IEEE , 2010, 221-225 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    The power modeling of different realizations of cascaded integrator-comb (CIC) decimation filters has been a subject of several recent works. In this work we have extended these with modeling of leakage power, which is an important factor since the input sample rate may differ several orders of magnitude. Furthermore, we have pointed out the importance of the input wordlength on the comparison of recursive and nonrecursive implementations.

    Place, publisher, year, edition, pages
    IEEE, 2010
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70451 (URN)10.1109/ICGCS.2010.5543063 (DOI)978-1-4244-6877-5 (ISBN)978-1-4244-6876-8 (ISBN)
    Conference
    International Conference on Green Circuits and Systems (ICGCS), June 21–23, Shanghai, China
    Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    2. Switching Activity Estimation of CIC Filter Integrators
    Open this publication in new window or tab >>Switching Activity Estimation of CIC Filter Integrators
    2010 (English)In: Proceedings of Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2010, Date:22-24 Sept. 2010, IEEE , 2010, 21-24 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, a method for estimation of the switching activity in integrators is presented. To achieve low power, it is always necessary to develop accurate and efficient methods to estimate the switching activity. The switching activities are then used to estimate the power consumption. In our work, the switching activity is first estimated for the general purpose integrators and then it is extended for the estimation of switching activity in cascaded integrators in CIC filters.

    Place, publisher, year, edition, pages
    IEEE, 2010
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70452 (URN)10.1109/PRIMEASIA.2010.5604971 (DOI)978-1-4244-6736-5 (ISBN)978-1-4244-6735-8 (ISBN)
    Conference
    Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 22-24 September, Shanghai, China
    Note
    ©2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. MUHAMMAD ABBAS and Oscar Gustafsson, Switching Activity Estimation of CIC Filter Integrators, 2010, Asia Pacific Conf. on Postgraduate Research in Microelectronics and Electronics, Shanghai, China. http://dx.doi.org/10.1109/PRIMEASIA.2010.5604971 Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    3. Scaling of fractional delay filters based on the Farrow structure
    Open this publication in new window or tab >>Scaling of fractional delay filters based on the Farrow structure
    2009 (English)In: Proceedings of IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009, Piscataway: IEEE , 2009, 489-492 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work we consider scaling of fractional delay filters using the Farrow structure. Based on the observation that the subfilters approximate the Taylor expansion of a differentiator, we derive estimates of the L2-norm scaling values at the outputs of each subfilter as well as at the inputs of each delay multiplier. The scaling values can then be used to derive suitable wordlengths in a fixed-point implementation.

    Place, publisher, year, edition, pages
    Piscataway: IEEE, 2009
    National Category
    Signal Processing
    Identifiers
    urn:nbn:se:liu:diva-51070 (URN)10.1109/ISCAS.2009.5117792 (DOI)000275929800123 ()978-1-4244-3827-3 (ISBN)
    Conference
    IEEE International Symposium on Circuits and Systems, 24-27 May 2009, Taipei,Taiwan
    Available from: 2009-10-15 Created: 2009-10-15 Last updated: 2015-03-11Bibliographically approved
    4. Computational and Implementation Complexity of Polynomial Evaluation Schemes
    Open this publication in new window or tab >>Computational and Implementation Complexity of Polynomial Evaluation Schemes
    2011 (English)In: Proceedings of NORCHIP, 2011 Date:14-15 Nov. 2011, IEEE conference proceedings, 2011, 1-6 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, we consider the computational complexity of different polynomial evaluation schemes. By considering the number of operations of different types, critical path, pipelining complexity, and latency after pipelining, high-level comparisons are obtained. These can then be used to short list suitable candidates for an implementation given the specifications. Not only multiplications are considered, but they are divided into data-data multiplications, squarers, and data-coefficient multiplications, as the latter can be optimized depending on implementation architecture and application.

    Place, publisher, year, edition, pages
    IEEE conference proceedings, 2011
    Keyword
    Adders, Computer architecture, Delay, Filtering algorithms, ISO, Pipeline processing, Polynomials
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73935 (URN)10.1109/NORCHP.2011.6126735 (DOI)978-1-4577-0515-1 (ISBN)978-1-4577-0514-4 (ISBN)
    Conference
    NORCHIP 2011. The Nordic Microelectronics event, 29th Norchip Conference 14-15 November 2011, Lund, Sweden
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
    5. Low-Complexity Parallel Evaluation of Powers Exploiting Bit-Level Redundancy
    Open this publication in new window or tab >>Low-Complexity Parallel Evaluation of Powers Exploiting Bit-Level Redundancy
    2010 (English)In: Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), 2010, 7-10 Nov. 2010 / [ed] Michael B. Matthews, Washington, DC, USA: IEEE Computer Society , 2010, 1168-1172 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    In this work, we investigate the problem of computing any requested set of power terms in parallel using summations trees. This problem occurs in applications like polynomial approximation, Farrow filters (polynomial evaluation part) etc. In the proposed technique, the partial product of each power term is initially computed independently. A redundancy check is then made in each and among all partial products matrices at bit level. The redundancy here relates to the fact that same three partial products may be present in more than one columns, and, hence, can be mapped to the same full adder. The proposed algorithm is tested for different sets of powers and wordlengths to exploit the sharing potential.

    Place, publisher, year, edition, pages
    Washington, DC, USA: IEEE Computer Society, 2010
    Series
    Asilomar Conference on Signals, Systems and Computers. Conference Record, ISSN 1058-6393
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-70453 (URN)10.1109/ACSSC.2010.5757714 (DOI)978-1-4244-9722-5 (ISBN)
    Conference
    Signals, Systems and Computers (ASILOMAR), 2010, 7-10 Nov. 2010 , Pacific Grove, CA, USA
    Available from: 2011-09-20 Created: 2011-09-08 Last updated: 2015-03-11Bibliographically approved
    6. Integer Linear Programming Modeling of Addition Sequences With Additional Constraints for Evaluation of Power Terms
    Open this publication in new window or tab >>Integer Linear Programming Modeling of Addition Sequences With Additional Constraints for Evaluation of Power Terms
    (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In this work, an integer linear programming (ILP) based model is proposed for the computation of a minimal cost addition sequence for a given set of integers. Since exponents are additive under multiplication, the minimal length addition sequence will provide an optimal solution for the evaluation of a requested set of power terms. This in turn finds application in, e.g., window-based exponentiation for cryptography and polynomial evaluation. Not only is an optimal model proposed, the model is extended to consider different costs for multipliers and squarers as well as controlling the depth of the resulting addition sequence.

    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73936 (URN)
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
    7. Switching Activity Estimation of DDFS Phase Accumulators
    Open this publication in new window or tab >>Switching Activity Estimation of DDFS Phase Accumulators
    (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In this letter, equations for the one’s probability and switching activities for direct digital frequency synthesis (DDFS) phase accumulators are derived. These results are useful for obtaining good accuracy estimated of both leakage and dynamic power consumption for the phase accumulator and the phase-to-magnitude converter.

    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-73937 (URN)
    Available from: 2012-01-17 Created: 2012-01-17 Last updated: 2015-03-11Bibliographically approved
  • 5.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Computational and Implementation Complexity of Polynomial Evaluation Schemes2011In: Proceedings of NORCHIP, 2011 Date:14-15 Nov. 2011, IEEE conference proceedings, 2011, 1-6 p.Conference paper (Refereed)
    Abstract [en]

    In this work, we consider the computational complexity of different polynomial evaluation schemes. By considering the number of operations of different types, critical path, pipelining complexity, and latency after pipelining, high-level comparisons are obtained. These can then be used to short list suitable candidates for an implementation given the specifications. Not only multiplications are considered, but they are divided into data-data multiplications, squarers, and data-coefficient multiplications, as the latter can be optimized depending on implementation architecture and application.

  • 6.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Integer Linear Programming Modeling of Addition Sequences With Additional Constraints for Evaluation of Power TermsManuscript (preprint) (Other academic)
    Abstract [en]

    In this work, an integer linear programming (ILP) based model is proposed for the computation of a minimal cost addition sequence for a given set of integers. Since exponents are additive under multiplication, the minimal length addition sequence will provide an optimal solution for the evaluation of a requested set of power terms. This in turn finds application in, e.g., window-based exponentiation for cryptography and polynomial evaluation. Not only is an optimal model proposed, the model is extended to consider different costs for multipliers and squarers as well as controlling the depth of the resulting addition sequence.

  • 7.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Switching Activity Estimation of CIC Filter Integrators2010In: Proceedings of Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2010, Date:22-24 Sept. 2010, IEEE , 2010, 21-24 p.Conference paper (Refereed)
    Abstract [en]

    In this work, a method for estimation of the switching activity in integrators is presented. To achieve low power, it is always necessary to develop accurate and efficient methods to estimate the switching activity. The switching activities are then used to estimate the power consumption. In our work, the switching activity is first estimated for the general purpose integrators and then it is extended for the estimation of switching activity in cascaded integrators in CIC filters.

  • 8.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Switching Activity Estimation of DDFS Phase AccumulatorsManuscript (preprint) (Other academic)
    Abstract [en]

    In this letter, equations for the one’s probability and switching activities for direct digital frequency synthesis (DDFS) phase accumulators are derived. These results are useful for obtaining good accuracy estimated of both leakage and dynamic power consumption for the phase accumulator and the phase-to-magnitude converter.

  • 9.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Blad, Anton
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Low-Complexity Parallel Evaluation of Powers Exploiting Bit-Level Redundancy2010In: Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), 2010, 7-10 Nov. 2010 / [ed] Michael B. Matthews, Washington, DC, USA: IEEE Computer Society , 2010, 1168-1172 p.Conference paper (Refereed)
    Abstract [en]

    In this work, we investigate the problem of computing any requested set of power terms in parallel using summations trees. This problem occurs in applications like polynomial approximation, Farrow filters (polynomial evaluation part) etc. In the proposed technique, the partial product of each power term is initially computed independently. A redundancy check is then made in each and among all partial products matrices at bit level. The redundancy here relates to the fact that same three partial products may be present in more than one columns, and, hence, can be mapped to the same full adder. The proposed algorithm is tested for different sets of powers and wordlengths to exploit the sharing potential.

  • 10.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Håkan
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On the Fixed-Point Implementation of Fractional-Delay Filters Based on the Farrow Structure2013In: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, ISSN 1549-8328, E-ISSN 1558-0806, Vol. 60, no 4, 926-937 p.Article in journal (Refereed)
    Abstract [en]

    In this paper, the fixed-point implementation of adjustable fractional-delay filters using the Farrow structure is considered. Based on the observation that the sub-filters approximate differentiators, closed-form expressions for the L-2-norm scaling values at the outputs of each sub-filter as well as at the inputs of each delay multiplier are derived. The scaling values can then be used to derive suitable word lengths by also considering the round-off noise analysis and optimization. Different approaches are proposed to derive suitable word lengths including one based on integer linear programming, which always gives an optimal allocation. Finally, a new approach for multiplierless implementation of the sub-filters in the Farrow structure is suggested. This is shown to reduce register complexity and, for most word lengths, require less number of adders and subtracters when compared to existing approaches.

  • 11.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Håkan
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Scaling of fractional delay filters based on the Farrow structure2009In: Proceedings of IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009, Piscataway: IEEE , 2009, 489-492 p.Conference paper (Refereed)
    Abstract [en]

    In this work we consider scaling of fractional delay filters using the Farrow structure. Based on the observation that the subfilters approximate the Taylor expansion of a differentiator, we derive estimates of the L2-norm scaling values at the outputs of each subfilter as well as at the inputs of each delay multiplier. The scaling values can then be used to derive suitable wordlengths in a fixed-point implementation.

  • 12.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wanhammar, Lars
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology2010In: Proceedings of International Conference on Green Circuits and Systems (ICGCS), 2010, Date: 21-23 June, 2010, IEEE , 2010, 221-225 p.Conference paper (Refereed)
    Abstract [en]

    The power modeling of different realizations of cascaded integrator-comb (CIC) decimation filters has been a subject of several recent works. In this work we have extended these with modeling of leakage power, which is an important factor since the input sample rate may differ several orders of magnitude. Furthermore, we have pointed out the importance of the input wordlength on the comparison of recursive and nonrecursive implementations.

  • 13.
    Abbas, Muhammad
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Qureshi, Fahad
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Ullah Sheikh, Zaka
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Håkan
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Johansson, Kenny
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Comparison of Multiplierless Implementation of Nonlinear-Phase Versus Linear-Phase FIR filters2008Conference paper (Refereed)
    Abstract [en]

    FIR filters are often used because of their linear-phase response. However, there are certain applications where the linear-phase property is not required, such as signal energy estimation, but IIR filters can not be used due to the limitation of sample rate imposed by the recursive algorithm. In this work, we discuss multiplierless implementation of minimum order, and therefore nonlinear-phase, FIR filters and compare it to the linear-phase counterpart.

  • 14.
    Abdullah Jan, Mirza
    et al.
    Linköping University, Department of Electrical Engineering.
    Ahsan, Mahmododfateh
    Linköping University, Department of Electrical Engineering.
    Multi-View Video Transmission over the Internet2010Independent thesis Advanced level (degree of Master (Two Years)), 30 credits / 45 HE creditsStudent thesis
    Abstract [en]

    3D television using multiple views rendering is receiving increasing interest. In this technology a number of video sequences are transmitted simultaneously and provides a larger view of the scene or stereoscopic viewing experience. With two views stereoscopic rendition is possible. Nowadays 3D displays are available that are capable of displaying several views simultaneously and the user is able to see different views by moving his head.

    The thesis work aims at implementing a demonstration system with a number of simultaneous views. The system will include two cameras, computers at both the transmitting and receiving end and a multi-view display. Besides setting up the hardware, the main task is to implement software so that the transmission can be done over an IP-network.

    This thesis report includes an overview and experiences of similar published systems, the implementation of real time video, its compression, encoding, and transmission over the internet with the help of socket programming and finally the multi-view display in 3D format.  This report also describes the design considerations more precisely regarding the video coding and network protocols.

  • 15.
    Aberger, Martin
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Effects of Nonlinearities in Black Box Identification of an Industrial Robot2000Report (Other academic)
    Abstract [en]

    This paper discusses effects of nonlinearities in black box identification of one axis of a robot. The used data come from a commercial ABB robot, IRB1400. A three-mass flexible model for the robot was built in MathModelica. The nonlinearities in the model are nonlinear friction and backlash in the gear box.

  • 16.
    Abidin, Aysajan
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Authentication in Quantum Key Distribution: Security Proof and Universal Hash Functions2013Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Quantum Key Distribution (QKD) is a secret key agreement technique that consists of two parts: quantum transmission and measurement on a quantum channel, and classical post-processing on a public communication channel. It enjoys provable unconditional security provided that the public communication channel is immutable. Otherwise, QKD is vulnerable to a man-in-the-middle attack. Immutable public communication channels, however, do not exist in practice. So we need to use authentication that implements the properties of an immutable channel as well as possible. One scheme that serves this purpose well is the Wegman-Carter authentication (WCA), which is built upon Almost Strongly Universal2 (ASU2) hashing. This scheme uses a new key in each authentication attempt to select a hash function from an ASU2 family, which is then used to generate the authentication tag for a message.

    The main focus of this dissertation is on authentication in the context of QKD. We study ASU2 hash functions, security of QKD that employs a computationally secure authentication, and also security of authentication with a partially known key. Specifically, we study the following.

    First, Universal hash functions and their constructions are reviewed, and as well as a new construction of ASU2 hash functions is presented. Second, security of QKD that employs a specific computationally secure authentication is studied. We present detailed attacks on various practical implementations of QKD that employs this authentication. We also provide countermeasures and prove necessary and sufficient conditions for upgrading the security of the authentication to the level of unconditional security. Third, Universal hash function based multiple authentication is studied. This uses a fixed ASU2 hash function followed by one-time pad encryption, to keep the hash function secret. We show that the one-time pad is necessary in every round for the authentication to be unconditionally secure. Lastly, we study security of the WCA scheme, in the case of a partially known authentication key. Here we prove tight information-theoretic security bounds and also analyse security using witness indistinguishability as used in the Universal Composability framework.

    List of papers
    1. New Universal Hash Functions
    Open this publication in new window or tab >>New Universal Hash Functions
    2012 (English)In: Lecture Notes in Computer Science, Vol. 7242 / [ed] Frederik Armknecht and Stefan Lucks, Springer Berlin Heidelberg , 2012, 99-108 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    Universal hash functions are important building blocks for unconditionally secure message authentication codes. In this paper, we present a new construction of a class of Almost Strongly Universal hash functions with much smaller description (or key) length than the Wegman-Carter construction. Unlike some other constructions, our new construction has a very short key length and a security parameter that is independent of the message length, which makes it suitable for authentication in practical applications such as Quantum Cryptography.

    Place, publisher, year, edition, pages
    Springer Berlin Heidelberg, 2012
    Series
    Lecture Notes in Computer Science, ISSN 0302-9743 (print), 1611-3349 (online) ; 7242
    National Category
    Other Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-84711 (URN)10.1007/978-3-642-34159-5_7 (DOI)978-3-642-34158-8 (ISBN)978-3-642-34159-5 (ISBN)
    Conference
    4th Western European Workshop on Research in Cryptology, WEWoRC 2011, Weimar, Germany, July 20-22, 2011
    Projects
    ICG QC
    Available from: 2012-10-18 Created: 2012-10-17 Last updated: 2016-08-31
    2. Vulnerability of "A Novel Protocol-Authentication Algorithm Ruling out a Man-in-the-Middle Attack in Quantum Cryptography"
    Open this publication in new window or tab >>Vulnerability of "A Novel Protocol-Authentication Algorithm Ruling out a Man-in-the-Middle Attack in Quantum Cryptography"
    2009 (English)In: International Journal of Quantum Information, ISSN 0219-7499, Vol. 7, no 5, 1047-1052 p.Article in journal (Refereed) Published
    Abstract [en]

    In this paper, we review and comment on "A novel protocol-authentication algorithm ruling out a man-in-the-middle attack in quantum cryptography" [M. Peev et al., Int. J. Quant. Inf. 3 (2005) 225]. In particular, we point out that the proposed primitive is not secure when used in a generic protocol, and needs additional authenticating properties of the surrounding quantum-cryptographic protocol.

    Keyword
    Quantum cryptography, quantum key distribution, authentication
    National Category
    Natural Sciences
    Identifiers
    urn:nbn:se:liu:diva-20405 (URN)10.1142/S0219749909005754 (DOI)
    Projects
    ICG QC
    Available from: 2009-09-08 Created: 2009-09-07 Last updated: 2016-08-31Bibliographically approved
    3. Attacks on quantum key distribution protocols that employ non-ITS authentication
    Open this publication in new window or tab >>Attacks on quantum key distribution protocols that employ non-ITS authentication
    Show others...
    2016 (English)In: Quantum Information Processing, ISSN 1570-0755, E-ISSN 1573-1332, Vol. 15, no 1, 327-362 p.Article in journal (Refereed) Published
    Abstract [en]

    We demonstrate how adversaries with unbounded computing resources can break Quantum Key Distribution (QKD) protocols which employ a particular message authentication code suggested previously. This authentication code, featuring low key consumption, is not Information-Theoretically Secure (ITS) since for each message the eavesdropper has intercepted she is able to send a different message from a set of messages that she can calculate by finding collisions of a cryptographic hash function. However, when this authentication code was introduced it was shown to prevent straightforward Man-In-The-Middle (MITM) attacks against QKD protocols.

    In this paper, we prove that the set of messages that collide with any given message under this authentication code contains with high probability a message that has small Hamming distance to any other given message. Based on this fact we present extended MITM attacks against different versions of BB84 QKD protocols using the addressed authentication code; for three protocols we describe every single action taken by the adversary. For all protocols the adversary can obtain complete knowledge of the key, and for most protocols her success probability in doing so approaches unity.

    Since the attacks work against all authentication methods which allow to calculate colliding messages, the underlying building blocks of the presented attacks expose the potential pitfalls arising as a consequence of non-ITS authentication in QKDpostprocessing. We propose countermeasures, increasing the eavesdroppers demand for computational power, and also prove necessary and sufficient conditions for upgrading the discussed authentication code to the ITS level.

    Place, publisher, year, edition, pages
    Springer Publishing Company, 2016
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-91260 (URN)10.1007/s11128-015-1160-4 (DOI)000372876800020 ()
    Projects
    ICG QC
    Note

    Vid tiden för disputation förelåg publikationen som manuskript

    Funding agencies: Vienna Science and Technology Fund (WWTF) [ICT10-067]; Austrian Research Promotion Agency (FFG) [Bridge-2364544]

    Available from: 2013-04-18 Created: 2013-04-18 Last updated: 2017-12-06Bibliographically approved
    4. On Security of Universal Hash Function Based Multiple Authentication
    Open this publication in new window or tab >>On Security of Universal Hash Function Based Multiple Authentication
    2012 (English)In: Lecture Notes in Computer Science, Vol. 7618 / [ed] Chim, Tat Wing and Yuen, Tsz Hon, 2012, 303-310 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    Universal hash function based multiple authentication was originally proposed by Wegman and Carter in 1981. In this authentication, a series of messages are authenticated by first hashing each message by a fixed (almost) strongly universal$_2$ hash function and then encrypting the hash value with a preshared one-time pad. This authentication is unconditionally secure. In this paper, we show that the unconditional security cannot be guaranteed if the hash function output for the first message is not encrypted, as remarked in [Atici and Stinson, CRYPTO '96. LNCS, vol. 1109]. This means that it is not only sufficient, but also necessary, to encrypt the hash of every message to be authenticated in order to have unconditional security. The security loss is demonstrated by a simple existential forgery attack.

    Series
    Lecture Notes in Computer Science, ISSN 0302-9743 (print), 1611-3349 (online) ; 7618
    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-84732 (URN)10.1007/978-3-642-34129-8_27 (DOI)978-3-642-34128-1 (ISBN)978-3-642-34129-8 (ISBN)
    Conference
    14th International Conference on Information and Communications Security, ICICS 2012, Hong Kong, China, October 29-31, 2012
    Projects
    ICG QC
    Available from: 2012-10-18 Created: 2012-10-18 Last updated: 2014-11-11
    5. Direct proof of security of Wegman-Carter authentication with partially known key
    Open this publication in new window or tab >>Direct proof of security of Wegman-Carter authentication with partially known key
    2014 (English)In: Quantum Information Processing, ISSN 1570-0755, E-ISSN 1573-1332, Vol. 13, no 10, 2155-2170 p.Article in journal (Refereed) Published
    Abstract [en]

    Information-theoretically secure (ITS) authentication is needed in Quantum Key Distribution (QKD). In this paper, we study security of an ITS authentication scheme proposed by Wegman& Carter, in the case of partially known authentication key. This scheme uses a new authentication key in each authentication attempt, to select a hash function from an Almost Strongly Universal2 hash function family. The partial knowledge of the attacker is measured as the trace distance between the authentication key distribution and the uniform distribution; this is the usual measure in QKD. We provide direct proofs of security of the scheme, when using partially known key, first in the information-theoretic setting and then in terms of witness indistinguishability as used in the Universal Composability (UC) framework. We find that if the authentication procedure has a failure probability ε and the authentication key has an ε´ trace distance to the uniform, then under ITS, the adversary’s success probability conditioned on an authentic message-tag pair is only bounded by ε +|Ƭ|ε´, where |Ƭ| is the size of the set of tags. Furthermore, the trace distance between the authentication key distribution and the uniform increases to |Ƭ|ε´ after having seen an authentic message-tag pair. Despite this, we are able to prove directly that the authenticated channel is indistinguishable from an (ideal) authentic channel (the desired functionality), except with probability less than ε + ε´. This proves that the scheme is (ε + ε´)-UC-secure, without using the composability theorem.

    Place, publisher, year, edition, pages
    Springer, 2014
    Keyword
    Authentication, Strongly Universal hash functions, Partially known key, Trace distance, Universal Composability, Quantum Key Distribution.
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-91264 (URN)10.1007/s11128-013-0641-6 (DOI)000341842000002 ()
    Projects
    ICG QC
    Available from: 2013-04-18 Created: 2013-04-18 Last updated: 2017-12-06Bibliographically approved
  • 17.
    Abidin, Aysajan
    Linköping University, Department of Electrical Engineering, Information Coding.
    On Security of Universal Hash Function Based Multiple Authentication2012In: Lecture Notes in Computer Science, Vol. 7618 / [ed] Chim, Tat Wing and Yuen, Tsz Hon, 2012, 303-310 p.Conference paper (Refereed)
    Abstract [en]

    Universal hash function based multiple authentication was originally proposed by Wegman and Carter in 1981. In this authentication, a series of messages are authenticated by first hashing each message by a fixed (almost) strongly universal$_2$ hash function and then encrypting the hash value with a preshared one-time pad. This authentication is unconditionally secure. In this paper, we show that the unconditional security cannot be guaranteed if the hash function output for the first message is not encrypted, as remarked in [Atici and Stinson, CRYPTO '96. LNCS, vol. 1109]. This means that it is not only sufficient, but also necessary, to encrypt the hash of every message to be authenticated in order to have unconditional security. The security loss is demonstrated by a simple existential forgery attack.

  • 18.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Direct proof of security of Wegman-Carter authentication with partially known key2014In: Quantum Information Processing, ISSN 1570-0755, E-ISSN 1573-1332, Vol. 13, no 10, 2155-2170 p.Article in journal (Refereed)
    Abstract [en]

    Information-theoretically secure (ITS) authentication is needed in Quantum Key Distribution (QKD). In this paper, we study security of an ITS authentication scheme proposed by Wegman& Carter, in the case of partially known authentication key. This scheme uses a new authentication key in each authentication attempt, to select a hash function from an Almost Strongly Universal2 hash function family. The partial knowledge of the attacker is measured as the trace distance between the authentication key distribution and the uniform distribution; this is the usual measure in QKD. We provide direct proofs of security of the scheme, when using partially known key, first in the information-theoretic setting and then in terms of witness indistinguishability as used in the Universal Composability (UC) framework. We find that if the authentication procedure has a failure probability ε and the authentication key has an ε´ trace distance to the uniform, then under ITS, the adversary’s success probability conditioned on an authentic message-tag pair is only bounded by ε +|Ƭ|ε´, where |Ƭ| is the size of the set of tags. Furthermore, the trace distance between the authentication key distribution and the uniform increases to |Ƭ|ε´ after having seen an authentic message-tag pair. Despite this, we are able to prove directly that the authenticated channel is indistinguishable from an (ideal) authentic channel (the desired functionality), except with probability less than ε + ε´. This proves that the scheme is (ε + ε´)-UC-secure, without using the composability theorem.

  • 19.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding.
    New Universal Hash Functions2012In: Lecture Notes in Computer Science, Vol. 7242 / [ed] Frederik Armknecht and Stefan Lucks, Springer Berlin Heidelberg , 2012, 99-108 p.Conference paper (Refereed)
    Abstract [en]

    Universal hash functions are important building blocks for unconditionally secure message authentication codes. In this paper, we present a new construction of a class of Almost Strongly Universal hash functions with much smaller description (or key) length than the Wegman-Carter construction. Unlike some other constructions, our new construction has a very short key length and a security parameter that is independent of the message length, which makes it suitable for authentication in practical applications such as Quantum Cryptography.

  • 20.
    Abidin, Aysajan
    et al.
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Pacher, Christoph
    Austrian Institute of Technology, Austria.
    Lorünser, Thomas
    Austrian Institute of Technology, Austria.
    Larsson, Jan-Åke
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Peev, Momtchil
    Austrian Institute of Technology, Austria.
    Quantum cryptography and authentication with low key-consumption2011In: Proceedings of SPIE - The International Society for Optical Engineering, 2011, 818916- p.Conference paper (Refereed)
    Abstract [en]

    Quantum Key Distribution (QKD - also referred to as Quantum Cryptography) is a technique for secret key agreement. It has been shown that QKD rigged with Information-Theoretic Secure (ITS) authentication (using secret key) of the classical messages transmitted during the key distribution protocol is also ITS. Note, QKD without any authentication can trivially be broken by man-in-the-middle attacks. Here, we study an authentication method that was originally proposed because of its low key consumption; a two-step authentication that uses a publicly known hash function, followed by a secret strongly universal2 hash function, which is exchanged each round. This two-step authentication is not information-theoretically secure but it was argued that nevertheless it does not compromise the security of QKD. In the current contribution we study intrinsic weaknesses of this approach under the common assumption that the QKD adversary has access to unlimited resources including quantum memories. We consider one implementation of Quantum Cryptographic protocols that use such authentication and demonstrate an attack that fully extract the secret key. Even including the final key from the protocol in the authentication does not rule out the possibility of these attacks. To rectify the situation, we propose a countermeasure that, while not informationtheoretically secure, restores the need for very large computing power for the attack to work. Finally, we specify conditions that must be satisfied by the two-step authentication in order to restore informationtheoretic security.

  • 21.
    Abrahamsson, Björn
    Linköping University, Department of Electrical Engineering.
    Architectures for Multiplication in Galois Rings2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This thesis investigates architectures for multiplying elements in Galois rings of the size 4^m, where m is an integer.

    The main question is whether known architectures for multiplying in Galois fields can be used for Galois rings also, with small modifications, and the answer to that question is that they can.

    Different representations for elements in Galois rings are also explored, and the performance of multipliers for the different representations is investigated.

  • 22.
    Abrahamsson, Henrik
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering.
    Carlson, Peter
    Linköping University, The Institute of Technology.
    Robust Torque Control for Automated Gear Shifting in Heavy Duty Vehicles2008Independent thesis Advanced level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    In an automated manual transmission it is desired to have zero torque in the transmission when disengaging a gear. This minimizes the oscillations in the driveline which increases the comfort and makes the speed synchronization easier. The automated manual transmission system in a Scania truck, called Opticruise, uses engine torque control to achieve zero torque in the transmission.In this thesis different control strategies for engine torque control are proposed in order to minimize the oscillations in the driveline and increase the comfort during a gear shift. A model of the driveline is developed in order to evaluate the control strategies. The main focus was to develop controllers that are easy to implement and that are robust enough to be used in different driveline configurations. This means that model dependent control strategies are not considered.A control strategy with a combination of a feedback from the speed difference between the output shaft speed and the wheel speed, and a feedforward with a linear ramp, showed very good performance in both simulations and tests in trucks. The amplitude of the oscillations in the output shaft speed after neutralengagement are halved compared to the results from the existing method in Scania trucks. The new concept is also more robust against initial conditions and time delay estimations.

  • 23.
    Abrahamsson, Lars
    Linköping University, Department of Electrical Engineering.
    A portal based system for indoor environs2006Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    The purpose of this thesis is to document the development of the graphics part of an extremely pluggable game engine/lab environment for a course in advanced game programming. This thesis is one out of five, and concerns indoor, realtime computer 3D graphics. It covers state-of-the-art techniques such as GLSL - the OpenGL Shading Language - and more well known techniques such as portal based rendering.

  • 24.
    Abrahamsson, Olle
    Linköping University, Department of Electrical Engineering, Communication Systems.
    Hide and Seek in a Social Network2017Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    In this thesis a known heuristic for decreasing a node's centrality scores while maintaining influence, called ROAM, is compared to a modified version specifically designed to decrease eigenvector centrality. The performances of these heuristics are also tested against the Shapley values of a cooperative game played over the considered network, where the game is such that influential nodes receive higher Shapley values. The modified heuristic performed at least as good as the original ROAM, and in some instances even better (especially when the terrorist network behind the World Trade Center attacks was considered). Both heuristics increased the influence score for a given targeted node when applied consecutively on the WTC network, and consequently the Shapley values increased as well. Therefore the Shapley value of the game considered in this thesis seems to be well suited for discovering individuals that are assumed to actively trying to evade social network analysis.

  • 25.
    Abrahamsson, Per
    Linköping University, Department of Electrical Engineering.
    Combined Platform for Boost Guidance and Attitude Control for Sounding Rockets2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This report handles the preliminary design of a control system that includes both attitude control and boost control functionality for sounding rockets. This is done to reduce the weight and volume for the control system.

    A sounding rocket is a small rocket compared to a satellite launcher. It is used to launch payloads into suborbital trajectories. The payload consists of scientific experiments, for example micro-gravity experiments and astronomic observations. The boost guidance system controls the sounding rocket during the launch phase. This is done to minimize the impact dispersion. The attitude control system controls the payload during the experiment phase.

    The system that is developed in this report is based on the DS19 boost guidance system from Saab Ericsson Space AB. The new system is designed by extending DS19 with software and hardware. The new system is therefore named DS19+. Hardware wise a study of the mechanical and electrical interfaces and also of the system budgets for gas, mass and power for the system are done to determine the feasibility for the combined system.

    Further a preliminary design of the control software is done. The design has been implemented as pseudo code in MATLAB for testing and simulations. A simulation model for the sounding rocket andits surroundings during the experiment phase has also been designed and implemented in MATLAB. The tests and simulations that have been performed show that the code is suitable for implementation in the real system.

  • 26.
    Abrahamsson, Sebastian
    et al.
    Linköping University, Department of Electrical Engineering.
    Råbe, Markus
    Linköping University, Department of Electrical Engineering.
    An FPGA implementation of a modulator for digital terrestrial television according to the DTMB standard2010Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The increasing data rates in digital television networks increase the demands on data capacity of the current transmission channels. Through new standards, the capacity of exisiting channels is increased with new methods of error correction coding and modulation.

    This thesis presents the design and implementation of a modulator for transmission of digital terrestrial television according to the Chinese DTMB standard.

    The system is written in VHDL and is intended for implementation on an FPGA.

  • 27.
    Abrahamsson, Thomas
    et al.
    Saab Military Aircraft, Sweden.
    Andersson, Magnus
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    McKelvey, Tomas
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    A Finite Element Model Updating Formulation Using Frequency Responses and Eigenfrequencies1996Report (Other academic)
    Abstract [en]

    A novel frequency and modal domain formulation of the model updating problem is presented. Deviations in discrete frequency responses and eigenfrequencies, between the model to be updated and a reference model, constitute the criterion function. A successful updating thus results in a model with the reference's input-output relations at selected fre- quencies. The formulation is demonstrated to produce a criterion function with a global minimum having a large domain of attraction with respect to stiffness and mass variations. The method relies on mode grouping and uses a new extended modal assurance criterion number (eMAC) for identifying related modes. A quadratic objective with inexpensive evaluation of approximate Hessians give a rapid convergence to a minimum by the use of a regularized Gauss-Newton method. Physical bounds on parameters and complementary data, such as structural weight, are treated by imposing set constraints and linear equality constraints. Efficient function computation is obtained by model reduction using a moderately sized base of modes which is recomputed during the minimization. Statistical properties of updated parameters are discussed. A verification example show the performance of the method.

  • 28.
    Abrahamsson, Tomas
    et al.
    Saab Military Aircraft, Sweden.
    McKelvey, Tomas
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Ljung, Lennart
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    A Study of some Approaches to Vibration Data Analysis1993Report (Other academic)
    Abstract [en]

    Using data from extensive vibrational tests of the new aircraft Saab 2000 three different methods for vibration analysis are studied. These methods are ERA (eigensystem realization algorithm), N4SID (a subspace method) and PEM (prediction error approach). We find that both the ERA and N4SID methods give good initial model parameter estimates that can be further improved by the use of PEM. We also find that all methods give good insights into the vibrational modes.

  • 29.
    Acevedo, Miguel
    Linköping University, Department of Electrical Engineering, Computer Engineering.
    FPGA-Based Hardware-In-the-Loop Co-Simulator Platform for SystemModeler2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis proposes and implements a flexible platform to perform Hardware-In-the-Loop (HIL) co-simulation using a Field-Programmable-Gate-Array (FPGA). The HIL simulations are performed with SystemModeler working as a software simulator and the FPGA as the co-simulator platform for the digital hardware design. The work presented in this thesis consists of the creation of: A communication library in the host computer, a system in the FPGA that allows implementation of different digital designs with varying architectures, and an interface between the host computer and the FPGA to transmit the data. The efficiency of the proposed system is studied with the implementation of two common digital hardware designs, a PID controller and a filter. The results of the HIL simulations of those two hardware designs are used to verify the platform and measure the timing and area performance of the proposed HIL platform.

  • 30.
    Adam, Wettring
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Adaptive Filtering and Nonlinear Models for Post-processing of Weather Forecasts2015Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Kalman filters have been used by SMHI to improve the quality of their forecasts. Until now they have used a linear underlying model to do this. In this thesis it is investigated whether the performance can be improved by the use of nonlinear models such as polynomials and neural networks. The results suggest that an improvement is hard to achieve by this approach and that it is likely not worth the effort to implement a nonlinear model.

  • 31.
    Adamsson, Gustav
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, Faculty of Science & Engineering.
    Fast and Approximate Text Rendering Using Distance Fields2015Independent thesis Advanced level (degree of Master (One Year)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Distance field text rendering has many advantages compared to most other text renderingsolutions. Two of the advantages are the possibility  to scale the glyphs without losing the crisp edge and less memory consumption. A drawback with distance field text renderingcan be high distance field generation time. The solution for fast distance field text renderingin this thesis generates the distance fields by drawing distance gradients locally over the outlines of the glyphs. This method is much faster than the old exact methods for generating distance fields that often includes multiple passes over the whole image.

    Using the solution for text rendering proposed in this thesis results in good looking text that is generated on the fly. The distance fields are generated on a mobile device in less than 10 ms for most of the glyphs in good quality which is less than the time between two frames.

  • 32.
    Adolfson, Magnus
    Linköping University, Department of Electrical Engineering.
    Simulation of Emission Related Faults on a Diesel Engine2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Today's legislation on exhaust gas emissions for heavy duty diesel (HDD) vehicles is more stringent than ever and will be even more tough in the future. More over, in a few years HDD vehicles have to be equipped with OBD (On-Board Diagnostics). This place very high demands on the manufacturers to develop better engines and strategies for OBD. As an aid in the process models can be used.

    This thesis presents extensions of an existing diesel engine model in Matlab/Simulink to be able to simulate emissions during standardized european test cycles. Faults in the sensor and actuator signals are implemented into the model to find out if there is an increase or decrease in the emissions. This is used to create a fault tree where it can be seen why predefined emission thresholds are exceeded. The tree is an aid when developing OBD.

    The results from the simulations showed that almost no faults made the emissions cross the thresholds. The only interesting faults were faults in the ambient temperature sensor and the injection angle actuator. This means that the OBD-system only needs to monitor a few components which implies a smaller system and less work.

  • 33.
    Adolfsson, Klas
    Linköping University, Department of Electrical Engineering.
    TCP performance in an EGPRS system2003Independent thesis Advanced level (degree of Magister), 20 points / 30 hpStudent thesis
    Abstract [en]

    The most widely used protocol for providing reliable service and congestion control in the Internet is the Transmission Control Protocol (TCP). When the Internet is moving towards more use in mobile applications it is getting more important to know how TCP works for this purpose.

    One of the technologies used for mobile Internet is the Enhanced General Packet Radio Service (EGPRS) extension to the popular GSM system. This thesis presents a low-level analysis of TCP performance in an EGPRS system and an overview of existing TCP, GSM and EGPRS technologies.

    The bottleneck in an EGPRS system is the wireless link – the connection between the mobile phone and the GSM base station. The data transfer over the wireless link is mainly managed by the complex RLC/MAC protocol.

    In this thesis, simulations were made to identify some problems with running TCP and RLC/MAC together. The simulations were made using existing EGPRS testing software together with a new TCP module. The simulation software is also briefly described in the thesis.

    Additionaly, some suggestions are given in order to enhance performance, both by changing the EGPRS system and by modifying the TCP algorithms and parameters.

  • 34.
    Adén, Sebastian
    Linköping University, Department of Electrical Engineering, Vehicular Systems. Linköping University, The Institute of Technology.
    Modellbaserad diagnostik tillämpad för hydrauliska applikationer2013Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [sv]

    I en globaliserad värld där produktägare finner sina produkter på alltmer avslägsna platser, ökar behovet av att på ett så ekonomiskt och tidseffektivt sätt som möjligt, utföra reperationer och underhållningsarbeten. Att erbjuda en stark och mer effektiv eftermarknadssupport kan öka företagens konkurrenskraft och framför allt göra dem kostnadseffektiva med avseende på lägre bemanningsstyrka. Ett sätt att underlätta underhållningsarbetet är genom att använda modellbaserad diagnos för att generera underlag vid exempelvis reperationsarbeten.

    Denna rapport undersöker möjligheterna att utifrån en modell av en hydraulisk applikation, utföra autogenererad diagnostik bland annat iform av felträdsanalys.

    Innehållet i rapporten beskriver även hur modelleringsarbetet har gått till och utveckling av modellens ingående komponenter.

    Examensarbetet är utfört på Combitech AB, Linköping. 

  • 35.
    Afghari, Kamran
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Study and Design of High Performance Voltage-Controlled Oscillators in 65nm CMOS Technology2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    In recent years, oscillators are considered as inevitable blocks in many electronic systems. They are commonly used in digital circuits to provide clocking and in analog/RF circuits of communication transceivers to support frequency conversion. Nowadays, CMOS technology is the most applicable solution for VLSI and especially for modern integrated circuits used in wireless communications. The main purpose of this project is to design a high performance voltage-controlled oscillator (LC VCO) using 65nm CMOS technology. To meet the state-of-the-art requirements, several circuit solutions have been explored and the design work ended-up with a Quadrature VCO. The circuit operates at center frequency of 2.4 GHz. The phase noise of QVCO obtained by simulation is -140 dBc/Hz at 1MHz offset frequency which is 6 dB less compared to conventional LC VCOs. The power consumption is 3.6mW and the tuning voltage can be swept from 0.2 V to 1.2 V resulting in 2.25 GHz - 2.55 GHz frequency range.

  • 36.
    Afsarinejad, Arash
    Linköping University, Department of Electrical Engineering.
    Synkronisering med SyncML2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The last couple of years the use of mobile devices such as mobile phones and PDAs has increased tremendously. Most of the these devices have their own protocols for synchronising data and this has given rise to a need for a standard synchronisation protocol, SyncML. This thesis compares this protocol against the existing ones. The comparison shows that the preferred choice is SyncML.

    Also an application using SyncML has been developed. The application's task is to synchronise the calendar on a mobile phone with a database on a computer.

  • 37.
    Afzal, Nadeem
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Complexity and Power Reduction in Digital Delta-Sigma Modulators2014Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    A number of state-of-the-art low power consuming digital delta-sigma modulator (ΔΣ) architectures for digital-to-analog converters (DAC) are presented in this thesis. In an oversampling ΔΣ DAC, the primary job of the modulator is to reduce the word length of the digital control signal to the DAC and spectrally shape the resulting quantization noise. Among the ΔΣ topologies, error-feedback modulators (EFM) are well suited for so called digital to digital modulation.

    In order to meet the demands, various modifications to the conventional EFM architectures have been proposed. It is observed that if the internal and external digital signals of the EFM are not properly scaled then not only the design itself but also the signal processing blocks placed after it, may be over designed. In order to avoid the possible wastage of resources, a number of scaling criteria are derived. In this regard, the total number of signal levels of the EFM output is expressed in terms of the input scale, the order of modulation and the type of the loop filter.

    Further on, it is described that the architectural properties of a unit element-based DAC allow us to move some of the digital processing of the EFM to the analog domain with no additional hardware cost. In order to exploit the architectural properties, digital circuitry of an arbitrary-ordered EFM is split into two parts: one producing the modulated output and another producing the filtered quantization noise. The part producing the modulated output is removed after representing the EFM output with a set of encoded signals. For both the conventional and the proposed EFM architectures, the DAC structure remains unchanged. Thus, savings are obtained since the bits to be converted are not accumulated in the digital domain but instead fed directly to the DAC.

    A strategy to reduce the hardware of conventional EFMs has been devised recently that uses multiple cascaded EFM units. We applied the similar approach but used several cascaded modified EFM units. The compatibility issues among the units (since the output of each proposed EFM is represented by the set of encoded signals) are resolved by a number of architectural modifications. The digital processing is distributed among each unit by splitting the primary input bus. It is shown that instead of cascading the EFM units, it is enough to cascade their loop filters only. This leads not only to area reduction but also to the reduction of power consumption and critical path.

    All of the designs are subjected to rigorous analysis and are described mathematically. The estimates of area and power consumption are obtained after synthesizing the designs in a 65 nm standard cell library provided by the foundry.

    List of papers
    1. Power efficient arrangement of oversampling sigma-delta DAC
    Open this publication in new window or tab >>Power efficient arrangement of oversampling sigma-delta DAC
    2012 (English)In: NORCHIP, 2012, IEEE , 2012, 1-4 p.Conference paper, Published paper (Refereed)
    Abstract [en]

    A hardware efficient arrangement of digital-to-analog conversion blocks is presented by segmenting digital-to-analog converter (DAC). This segmenting of DAC is done by using buss-split design of digital sigma-delta modulator (DSDM). The reduction in the word length of input to both DSDM and DAC is analyzed with respect to performance because the input word length decides the complexity of these components. We show that effective performance can be achieved from the presented hardware efficient arrangement. All conclusions are drawn based on theory and simulations.

    Place, publisher, year, edition, pages
    IEEE, 2012
    Keyword
    digital-analogue conversion;sigma-delta modulation;DSDM;buss-split design;digital sigma-delta modulator;digital-to-analog conversion blocks;hardware efficient arrangement;oversampling sigma-delta DAC;power efficient arrangement;Complexity theory;Hardware;Modulation;Quantization;Sigma delta modulation;Signal to noise ratio;DAC complexity;Digital sigma-delta modulator;bit-split;composite architecture;modulator’s complexity;noise shaping
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112892 (URN)10.1109/NORCHP.2012.6403119 (DOI)978-1-4673-2221-8 (ISBN)978-1-4673-2222-5 (ISBN)
    Conference
    2012 NORCHIP, November 12-14, Copenhagen, Denmark
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2014-12-19Bibliographically approved
    2. Reducing Complexity and Power of Digital Multibit Error-Feedback Delta Sigma Modulators
    Open this publication in new window or tab >>Reducing Complexity and Power of Digital Multibit Error-Feedback Delta Sigma Modulators
    2014 (English)In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 61, no 9, 641-645 p.Article in journal (Refereed) Published
    Abstract [en]

    In this brief, we propose how the hardware complexity of arbitrary-order digital multibit error-feedback delta-sigma modulators can be reduced. This is achieved by splitting the combinatorial circuitry of the modulators into two parts, i.e., one producing the modulator output and another producing the error signal fed back. The part producing modulator output is removed by utilizing a unit-element-based digital-to-analog converter. To illustrate the reduced complexity and power consumption, we compare the synthesized results with those of conventional structures. Fourth-order modulators implemented with the proposed technique use up to 26% less area compared with conventional implementations. Due to the area reduction, the designs consume up to 33% less dynamic power. Furthermore, it can operate at a frequency 100 MHz higher than that of the conventional.

    Place, publisher, year, edition, pages
    Institute of Electrical and Electronics Engineers (IEEE), 2014
    Keyword
    Delta-sigma (Delta Sigma); error-feedback multibit modulator; oversampling digital-to-analog converter
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-111264 (URN)10.1109/TCSII.2014.2331105 (DOI)000341985600001 ()
    Available from: 2014-10-15 Created: 2014-10-14 Last updated: 2017-12-05Bibliographically approved
    3. On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators
    Open this publication in new window or tab >>On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators
    2012 (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    In order to determine a maximum allowed input scale for the stable operation of higher-order delta-sigma modulators, the designers largely depend on the analytical and numerical analysis. In this brief, the maximum allowed input scale to a multi-bit digital error-feedback  deltasigma modulator of arbitrary order is derived, mathematically. The digital modulator with an arbitrary output word length is stable if its output does not overflow. Thus, to avoid overflow of the modulator output, the relations between the peak values of the involved digital signals are devised. A number of example configurations are presented to illustrate the usefulness of the derivations.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112895 (URN)
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2015-03-11Bibliographically approved
    4. Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption
    Open this publication in new window or tab >>Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption
    2012 (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    The hardware of the multi-bit digital error feedback modulator (EFM) of arbitrary order has recently been reduced by using multiple EFMs in cascade. In this paper, a modified cascading strategy is devised. Parts of the processing of consecutively placed EFM stages are merged such that a significant amount of circuitry is removed in each stage. In the proposed design, the modulated output is represented by a set of encoded signals to be used by the signal processing block placed after the EFM.

    To illustrate the savings, a number of configurations of fourth-order EFM designs, composed of two- and three-cascaded stages, have been synthesized in a 65 nm CMOS process technology using conventional and the proposed implementation techniques. Savings of 52.7% and 47%, in terms of area and power consumption, respectively, at an oversampling ratio of 4 could be obtain. The trade-off between sampling frequency and hardware cost is also presented. Due to reduced hardware an increase of up to 600 MHz in the sampling frequency is achieved.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112896 (URN)
    Available from: 2014-12-19 Created: 2014-12-19 Last updated: 2015-03-11Bibliographically approved
  • 38.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    On Scaling and Output Cardinality of Multi-Bit Digital Error-Feedback Modulators2012Manuscript (preprint) (Other academic)
    Abstract [en]

    In order to determine a maximum allowed input scale for the stable operation of higher-order delta-sigma modulators, the designers largely depend on the analytical and numerical analysis. In this brief, the maximum allowed input scale to a multi-bit digital error-feedback  deltasigma modulator of arbitrary order is derived, mathematically. The digital modulator with an arbitrary output word length is stable if its output does not overflow. Thus, to avoid overflow of the modulator output, the relations between the peak values of the involved digital signals are devised. A number of example configurations are presented to illustrate the usefulness of the derivations.

  • 39.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Sadeghifar, Reza
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A study on power consumption of modified noise-shaper architectures for Sigma-Delta DACs2011In: Circuit Theory and Design (ECCTD), 2011, IEEE , 2011, 274-277 p.Conference paper (Refereed)
    Abstract [en]

    In this paper, modified, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and power consumption. Two different architectures are investigated, both have variable configurations of the input and output word-length (i.e., the physical resolution of the DAC). A modified architecture, termed in this work as a composite architecture (CA), shows about 9 dB increase in SNR while maintaining a power-consumption at the same level as that of a so-called hybrid architecture (HA). The power estimation is done for modulators on the RTL level using a standard cell library in a 65-nm technology. The modulators are operated at a sampling frequency of 2 GHz.

  • 40.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Power efficient arrangement of oversampling sigma-delta DAC2012In: NORCHIP, 2012, IEEE , 2012, 1-4 p.Conference paper (Refereed)
    Abstract [en]

    A hardware efficient arrangement of digital-to-analog conversion blocks is presented by segmenting digital-to-analog converter (DAC). This segmenting of DAC is done by using buss-split design of digital sigma-delta modulator (DSDM). The reduction in the word length of input to both DSDM and DAC is analyzed with respect to performance because the input word length decides the complexity of these components. We show that effective performance can be achieved from the presented hardware efficient arrangement. All conclusions are drawn based on theory and simulations.

  • 41.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, J. Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Digital Multi-bit Cascaded Error-Feedback ΔΣ Modulators With Reduced Hardware and Power Consumption2012Manuscript (preprint) (Other academic)
    Abstract [en]

    The hardware of the multi-bit digital error feedback modulator (EFM) of arbitrary order has recently been reduced by using multiple EFMs in cascade. In this paper, a modified cascading strategy is devised. Parts of the processing of consecutively placed EFM stages are merged such that a significant amount of circuitry is removed in each stage. In the proposed design, the modulated output is represented by a set of encoded signals to be used by the signal processing block placed after the EFM.

    To illustrate the savings, a number of configurations of fourth-order EFM designs, composed of two- and three-cascaded stages, have been synthesized in a 65 nm CMOS process technology using conventional and the proposed implementation techniques. Savings of 52.7% and 47%, in terms of area and power consumption, respectively, at an oversampling ratio of 4 could be obtain. The trade-off between sampling frequency and hardware cost is also presented. Due to reduced hardware an increase of up to 600 MHz in the sampling frequency is achieved.

  • 42.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A Low-Complexity LMMSE Based Channel Estimation Algorithm for Multiple Standards in Mobile Terminals2010In: Proceedings of the Swedish System On Chip Conference, SSOCC 2010, 2010Conference paper (Other academic)
    Abstract [en]

    A less complex and generic channel estimation algorithm for long term evolution (LTE) and digital video broadcasting-handheld (DVB-H) downlink standards, is proposed. The technique, here referred to as minimum mean square error sliding window (MSW) technique, obtains less computational complexity than previous mean squared error (MSE) algorithms [3] at the cost of some 0.3 dB less SNR. The computational complexity is decreased by a factor 3 for the LTE 5-MHz downlink case and by 30 for the DVB-H standard case. Simulated results in terms of mean squared error and bit error rates are presented for a quadrature phase-shift keying (QPSK) systems with interleaving and coding of the data. All simulations are done at the behaviolar-level level.

  • 43.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Study of modified noise-shaper architectures for oversampled sigma-delta DACs2010In: NORCHIP, 2010, IEEE , 2010, 1-4 p.Conference paper (Other academic)
    Abstract [en]

    In this paper, modified low-complex, hybrid architectures for digital, oversampled sigma-delta digital-to-analog converters (ΣΔDACs) are explored in terms of signal-to-noise ratio (SNR) and subDAC complexity. The studied techniques illustrate the trade-off in terms of noise-shaper and DAC implementation complexity and loss in SNR. It is found that a fair amount of improvement in SNR is achieved by maintaining low-complexity of noise shaper. The complexity of the subDAC is yet a parameter, directly related to the number of output bits from the noise shaper. Two different architectures are investigated with respect to subDAC complexity and noise shaper complexity. It is shown that the required number of DAC unit elements (DUE) can be reduced to half.

  • 44.
    Afzal, Nadeem
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Reducing Complexity and Power of Digital Multibit Error-Feedback Delta Sigma Modulators2014In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 61, no 9, 641-645 p.Article in journal (Refereed)
    Abstract [en]

    In this brief, we propose how the hardware complexity of arbitrary-order digital multibit error-feedback delta-sigma modulators can be reduced. This is achieved by splitting the combinatorial circuitry of the modulators into two parts, i.e., one producing the modulator output and another producing the error signal fed back. The part producing modulator output is removed by utilizing a unit-element-based digital-to-analog converter. To illustrate the reduced complexity and power consumption, we compare the synthesized results with those of conventional structures. Fourth-order modulators implemented with the proposed technique use up to 26% less area compared with conventional implementations. Due to the area reduction, the designs consume up to 33% less dynamic power. Furthermore, it can operate at a frequency 100 MHz higher than that of the conventional.

  • 45.
    Agardt, Erik
    et al.
    Linköping University, Department of Electrical Engineering.
    Löfgren, Markus
    Linköping University, Department of Electrical Engineering.
    Pilot Study of Systems to Drive Autonomous Vehicles on Test Tracks2008Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This Master’s thesis is a pilot study that investigates different systems to drive autonomous and non-autonomous vehicles simultaneously on test tracks. The thesis includes studies of communication, positioning, collision avoidance, and techniques for surveillance of vehicles which are suitable for implementation. The investigation results in a suggested system outline.

    Differential GPS combined with laser scanner vision is used for vehicle state estimation (position, heading, velocity, etc.). The state information is transmitted with IEEE 802.11 to all surrounding vehicles and surveillance center. With this information a Kalman prediction of the future position for all vehicles can be estimated and used for collision avoidance.

  • 46.
    Ahlberg, Jesper
    et al.
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Blomquist, Esbjörn
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Online Identification of Running Resistance and Available Adhesion of Trains2011Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Two important physical aspects that determine the performance of a running train are the total running resistance that acts on the whole train moving forward, and the available adhesion (utilizable wheel-rail-friction) for propulsion and breaking. Using the measured and available signals, online identification of the current running resistance and available adhesion and also prediction of future values for a distance ahead of the train, is desired. With the aim to enhance the precision of those calculations, this thesis investigates the potential of online identification and prediction utilizing the Extended Kalman Filter.

    The conclusions are that problems with observability and sensitivity arise, which result in a need for sophisticated methods to numerically derive the acceleration from the velocity signal. The smoothing spline approximation is shown to provide the best results for this numerical differentiation. Sensitivity and its need for high accuracy, especially in the acceleration signal, results in a demand of higher sample frequency. A desire for other profound ways of collecting further information, or to enhance the models, arises with possibilities of future work in the field.

  • 47.
    Ahlberg, Jörgen
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Active Contours in Three Dimensions1996Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    To find a shape in an image, a technique called snakes or active contours can be used. An active contour is a curve that moves towards the sought-for shape in a way controlled by internal forces - such as rigidity and elasticity - and an image force. The image force should attract the contour to certain features, such as edges, in the image. This is done by creating an attractor image, which defines how strongly each point in the image should attract the contour.

    In this thesis the extension to contours (surfaces) in three dimensional images is studied. Methods of representation of the contour and computation of the internal forces are treated.

    Also, a new way of creating the attractor image, using the orientation tensor to detect planar structure in 3D images, is studied. The new method is not generally superior to those already existing, but still has its uses in specific applications.

    During the project, it turned out that the main problem of active contours in 3D images was instability due to strong internal forces overriding the influence of the attractor image. The problem was solved satisfactory by projecting the elasticity force on the contour’s tangent plane, which was approximated efficiently using sphere-fitting.

  • 48.
    Ahlberg, Jörgen
    Linköping University, Department of Electrical Engineering, Image Coding. Linköping University, The Institute of Technology.
    An active model for facial feature tracking2002In: EURASTP journal an applied signal processing, ISSN 1110-8657, E-ISSN 1687-0433, Vol. 2002, no 6, 566-571 p.Article in journal (Refereed)
    Abstract [en]

    We present a system for finding and tracking a face and extract global and local animation parameters from a video sequence. The system uses an initial colour processing step for finding a rough estimate of the position, size, and inplane rotation of the face, followed by a refinement step drived by an active model. The latter step refines the previous estimate, and also extracts local animation parameters. The system is able to track the face and some facial features in near real-time, and can compress the result to a bitstream compliant to MPEG-4 face and body animation.

  • 49.
    Ahlberg, Jörgen
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology. Univ.,.
    Model-based coding: extraction, coding, and evaluation of face model parameters2002Doctoral thesis, monograph (Other academic)
  • 50.
    Ahlberg, Jörgen
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, Faculty of Science & Engineering. FOI, SE-58111 Linkoping, Sweden.
    Optimizing Object, Atmosphere, and Sensor Parameters in Thermal Hyperspectral Imagery2017In: IEEE Transactions on Geoscience and Remote Sensing, ISSN 0196-2892, E-ISSN 1558-0644, Vol. 55, no 2, 658-670 p.Article in journal (Refereed)
    Abstract [en]

    We address the problem of estimating atmosphere parameters (temperature and water vapor content) from data captured by an airborne thermal hyperspectral imager and propose a method based on linear and nonlinear optimization. The method is used for the estimation of the parameters (temperature and emissivity) of the observed object as well as sensor gain under certain restrictions. The method is analyzed with respect to sensitivity to noise and the number of spectral bands. Simulations with synthetic signatures are performed to validate the analysis, showing that the estimation can be performed with as few as 10-20 spectral bands at moderate noise levels. The proposed method is also extended to exploit additional knowledge, for example, measurements of atmospheric parameters and sensor noise. Additionally, we show how to extend the method in order to improve spectral calibration.

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