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  • 1.
    Ahsan, Naveed
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Ouacha, Aziz
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Samuelsson, Carl
    Swedish Defence Research Agency (FOI), P.O. Box 1165, SE-581 11 Linköping, Sweden.
    Dąbrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Design Approach for Flexible RF Circuits Using Reconfigurable PROMFA Cells2009In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979Article in journal (Other academic)
    Abstract [en]

    This paper presents a design approach for flexible RF circuits using Programmable Microwave Function Array (PROMFA) cells. The concept is based on an array of generic cells that can be dynamically reconfigured. Therefore, the same circuit can be used for various functions e.g. amplifier, tunable filter and tunable oscillator. For proof of concept a test chip has been implemented in 90nm CMOS process. The chip measurement results indicate that a single unit cell amplifier has a typical gain of 4dB with noise figure of 2.65dB at 1.5GHz. The measured input referred 1dB compression point is -8dBm with an IIP3 of +1.1dBm at 1GHz. In a single unit cell oscillator configuration, the oscillator can achieve a wide tuning range of 600MHz to 1.8GHz. The measured phase noise is -94dBc/Hz at an offset frequency of 1MHz for the oscillation frequency of 1.2GHz. A single unit cell oscillator consumes 18mW at 1.2GHz while providing -8dBm power into 50Ω load. In a single unit cell filter configuration, the tunable band pass filter can achieve a reasonable tuning range of 600MHz to 1.2GHz with a typical power consumption of 13mW at 1GHz. A single unit cell has a total chip area of 0.091mm2 including the coupling capacitors.

  • 2.
    Ahsan, Naveed
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Highly Linear Wideband Low Power Current Mode LNA2008In: Proceedings from the ICSES'08 - ICSES 2008 International Conference on Signals and Electronic Systems, IEEE , 2008, p. 73-76Conference paper (Refereed)
    Abstract [en]

    This paper presents design considerations for low power, highly linear currentmode LNAs that can be used for wideband RF front-ends for multistandardapplications. The circuit level simulations of the proposed architecture indicatethat with optimal biasing a high value of IIP3 can be obtained. A comparison ofthree scenarios for optimal bias is presented. Simulation results indicate thatwith the proposed architecture, LNAs may achieve a maximum NF of 3.6 dBwith a 3 dB bandwidth larger than 10 GHz and a best case IIP3 of +17.6 dBmwith 6.3 mW power consumption. The LNAs have a broadband input match of 50Ω. The process is 90nm CMOS and with 1.1V supply the LNAs powerconsumption varies between 6.3 mW and 2.3 mW for the best and the worst caseIIP3, respectively.

  • 3.
    Ahsan, Naveed
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Ramzan, Rashad
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Dąbrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Ouacha, Aziz
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Samuelsson, Carl
    Swedish Defence Research Agency (FOI), P.O. Box 1165, SE-581 11 Linköping, Sweden.
    A 1.1V 6.2mW, Highly Linear Wideband RF Front-end for Multi-Standard Receivers in 90nm CMOS2012In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 70, no 1, p. 79-90Article in journal (Refereed)
    Abstract [en]

    This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves high linearity in a wide band (0.5-6GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below -8.8dB up to 6GHz. The measured single sideband noise figure at an LO frequency of 2GHz and an IF of 10MHz is 6.25dB. The front-end achieves a voltage conversion gain of 4.5dB at 1GHz with 3dB bandwidth of more than 6GHz. The measured input referred 1dB compression point is +1.5dBm while the IIP3 is +11.73dBm and the IIP2 is +26.23dBm respectively at an LO frequency of 2GHz. The RF front-end consumes 6.2mW from a 1.1V supply with an active chip area of 0.0856mm2.

  • 4.
    Alvandporu, Atila
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Larsson-Edefors, Per
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Impact of Miller Capacitance on Power Consumption1998In: In proceedings of: International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS, 1998, p. 83-92Conference paper (Refereed)
  • 5.
    Alvandpour, Atila
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Larsson-Edefors, Per
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Leakage-Tolerant Multi-Phase Keeper for Wide Domino Circuits1999In: In proceedings of: IEEE International Conference on Electronics, Circuits, And System, 1999, p. 209-212Conference paper (Refereed)
    Abstract [en]

     

  • 6.
    Alvandpour, Atila
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Larsson-Edefors, Per
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Separation and Extraction of Short-Circuit Power Consumption in Digital CMOS VLSI Circuits1998In: ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design, 1998, p. 245-249Conference paper (Refereed)
    Abstract [en]

    In this paper, we present a new technique which indirectly separates and extracts the total short-circuit power consumption of digital CMOS circuits. We avoid a direct encounter with the complex behavior of the short-circuit currents. Instead, we separate the dynamic power consumption from the total power and extract the total short-circuit power. The technique is based on two facts: first, the short-circuit power consumption disappears at a Vdd close to VT and, secondly, the total capacitance depends on supply voltage in a sufficiently weak way in standard CMOS circuits. Hence, the total effective capacitance can be estimated at a low Vdd. To avoid reducing Vdd below the specified forbidden level, a polynomial is used to estimate the power versus supply voltage down to VT based on a small voltage sweep over the allowed supply voltage levels. The result shows good accuracy for the short-circuit current ranges of interest.

  • 7.
    Alvandpour, Atila
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Somasekhar, D.
    Intel Corp., Hillsboro, USA.
    Krishnamurthy, Ram
    Intel Corp., Hillsboro, USA.
    De, V.
    Intel Corp., Hillsboro, USA.
    Borkar, S.
    Intel Corp., Hillsboro, USA.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Bitline leakage equalization for sub-100nm caches.2003In: ESSCIRC 2003,2003, Lissabon: Grafica Maiadouro SA , 2003, p. 401-Conference paper (Refereed)
  • 8.
    Alvandpour, Atila
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Wire Capacitance Estimation Technique for Power Consuming Interconnections at High Levels of Abstraction1997In: In proceedings of: International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS, 1997, p. 305-314Conference paper (Refereed)
    Abstract [en]

    A new wire estimation technique is presented. It utilizes the topology of the netlist and is sensitive to the actual design. It has the unique quality to estimate the length of every power consuming interconnection individually. Compared to other wire length estimation techniques which use average or total wire length, the result of the new technique shows a strong correlation with the result of "real" automatic placement and route tools. Hence it can estimate a reasonable wire capacitance for each interconnection. The individual wire lengths, combined with individual node activities, are essential for an accurate power estimation.

  • 9.
    Alvandpour, Atila
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Improving Cell Libraries for Low Power Design1996In: In proceedings of: International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS, 1996, p. 317-325Conference paper (Refereed)
  • 10.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Caputa, Peter
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Tuned, Inductorless, Recursive Filter LNA in CMOS2002In: Proceedings of the European Solid-State Circuit Conference (ESSCIRC), Florens, Italy, September, 2002, p. 351-354Conference paper (Refereed)
    Abstract [en]

    An active recursive filter approach is proposed for the implementation of an inductorless, tuned LNA in CMOS. Such an LNA was designed and fabricated ina 0.8 μm CMOS process. In simulation, the feasibility of this type of LNA was demonstrated, and reasonably good performance was obtained. The fabricated device shows a center frequency tuning range from 250 MHz to 975 MHz. Gain and Q value are tunable in a wide range. The LNA exhibits an input referred 1 dB compression point of -31 dB m and a noise figure of approximately 3 dB measured at 900 MHz center frequency.

  • 11.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Konopacki, J
    Silesian university of technology Gliwice, Poland.
    Dabrowski, Jerzy
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    RF-sampling mixer for zero-IF receiver with high image-rejection.2005In: Swedish System-on-Chip Conference,2005, 2005Conference paper (Other academic)
  • 12.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Konopacki, J.
    Silesian University of Technology, Poland.
    Dabrowski, Jerzy
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    RF-sampling mixer for zero-IF receiver with high image-rejection.2005In: MIXDES 2005,2005, 2005, p. 185-188Conference paper (Refereed)
  • 13.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Konopacki, Jacek
    Institute of Electronics, Silesian University of Technology, Gliwice, Poland.
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Noise Analysis and Noise Estimation of an RF-Sampling Front-End using an SC Decimation Filter2006In: Proceedings of the MIXDES 2006 Conference, Gdynia, Poland, 2006, p. 343-348Conference paper (Refereed)
  • 14.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Konopacki, Jacek
    Institute of Electronics, Silesian University of Technology, Gliwice, Poland.
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    SC Filter for RF Down Conversion with Wideband Image Rejection2006In: Proceedings of the ISCAS 2006 conference, Kos, Greece, 2006, p. 3542-3545Conference paper (Refereed)
  • 15.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Konopacki, Jacek
    Institute of Electronics, Silesian University of Technology, Gliwice, Poland.
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    SC Filter for RF Sampling and Downconversion with Wideband Image Rejection2006In: Journal of Analog Integrated Circuits and Signal Processing by Springer, special issue: MIXDES, ISSN 0925-1030, Vol. 49, no 2, p. 115-122Article in journal (Refereed)
    Abstract [en]

    In this paper we present an SC filter for RF downconversion using the direct RF sampling and decimation technique. The circuit architecture is generic and it features high image rejection for wideband signals and good linearity. An SC implementation in 0.13μm CMOS suitable for an RF of 2.4 GHz and 20 MHz signal bandwidth is presented as a demonstrator. Simulation results obtained using Cadence Spectre simulation tools are included.

  • 16.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Rashad, Ramzan
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Dabrowski, Jerzy
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Direct RF sampling receiver front-end for WLAN.2006In: Swedis system-on-chip conference,2006, Lund: Lunds universitet , 2006Conference paper (Refereed)
  • 17.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Rashad, Ramzan
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Dabrowski, Jerzy
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Flexible direct RF-sampling receiver front-end in 0.13 um CMOS.2007In: Swedish System-on-Chip Conference SSoCC,2007, Göteborg: CTH , 2007Conference paper (Refereed)
    Abstract [en]

      

  • 18.
    Andersson, Stefan
    et al.
    Ericsson AB, Lund .
    Rashad, Ramzan
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Dabrowski, Jerzy
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Multiband direct RF-sampling receiver font-end for WLAN in 0.13 um CMOS.2007In: European Conference on Circuit Theory and Design, ECCTD,2007, Sevilla, Spain: Oscar Guerra, Universidad de Sevilla , 2007, p. 168-Conference paper (Refereed)
  • 19.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    10 GHz wideband low-noise amplifier using a 0,35um SiGe BiCMOS technology.2002In: SSoCC´02 confernce,2002, 2002Conference paper (Refereed)
  • 20.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A 750 MHz to 3 GHz Tunable Narrowband Low-Noise Amplifier2005In: Proceedings of the Norchip 2005 Conference, Oulu, Finland, 2005, p. 8-11Conference paper (Refereed)
    Abstract [en]

    An active recursive filter approach is proposed for the implementation of an inductorless, tunable LNA in CMOS. A test circuit was designed and manufactured in a 0.18 μm CMOS technology. The feasibility of this type of LNA was demonstrated in both simulations and measurements and reasonably good performance was obtained. The measurements show a center frequency tuning range from 0.75-3 GHz and a minimum noise figure of 4.8 dB. Gain and Q value are also tunable in a wide range. Measured IIP-3 and 1-dB compression point is -24 dBm and -29.5 dBm respectively, measured at the center frequency 1.7 GHz and with 21 dB gain.

  • 21.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    A widely tunable narrowband low-noise amplifier.2005In: RadioVetenskap och Kommunikation,2005, 2005, p. 501-504Conference paper (Refereed)
  • 22.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    An active recursive RF filter in 0.35 um BiCMOS.2003In: GigaHerz Conference 2003.,2003, 2003Conference paper (Other academic)
  • 23.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    An Active Recursive RF Filter in 0.35 μm BiCMOS2005In: Journal of Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, Vol. 44, no 3, p. 213-218Article in journal (Refereed)
    Abstract [en]

    An active recursive filter approach is proposed for the implementaion of an inductorless, tuneable RF filter in BiCMOS. A test circuit was designed and manufactured in a 0.35 μm SiGe BiCMOS technology. In simulations, the feasibility of this type of filter was demonstrated and reasonably good performance was obtained. The simulations show a center frequency tuning range from 6 to 9.4 GHz and a noise figure of 8.8 to 10.4 dB depending on center frequency. Gain and Q-value are tunable in a wide range. Simulated IIP-3 and 1-dB compression point is −26 and −34 dBm respectively, simulated at the center frequency 8.5 GHz and with 15 dB gain. Measurements on the fabricated device shows a center frequency tuning range from 6.6 to 10 GHz, i.e. slightly higher center frequencies were measured than the simulated.

  • 24.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Channel length as a design parameter for low noise wideband LNAs in deep submicron CMOS technologies2004In: Proceedings of the Norchip 2004 Conference, Oslo, Norway, November, 2004, p. 123-126Conference paper (Refereed)
    Abstract [en]

    In this paper, measurements of drain thermal noise for three NMOS devices with different channel lengths was carried out. The three NMOS devices were all implemented in a 0.18 μm CMOS technology, with channel lengths 0.18. 0.36, and 0.72 μm, respectively. The result was then compared with simulated data using the BSIM3- model and parameters provided by the vendor Large discrepancies between measurements and simulations were observed. This work was done in order to understand how to utilize transistor length as a design parameter to achieve optimal noise gures for wideband LNAs in deep submicron technologies.

  • 25.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Direct experimental verification of shot noise in short channel MOS transistors2005In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 41, no 15, p. 869-871Article in journal (Refereed)
    Abstract [en]

    Drain noise current was measured at an extended temperature range on n-MOS transistors of various lengths made in a 0.18 urn process. A comparison with theoretical noise models strongly indicates the mechanism of shot noise produced near the source by diffusion currents, as proposed by Obrecht et al. © IEE 2005.

  • 26.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    On the excess thermal noise in short channel MOS transistorsManuscript (preprint) (Other academic)
    Abstract [en]

    Drain noise current was measured at an extended temperature range on NMOS transistors of various length made in a 0.18 μm process. A comparison with theoretical noise models strongly indicates the mechanism of shot noise at low currents. We therefore suggest that the excess noise observed in short channel MOS transistors are due to shot noise, with an explanation borrowed from the theory of vacuum diodes.

  • 27.
    Andersson, Stefan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Drugge, Oskar
    Acreo AB, Norrköping.
    Wideband LNA for a multistandard wireless receiver in 0.18 um CMOS.2003In: Swedish system-on-chip conference,2003, Lund: Lunds universitet , 2003Conference paper (Other academic)
  • 28.
    Andersson, Stefan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Drugge, Oskar
    Wideband LNA for a Multistandard Wireless Receiver in 0.18 μm CMOS2003In: Proceedings of the 29th European Solid-State Circuits Conference, 2003. ESSCIRC '03, 2003, p. 655-658Conference paper (Refereed)
    Abstract [en]

    A differential wideband LNA for a multistandard receiver has been designed and implemented in 0.18μm CMOS. The circuit topology is a two-stage amplifier with active feedback. The input stage is a common-source stage with a common-drain stage in the feedback loop for impedance matching. Bandwidth enhancement with inductive shunt-peaking is used for maximizing the bandwidth. Measurements on the fabricated device show a power gain of 13.1 dB and a 3-dB bandwidth of nearly 7 GHz together with an IIP3 and a 1-dB compression point of -4.7 dBm and -15.2 dBm respectively. The measured noise figures are 3.3 dB at 1 GHz and 5.5 dB at 6 GHz. Reported LNAs with similar performance are usually implemented with bipolar transistors or MESFETs.

  • 29.
    Azam, Sher
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Jonsson, R.
    Swedish Defense Research Agency (FOI), SE-581 11, Linköping, Sweden.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Wahab, Qamar
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Broadband Power Amplifier performance of SiC MESFET and CostEffective SiGaN HEMTManuscript (preprint) (Other academic)
    Abstract [en]

    This paper describes the broadband power amplifier performance of two differentwide band gap technology transistors at 0.7 to 1.8 GHz using cost effective NitronexGaN HEMT on Silicon (Si) and Cree Silicon Carbide MESFET. The measured resultsfor GaN amplifier are; maximum output power at Vd = 28 V is 42.5 dBm (~18 W), amaximum PAE of 39 % and a maximum gain of 19.5 dB is obtained. The measuredmaximum output power for the SiC amplifier at Vd = 48 V was 41.3 dBm (~13.7 W),with a PAE of 32 % and a power gain above 10 dB. At a drain bias of Vd = 66 V at700 MHz for SiC MESFET amplifier the Pmax was 42.2 dBm (~16.6 W) with a PAE of34.4 %.

  • 30.
    Azam, Sher
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Jonsson, Rolr
    Swedish Defense Research Agency (FOI), SE-581 11, Linköping, Sweden.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Wahab, Qamar
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Comparison of Two GaN TransistorsTechnology in Broadband Power AmplifiersManuscript (preprint) (Other academic)
    Abstract [en]

    This paper compares the performance of two different GaN technology transistors(GaN HEMT on Silicon substrate (PA1) and GaN on SiC PA2) utilized in two broadbandpower amplifiers at 0.7-1.8 GHz. The study explores the broadband power amplifierpotential of both GaN HEMT technologies for Phased Array Radar (PAR) and electronicswarfare (EW) systems. The measured maximum output power for PA1 is 42.5 dBm(~18 W) with a maximum PAE of 39 % and a gain of 19.5 dB. While the measuredmaximum output power for PA2 is 40 dBm with PAE of 35 % and a power gain slightlyabove 10 dB. We obtained high power, gain, wider band width and unconditionalstability without feedback for amplifier based on GaN HEMT technology fabricated on Sisubstrate.

  • 31.
    Azam, Sher
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Wahab, Qamar
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    A New Load Pull TCAD Simulation Technique for Class D, E & FSwitching Characteristics of TransistorsManuscript (preprint) (Other academic)
    Abstract [en]

    We have further developed a computational load pull simulation technique inTCAD. It can be used to study the Class-D, E & F switching response of the transistors. Westudied our enhanced version of previously fabricated and tested SiC transistor. Thesimulated Gain (dB), Power density (W/mm), switching loss (W/mm) and power addedefficiency (PAE %) at 500 MHz were studied using this technique. A PAE of 84 % at500MHz with 26 dB Power gain and power density of 2.75 W/mm is achieved. Thistechnique allows the prediction of switching response of the device before undertaking anexpensive and time-consuming device fabrication. The beauty of this technique is that, weneed no matching and other lumped element networks to study the large signal switchingbehavior of RF and microwave transistors.

  • 32.
    Azam, Sher
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Wahab, Qamar
    Linköping University, Department of Physics, Chemistry and Biology, Materials Science . Linköping University, The Institute of Technology.
    Pulse Input Class-C Power Amplifier Response of SiC MESFET using Physical Transistor Structure in TCAD2008In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 52, no 5, p. 740-744Article in journal (Refereed)
    Abstract [en]

    The switching behavior of a previously fabricated and tested SiC transistor is studied in Class-C amplifier in TCAD simulation. The transistor is simulated for pulse input signals in Class-C power amplifier. The simulated gain (dB), power density (W/mm) and power added efficiency (PAE%) at 500 MHz, 1, 2 and 3 GHz was studied using computational TCAD load pull simulation technique. A Maximum PAE of 77.8% at 500 MHz with 45.4 dB power gain and power density of 2.43 W/mm is achieved. This technique allows the prediction of switching response of the device for switching amplifier Classes (Class-C–F) before undertaking an expensive and time consuming device fabrication. The beauty of this technique is that, we need no matching and other lumped element networks for studying the large signal behavior of RF and microwave transistors.

  • 33.
    Azam, Sher
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Physics, Chemistry and Biology, Materials Science .
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Wahab, Qamar Ul
    Linköping University, The Institute of Technology. Linköping University, Department of Physics, Chemistry and Biology, Materials Science .
    Designing of high efficiency power amplifier based on physical model of SiC MESFET in TCAD.2007In: International Bhurban conference on applied sciences technology.,2001, 2007Conference paper (Refereed)
    Abstract [en]

       

  • 34.
    Bengtson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    2.5 Gb/s, 72 dBΩ transimpedance amplifier in 0.35 μm CMOS2004Conference paper (Other academic)
    Abstract [en]

    A differential transimpedance amplifier in a 3.3 V 0.35 μm CMOS process with an fT of 17 GHz is presented. Measurements demonstrate a transimpedance gain of 72 dBΩ and 1.4 GHz bandwidth. Eye diagrams at a data rate of 2.5 Gb/s show a dynamic range of more than 60 dB. The performance is reached with a three-stage transimpedance amplifier, utilizing differential high-speed stages and carefully chosen peaking frequencies.

  • 35.
    Bengtson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    3V CMOS 0.35 u transimpedance receiver for optical applications2001In: The 2001 IEEE International Symposium on Circuits and Systems, 2001: ISCAS 2001, Piscataway: IEEE , 2001, Vol. 4, p. 69-71Conference paper (Refereed)
    Abstract [en]

    A new class of receivers for optical applications is described. The novelty of the design is the high speed stage. The receiver is designed for low noise, high bandwidth and high transimpedance-bandwidth product. The receiver is driving a 50 Ω load. Post simulations on chip with all capacitance parasitics and a 0.5 pF diode capacitance, gives a 1.3 GHz bandwidth. For an input diode current of 1 uA=zero and 10 uA=one, the output signal is 0.15 V peak to peak and the output SNR is 23 dB

  • 36.
    Bengtson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A scalable and robust rail-to-rail delay cell for DLLs2004In: IEEE International SOC Conference, 2004: Proceedings, Piscataway: IEEE, Inc. , 2004, p. 135-136Conference paper (Refereed)
    Abstract [en]

    This paper describes a scalable and robust differential rail-to-rail delay cell. The delay cell is fabricated in a 3.3 V 0.35 μm CMOS process. The delay cell shows a wide-range operation and low power supply sensitivity. The delay range is 0.31 ps to 21.8 ns. For 0.5 ns delay, when the clock period is 500 MHz, the power supply sensitivity is 0.033 ps/mV. The delay cell is used in a DLL for clock generation of a four times interleaved 2 Gb/s decision feedback equalizer.

  • 37.
    Bengtson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Amplifier stability related to power supply impedance2004In: MIXDES 2004: proceedings of the 11th International Conference Mixed Design of Integrated Circuits and Systems / [ed] Andrzej Napieralski, Lodz, Poland: Technical University of Lodz , 2004, p. 151-156Conference paper (Refereed)
    Abstract [en]

    Amplifier stability related to power supply impedance is investigated. By comparing the impedance offered by the power supply rail with the power load impedance offered by the amplifier, a stability criterion is derived. We demonstrate the susceptibility to power supply impedance for different amplifiers and the choice of decoupling capacitance for stability

  • 38.
    Bengtson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Speed study of a 2,5 Gb/s equalizer for optical communication in a 3 V 0.35 μm CMOS process2002In: Proc. 2002 20th NORCHIP conference, Piscataway: IEEE , 2002Conference paper (Refereed)
    Abstract [en]

    Decision feedback equalizers, DFE, can be used to increase the data rate of a fiber-optic communication system when intersymbol interference is a problem. The DFE must itself be fast to handle high bit rates. One way to manage high speed, is to introduce parallelism or interleaving. Requirements for the recovering time for the comparators and speed of memory cells will than decrease.

  • 39.
    Bengtsson, Håkan
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    2 Gb/s decision feedback equalizer in 3.3 V 0.35 µm CMOS2004In: Circuits, Signals, and Systems (CSS 2004) / [ed] M.H. Rashid, 2004Conference paper (Refereed)
    Abstract [en]

    A 2 Gb/s decision feedback equalizer is implemented in a 0.35 m CMOS process and experimentally demonstrated. Speed is enhanced through optimization of the unavoidable loop in a decision feedback equalizer, parallelism, differential current mode frontend, fast sense amplifier style comparators and single-phase flip-flops.

  • 40.
    Bengtsson, Håkan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    2.5 Gb/s equalizer for opticla communication.2002In: Swedish System-on-Chip,2002, 2002Conference paper (Other academic)
  • 41.
    Bengtsson, Håkan
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Speed study of a 2.5 Gb/s equalizer for optical communication in a 3 V 0,35 um CMOS process.2003In: Swedish system-on-chip conference 2003.,2003, Lund: Lunds universitet , 2003Conference paper (Other academic)
  • 42.
    Blad, Anton
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Johansson, Håkan
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Andersson, Stefan
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    An RF sampling radio frontend based on sigmadelta-conversion.2006In: 24th Norchip Conference,2006, IEEE , 2006, p. 133-136Conference paper (Refereed)
  • 43. Bornefalk, H.
    et al.
    Xu, C.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Danielsson, M.
    Simulation study of an energy sensitive photon counting silicon strip detector for computed tomography: identifying strenghts and weaknesses and developing work-arounds2010Conference paper (Refereed)
  • 44.
    Bornefalk, Hans
    et al.
    AlbaNova University Centre, Sweden .
    Persson, Mats
    AlbaNova University Centre, Sweden .
    Xu, Cheng
    AlbaNova University Centre, Sweden .
    Karlsson, Staffan
    AlbaNova University Centre, Sweden .
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Danielsson, Mats
    AlbaNova University Centre, Sweden .
    Effect of Temperature Variation on the Energy Response of a Photon Counting Silicon CT Detector2013In: IEEE Transactions on Nuclear Science, ISSN 0018-9499, E-ISSN 1558-1578, Vol. 60, no 2, p. 1442-1449Article in journal (Refereed)
    Abstract [en]

    The effect of temperature variation on pulse height determination accuracy is determined for a photon counting multibin silicon detector developed for spectral CT. Theoretical predictions of the temperature coefficient of the gain and offset are similar to values derived from synchrotron radiation measurements in a temperature controlled environment. By means of statistical modeling, we conclude that temperature changes affect all channels equally and with separate effects on gain and threshold offset. The combined effect of a 1 degrees C temperature increase is to decrease the detected energy by 0.1 keV for events depositing 30 keV. For the electronic noise, no statistically significant temperature effect was discernible in the data set, although theory predicts a weak dependence. The method is applicable to all x-ray detectors operating in pulse mode.

  • 45.
    Bornefalk, Hans
    et al.
    Royal Institute Technology.
    Xu, Cheng
    Royal Institute Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Danielsson, Mats
    Royal Institute Technology.
    Design considerations to overcome cross talk in a photon counting silicon strip detector for computed tomography2010In: NUCLEAR INSTRUMENTS and METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, ISSN 0168-9002, Vol. 621, no 1-3, p. 371-378Article in journal (Refereed)
    Abstract [en]

    This article presents a Monte Carlo simulation of the detector energy response in the presence of pileup in a segmented silicon microstrip detector designed for high flux spectral computed tomography with sub-millimeter pixel size. Currents induced on the collection electrode of a pixel segment are explicitly modeled and signals emanating from events in neighboring pixels are superimposed together with electronic noise before the entire pulse train is processed by a model of the readout electronics to obtain the detector energy response function. The article shows how the lower threshold and the time constant of the electronic filters need to be set in order to minimize the detrimental influence of cross talk from neighboring pixel segments, an issue that is aggravated by the sub-millimeter pixel size and the proposed segmented detector design.

  • 46.
    Caputa, Peter
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    High-Speed On-Chip Interconnect Modeling for Circuit Simulation2004In: Proceedings of the Norchip Conference, Oslo, Norway, November, 2004, p. 143-146Conference paper (Other academic)
  • 47.
    Caputa, Peter
    et al.
    Linköping University, Department of Electrical Engineering.
    Anders, Mark A.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Krishnamurthy, Ram K.
    Borkar, Shekhar
    A Low-swing Single-ended L1 Cache Bus Technique for Sub-90 nm Technologies2004In: Proceedings of the European Solid-State Circuits Conference, Leuven, Belgium, 2004, p. 475-477Conference paper (Other academic)
  • 48.
    Caputa, Peter
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Fredriksson, Henrik
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Hansson, Martin
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Andersson, Stefan
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies2004In: Proceedings of the Power and Timing Modeling, Optimization and Simulation Conference, Santorini, Greece, 2004, p. 849-858Conference paper (Other academic)
  • 49.
    Caputa, Peter
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Fredriksson, Henrik
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Hansson, Martin
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Andersson, Stefan
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    An extended transition energy cost model for buses in deep submicron technologies2004In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings / [ed] Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou, Springer Berlin/Heidelberg, 2004, Vol. 3254, p. 849-858Chapter in book (Refereed)
    Abstract [en]

    In this paper we present and carefully analyze a transition energy cost model aimed for efficient power estimation of performance critical deep submicron buses. We derive an accurate transition energy cost matrix, scalable to buses of arbitrary bit width, which includes properties that closer capture effects present in high-performance VLSI buses. The proposed energy model is verified against Spectre simulations of an implementable bus, including drivers. The average discrepancy between results from Spectre and the suggested model is limited to 4.5% when fringing effects of edge wires is neglected. The proposed energy model can account for effects that limit potential energy savings from bus transition coding.

  • 50.
    Caputa, Peter
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A 3 Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency2006In: Proceedings of the International Conference on VLSI Design 2006, Hyderabad, India, 2006, p. 117-122Conference paper (Other academic)
1234 1 - 50 of 192
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