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  • 1.
    Backenius, Erik
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A strategy for reducing clock noise in mixed-signal circuits2002In: Proc. IEEE 45th Midwest Symp. on Circuits and Systems, MWSCAS'02, 2002, Vol. 1, p. 29-32Conference paper (Refereed)
    Abstract [en]

    Digital switching noise is of major concern in mixed-signal circuits due to the coupling of the noise via a shared substrate to the analog circuits. A significant noise source in this context is the digital clock network that generally has a high switching activity. There is a large capacitive coupling between the clock network and the substrate. Switching of the clock produces current peaks causing simultaneous switching noise (SSN). Sharp clock edges yields a high frequency content of the clock signal and a large SSN. High frequency noise is less attenuated through the substrate than low frequencies due to the parasitic inductance of the interconnect from on-chip to off-chip. In this work, we present a strategy that targets the problems with clock noise. The approach is to generate a clock with smooth edges, i.e. reducing both the high frequency components of the clock signal and the current peaks produced in the power supply. We use a special digital D flip-flop circuit that operates well with the clock. A test chip has been designed where we can control the rise and fall time of the clock edges in a digital FIR filter, and measure the performance of a fifth-order analog active-RC filter.

  • 2.
    Backenius, Erik
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Effect of simultaneous switching noise on an analog filter2006In: Proc. Int. Conf. on Electronics, Circuits and Systems, ICECS'06, 2006, p. 898-901Conference paper (Refereed)
    Abstract [en]

    In this work a digital filter is placed on the same chip as an analog filter. We investigate how the simultaneous switching noise is propagated from the digital filter to different nodes on a manufactured chip. Conventional substrate noise reduction methods are used, e.g., separate power supplies, guard rings, and multiple pins for power supplies. We also investigate if the effect of substrate noise on the analog filter can be reduced by using a noise reduction method, which use long rise and fall times of the digital clock. The measured noise on the output of the analog filter was reduced by 30% up to 50% when the method was used.

  • 3.
    Backenius, Erik
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Reduction of Clock Noise in Mixed-Signal Circuits2002In: Proc. National Conf. on Radio Science, RVK'02, 2002, Vol. 1, p. 197-201Conference paper (Other academic)
    Abstract [en]

    A major concern in mixed-signal circuits is the noise injected by the digital circuits into sensitive analog circuits. Of particular interest in this work is the problem with large capacitive coupling between the digital clock network and the substrate shared with the analog circuits. It is in general more easy to reduce low frequency noise compared with high frequency noise. Therefore, we have developed a strategy where we reduce the high frequency content of the clock by using smooth clock edges, and a special digital flip-flop circuit. This strategy will be evaluated in a test chip where we can control the rise and fall time of the clock edges of a high-performance digital FIR filter, and measure the performance of a fifth-order analog active-RC filter.

  • 4.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Löwenborg, Per
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Layout generation of matched capacitors2002In: Radiovetenskap och Kommunikation,2002, 2002Conference paper (Refereed)
  • 5.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    A Design Platform for Computer-Aided Design of Analog Amplifiers2003In: Swedish System-on-Chip Conferance,2003, 2003Conference paper (Refereed)
  • 6.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    An Equation-Based Optimization Approach for Analog Circuit Design2003In: International Symposium on Signals, Circuits Systems,2003, 2003, p. 77-80Conference paper (Refereed)
  • 7.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    An Optimization-Based Approach for Analog Circuit Design2003In: European Conference on Circuit Theory and Design,2003, 2003, p. 369-372Conference paper (Refereed)
  • 8.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Automatic Device Sizing in Analog Circuit Design2002In: Radiovetenskap och Kommunikation,2002, 2002, p. 187-191Conference paper (Refereed)
  • 9.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wanhammar, Lars
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Design space exploration and trade-offs in analog amplifier design2003In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 13th International Workshop, PATMOS 2003, Turin, Italy, September 10-12, 2003. Proceedings / [ed] Jorge Juan Chico, Enrico Macii, Springer Berlin/Heidelberg, 2003, Vol. 2799, p. 338-347Conference paper (Refereed)
    Abstract [en]

    In this paper, we discuss an optimization-based approach for design space exploration to find limitations and possible trade-offs between performance metrics in analog circuits. The exploration guides the designer when making design decisions. For the design space exploration, which is expensive in terms of computation time, we use an optimization-based device sizing tool that runs concurrent optimization tasks on a network of workstations. The tool enables efficient and accurate exploration of the available design space. As a design example, we investigate three operational transconductance amplifiers, OTAs, implemented in a standard 0.35-mum CMOS process. This example shows that large savings in terms of chip area and power consumption can be made by selecting the most suitable circuit.

  • 10.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Optimization-Based Design Space Exploration of Analog Circuits2003In: European Conference on Circuit Theory and Design,2003, 2003, p. 393-396Conference paper (Refereed)
  • 11.
    Hjalmarson, Emil
    et al.
    Linköping University, Department of Electrical Engineering.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Time and Performance Efficient Design of Analog Circuits2005In: Radiovetenskap och Kommunikation,2005, 2005, p. 181-186Conference paper (Refereed)
  • 12.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    An optimization-based approach to efficient design of analog circuits2006Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Traditional design methods for analog circuits are based on rules-of-thumbs, experience, and trial-and-error approaches involving the use of circuit simulators. It is an unstructured process, which is time-consuming, error prone, and requires the attention of a skilled analog designer. This situation calls for design methodologies that are more efficient.

    We have developed an efficient approach and corresponding tools that address these issues. A computer-aided design tool for design of large analog circuits with low level of human intervention has been developed. The tool combines efficient performance measure evaluation and optimization methods to determine the device sizes and generate layouts for analog circuits. Large analog circuits with about 200 devices have been designed. The circuits are optimized with respect to, e.g., power consumption, and subject to a large number of performance requirements. All performance measures are automatically derived, which reduces the probability of introducing errors.

    Experimental results indicate that our approach can be used to design robust highperformance analog circuits with improved performance compared to manual approaches. Furthermore, the computer-aided tool decreases both the overall design time and the time required of a skilled designer.

    We have developed a technique that derives the performance equations directly from the circuit schematics as well as techniques for efficient evaluation of the equations. This approach reduces the risk of introducing errors and enables the use of accurate device models, i.e., high-accuracy equations without approximations are obtained.

    In fully differential circuits, common-mode stabilization is required. Even though a multitude of common-mode feedback circuits have been presented in the literature, the performance requirements for these circuits are rarely fully explained. Here, the common-mode feedback design problem is addressed to gain design insights. A Volterra series model is used to analyze the distortion terms caused by the use of a common-mode feedback. From this analysis, the DC gain, bandwidth, and stability requirements of the common-mode loop are discussed.

  • 13.
    Hägglund, Robert
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Studies on design automation of analog circuits: performance metrics2003Licentiate thesis, monograph (Other academic)
    Abstract [en]

    The trend of today is to integrate large systems containing analog and digital circuits on a single chip. This has the advantages of decreased power consumption and cost. In order to reduce the design time for these systems, efficient design automation tools are required.

    In the digital domain, design automation tools are well developed and widely used in industry. Typically, the layouts of digital circuits are performed using design automation tool and a standard cell library. This is not the case in analog domain since a large number of performance metrics is required to characterize an analog circuit. Further, analog circuit design lack formal design methodologies. Typically, time-consuming manual trial-and-error approaches are used in the design process. Hence, more efficient analog design tools are needed.

    In this thesis, the design automation of analog circuits is addressed. The main focus is on implementing a tool, which determines the device sizes of a circuit that meet a certain specification within reasonable time. This is performed using an optimizer together with equations for the performance metrics.

    Key features of the tool are the use of accurate device models and automatic generation of equations for the performance metrics. Further, the tool is built in modules in order to ease experimentation and be able to exchanged modules with more efficient implementations. In the current version of the tool continuous-time CMOS amplifiers can be designed.

    The tool can also be used to explore the available design space to determine limitations and possible trade-offs. This also allows comparisons of several topologies in order to determine the best circuit for a given specification.

    A simple template-based layout generator has also been implemented. It allows interconnect parasitics to be taken into account during the design phase. Hence, the circuit will meet the specification after the layout is completed.

  • 14.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    A design path for optimization-based analog circuit design2002In: IEEE Midwest Symposium on Circuits and System,2002, 2002, p. 287-290Conference paper (Refereed)
  • 15.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Automated Design of Analog Filters at Transistor Level2005In: Swedish System-on-Chip Conferance,2005, 2005Conference paper (Refereed)
  • 16.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Automated Device Sizing of Analog Circuits With Yield Enhancement2004In: Swedish System-on-Chip Conference 2004,2004, 2004Conference paper (Other academic)
  • 17.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Optimization-Based Device Sizeing in Analog Circuit Design2002In: Swedish System-on-Chip Conferance,2002, 2002Conference paper (Refereed)
  • 18.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Using Optimization to Find Design Trade-Offs in Analog Amplifier Design2003In: Swedish System-on-Chip Conferance,2003, 2003Conference paper (Refereed)
  • 19.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Hjalmarson, Emil
    Linköping University, Department of Electrical Engineering.
    Wanhammar, Lars
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Yield Enhancement Techniques in Analog Design Automation2004In: IEEE NorChip Conf,2004, 2004Conference paper (Other academic)
  • 20.
    Hägglund, Robert
    et al.
    Linköping University, Department of Electrical Engineering.
    Löwenborg, Per
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering.
    A polynomial-based division algorithm2002In: IEEE Int. Symp. Circuits and Systems, 2002, 2002, p. III-571-III-574Conference paper (Refereed)
    Abstract [en]

    A polynomial-based division algorithm and a corresponding hardware structure are proposed. The proposed algorithm is shown to be competitive to other conventional algorithms like the Newton-Raphson algorithm for up to about 32 bits accuracy. For example, using Newton-Raphson with less than 12 bits accuracy of the initial approximation, requires 33% more general multiplications than the proposed algorithm, in order to achieve 24 bits accuracy.

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