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  • 101.
    Backenius, Erik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Vesterbacka, Mark
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Reduction of simultaneous switching noise in digital circuits2006Ingår i: Proc. 24th IEEE Norchip Conf., NORCHIP'06, 2006, s. 187-190Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this paper the authors present results from measurements on a test chip used to evaluate our method for reduction of substrate noise that originates from the clock in digital circuits. The authors use long rise and fall times of the clock signal and a D flip-flop that operates well with this clock. With this approach, smaller clock buffers can be used, which results in smaller current peaks on the power supply lines and therefore less switching noise. The measured substrate noise on the test chip was reduced by 20% and up to 54%. With optimized clock buffers this method has a potential of an even larger noise reduction.

  • 102.
    Backenius, Erik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Vesterbacka, Mark
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Hägglund, Robert
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    A strategy for reducing clock noise in mixed-signal circuits2002Ingår i: Proc. IEEE 45th Midwest Symp. on Circuits and Systems, MWSCAS'02, 2002, Vol. 1, s. 29-32Konferensbidrag (Refereegranskat)
    Abstract [en]

    Digital switching noise is of major concern in mixed-signal circuits due to the coupling of the noise via a shared substrate to the analog circuits. A significant noise source in this context is the digital clock network that generally has a high switching activity. There is a large capacitive coupling between the clock network and the substrate. Switching of the clock produces current peaks causing simultaneous switching noise (SSN). Sharp clock edges yields a high frequency content of the clock signal and a large SSN. High frequency noise is less attenuated through the substrate than low frequencies due to the parasitic inductance of the interconnect from on-chip to off-chip. In this work, we present a strategy that targets the problems with clock noise. The approach is to generate a clock with smooth edges, i.e. reducing both the high frequency components of the clock signal and the current peaks produced in the power supply. We use a special digital D flip-flop circuit that operates well with the clock. A test chip has been designed where we can control the rise and fall time of the clock edges in a digital FIR filter, and measure the performance of a fifth-order analog active-RC filter.

  • 103.
    Backenius, Erik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Vesterbacka, Mark
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Hägglund, Robert
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Effect of simultaneous switching noise on an analog filter2006Ingår i: Proc. Int. Conf. on Electronics, Circuits and Systems, ICECS'06, 2006, s. 898-901Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this work a digital filter is placed on the same chip as an analog filter. We investigate how the simultaneous switching noise is propagated from the digital filter to different nodes on a manufactured chip. Conventional substrate noise reduction methods are used, e.g., separate power supplies, guard rings, and multiple pins for power supplies. We also investigate if the effect of substrate noise on the analog filter can be reduced by using a noise reduction method, which use long rise and fall times of the digital clock. The measured noise on the output of the analog filter was reduced by 30% up to 50% when the method was used.

  • 104.
    Backenius, Erik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Vesterbacka, Mark
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Hägglund, Robert
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Reduction of Clock Noise in Mixed-Signal Circuits2002Ingår i: Proc. National Conf. on Radio Science, RVK'02, 2002, Vol. 1, s. 197-201Konferensbidrag (Övrigt vetenskapligt)
    Abstract [en]

    A major concern in mixed-signal circuits is the noise injected by the digital circuits into sensitive analog circuits. Of particular interest in this work is the problem with large capacitive coupling between the digital clock network and the substrate shared with the analog circuits. It is in general more easy to reduce low frequency noise compared with high frequency noise. Therefore, we have developed a strategy where we reduce the high frequency content of the clock by using smooth clock edges, and a special digital flip-flop circuit. This strategy will be evaluated in a test chip where we can control the rise and fall time of the clock edges of a high-performance digital FIR filter, and measure the performance of a fifth-order analog active-RC filter.

  • 105.
    Backenius, Erik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Vesterbacka, Mark
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Settu, V.B.
    Linköpings universitet, Institutionen för systemteknik. Linköpings universitet, Tekniska högskolan.
    Reduction of simultaneous switching noise in analog signal band2007Ingår i: Proc. IEEE European Conf. Circuit Theory and Design, ECCTD'07, 2007, s. 148-151Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this work we focus on reducing the simultaneous switching noise located in the frequency band from DC up to half of the digital clock frequency. This frequency band is assumed to be the signal band of an analog circuit. The idea is to use circuits that have as periodic power supply currents as possible to obtain low simultaneous switching noise below the clock in the frequency domain. We use precharged differential cascode switch logic together with a novel D flip-flop. To evaluate the method two pipelined adders have been implemented on transistor level in a 0.13 mum CMOS technology, where the novel circuit is implemented with our method and the reference circuit with static CMOS logic together with a TSPC D flip-flop. According to simulation results, the frequency components in the analog signal band can be attenuated from 10 dB up to 17 dB when using the proposed method. The cost is an increase in power consumption of almost a factor of three and a higher transistor count.

  • 106.
    Backskär, Daniel
    Linköpings universitet, Institutionen för systemteknik.
    Beskrivning av systemfunktioner i kärnkraftverk med hjälp av objektorienterat modelleringsverktyg2002Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    In order to facilitate design and maintenance of such a large and complex site as a nuclear power plant, all system functions must be described in a stringent way. In the past, these descriptions consisted of text documents and logical diagrams, but today there are an increasing number of object-oriented programs available on the market which might be used for this purpose. This Master Thesis has made a closer study of one of these programs named Rational Rose. The principal of the program is to facilitate software design and development, not to create models of plants. However, using the program the same way as developing software, specifying actors then gradually extend the model with use cases, use cases diagrams etc, the same methods can be used when modelling plants.

    During this Master Thesis most of the time has been spent developing, structuring and classifying the functions composing the Feed Water Backup System of the reactor named Oskarshamn 3. A considerable amount of time was also spent to find a general structure for typical motor and valve circuits in the plant, which are also applicable for the configuration of the Feed Water Backup System. This general structure will then be used to support maintenance and to get faster decisions when new systems are designed.

    Effectuating the modernization of the nuclear power plants in Sweden, an ever- increasing use of highly software intensive systems will be introduced, which also leads to the need of finding other ways to describe those systems. A suitable method is to use Rational Rose, where the entire process, from description to final product, will be done in an integrated way. Use cases are generated and together with their related documentation they will form the description of the desired system functions.

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  • 107.
    Backström, Anders
    et al.
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Ågesjö, Mats
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Design and implementation of a 5GHz radio front-end module2004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    The overall goal of this diploma work is to produce a design of a 5 GHz radio frontend using Agilent Advanced Design System (ADS) and then build a working prototype. Using this prototype to determine if RF circuits at 5 GHz can be successfully produced using distributed components on a laminate substrate.

    The design process for the radio front-end consists of two stages. In the first stage the distributed components are designed and simulated, and in the second stage all components are merged into a PCB. This PCB is then manufactured and assembled. All measurements on the radio front-end and the test components are made using a network analyser, in order to measure the S-parameters.

    This diploma work has resulted in a functional design and prototype, which has proved that designing systems for 5 GHz on a laminate substrate is possible but by no means trivial.

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  • 108.
    Baer, Donald R.
    et al.
    Pacific Northwest Natl Lab, WA 99352 USA.
    Artyushkova, Kateryna
    Phys Elect, MN 55317 USA.
    Cohen, Hagai
    Weizmann Inst Sci, Israel.
    Easton, Christopher D.
    CSIRO Mfg, Australia.
    Engelhard, Mark
    Pacific Northwest Natl Lab, WA 99352 USA.
    Gengenbach, Thomas R.
    CSIRO Mfg, Australia.
    Greczynski, Grzegorz
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Tunnfilmsfysik. Linköpings universitet, Tekniska fakulteten.
    Mack, Paul
    Thermo Fisher Sci, England.
    Morgan, David J.
    Cardiff Univ, Wales.
    Roberts, Adam
    Kratos Analyt Ltd, England.
    XPS guide: Charge neutralization and binding energy referencing for insulating samples2020Ingår i: Journal of Vacuum Science & Technology. A. Vacuum, Surfaces, and Films, ISSN 0734-2101, E-ISSN 1520-8559, Vol. 38, nr 3Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This guide deals with methods to control surface charging during XPS analysis of insulating samples and approaches to extracting useful binding energy information. The guide summarizes the causes of surface charging, how to recognize when it occurs, approaches to minimize charge buildup, and methods used to adjust or correct XPS photoelectron binding energies when charge control systems are used. There are multiple ways to control surface charge buildup during XPS measurements, and examples of systems on advanced XPS instruments are described. There is no single, simple, and foolproof way to extract binding energies on insulating material, but advantages and limitations of several approaches are described. Because of the variety of approaches and limitations of each, it is critical for researchers to accurately describe the procedures that have been applied in research reports and publications.

  • 109.
    Baig, Aijaz
    Linköpings universitet, Institutionen för datavetenskap.
    Embedded boundary scan for test & debug2009Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    The boundary scan standard which has been in existence since the early nineties is widely used to test printed circuit boards (PCB). It is primarily aimed at providing increased physical test access to surface mounted devices on printed circuit boards (PCB). Using boundary scan avoids using functional testing and In-circuit-techniques like 'bed of nails' for structurally testing PCBs as increasing densities and complexities made opting for them a herculean task. Though the standard has had a revolutionizing effect on board testing conducted during the development and production phases, there is a lack of a standardized mechanism to allow IEEE 1149.1 to be used in a system post installation. This has led to problems typically encountered during field test runs, like the issue of high number of No-Fault-Found (NFF), being left unaddressed. The solution lies in conducting a structural test after a given module has already been installed in the system. This can be done by embedding the programmability features of the boundary scan test mechanism into the Unit under test (UUT) thereby enabling the UUT to conduct boundary scan based self tests without the need of external stimuli. In this thesis, a test and debug framework, which aims to use boundary-scan in post system-installation, is the subject of a study and subsequent enhancement. The framework allows embedding much of the test vector deployment and debug mechanism onto the Unit under test (UUT) to enable its remote testing and debug. The framework mainly consists of a prototype board which, along with the UUT, comprise the 'embedded system'. The following document is a description of the phased development of above said framework and its intended usage in the field.

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  • 110.
    Bajramovic, Jasko
    Linköpings universitet, Institutionen för systemteknik.
    FPGA Implementation of an Interpolator for PWM applications2007Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    In this thesis, a multirate realization of an interpolation operation is explored. As one of the requirements for proper functionality of the digital pulse-width modulator, a 16-bit digital input signal is to be upsampled 32 times. To obtain the required oversampling ratio, five separate interpolator stages were designed and implemented. Each interpolator stage performed uppsampling by a factor of two followed by an image-rejection lowpass FIR filter. Since, each individual interpolator stage upsamples the input signal by a factor of two, interpolation filters were realized as a half-band FIR filters. This kind of linear-phase FIR filters have a nice property of having every other filter coefficient equal to zero except for the middle one which equals 0.5. By utilizing the half-band FIR filters for the actual realization of the interpolation filters, the overall computational complexity was substantially reduced. In addition, several multirate techniques have been utilized for deriving more efficient interpolator structures. Hence, the impulse response of individual interpolator filters was rewritten into its corresponding polyphase form. This further simplifies the interpolator realization. To eliminate multiplication by 0.5 in one of two polyphase subfilters, the filter gain was deliberately increased by a factor of two. Thus, one polyphase path only contained delay elements. In addition, for the realization of filter multipliers, a multiple constant multiplication, (MCM), algorithm was utilized. The idea behind the MCM algorithm, was to perform multiplication operations as a number of addition operations and appropriate input signal shifts. As a result, less hardware was needed for the actual interpolation chain implementation. For the correct functionality of the interpolator chain, scaling coefficients were introduced into the each interpolation stage. This is done in order to reduce the possibility of overflow. For the scaling process, a safe scaling method was used. The actual quantization noise generated by the interpolator chain was also estimated and appropriate system adjustments were performed.

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  • 111.
    Bajramovic, Jasko
    Linköpings universitet, Institutionen för systemteknik.
    Implementation of a multirate IIR filter2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats (Examensarbete)
    Abstract [en]

    In this report a two-stage multirate IIR filter has been modelled and simulated in the Simulink. For its realization, the multirate structure for narrow-band and middle-band filters and the multirate structure for the wide- band filters have been used. In Simulink, the different filter elements within the two-stage multirate IIR filter have been modelled separately and subsequently they have been interconnected into the two-stage multirate structure. This overall two-stage multirate IIR filter makes use of half-band FIR filters to alter the sampling frequency, an IIR filter for the actual filtering and allpass filters to construct complementary filters. Once the two- stage multirate IIR filter has been designed, the scaling coefficients have been introduced into the filter structure. The same filter specifications as that used for the multirate IIR filter designing were also used for the singlerate IIR filter modelling. Simulink was used for the simulation of the singlerate IIR filter, as well. When designed, the singlerate IIR filter has been used as a reference filter for the determination of the roundoff noise and the data word length of the multirate IIR filter. One aspect found is that the roundoff noise of the multirate IIR filter is slightly larger than that obtained by a singlerate IIR filter.

  • 112.
    Balachandran, Arvind
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. arvindb316@gmail.com.
    Performance Evaluation of Modular Multilevel Converters for Photovoltaic Systems2019Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Modular Multilevel Converters (MMCs), over recent years, have gained popularity in high-voltage(HV) and medium-voltage (MV) applications due to their high reliability. Also, with the rapid growth of solar photovoltaics (PV) and energy storage systems, there is a high demand for efficient and reliable power converter solutions. Therefore, due to the seen merits behind MMCs, this thesis assesses their performance for low-voltage (LV) applications. This is accomplished by comparing basic MMC solutions with an equivalent flying capacitors based solution. Such comparison is based on the evaluation of the passive elements requirements, semi-conductor losses, area, voltage, and current stresses, and common-mode voltage. It is worth mentioning that the evaluation is based on utilizing LV MOSFETs. Furthermore, the thesis introduces a modulation scheme for the full-bridge submodule MMC, thus further exploring the different operating regions of the full-bridge based MMC.

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  • 113.
    Bandla, Atchaiah
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Highly Linear 2.45 GHz Low-Noise Amplifier Design2015Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    One critical component of the communication receiver of front-end system is the low-noise amplifier (LNA). For good sensitivity and dynamic range, the LNA should provide a low noise figure and maximum attainable power gain. Another concern is the linearity of the LNA. Strong signals produce intermodulation products in a frequency band close to the operating frequency that might affect the performance of the receiver. In many cases, the intermodulation products can be reduced by increasing the current through the active device. Hence, a trade-off between power consumption and linearity must be considered when designing the LNA. The thesis includes the bias network design, stability analysis, matching network design and layout design of the LNA RF module with layout simulation. The simulation has been performed using Advanced Design System (ADS) simulation software. After implementation of LNA on a PCB, the LNA is measured with the help of the power supply unit and vector network analyzer. The proposed design aim is to provide a low noise figure (NF) and high gain while maintaining the low power consumption.

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  • 114.
    Bao, Chunxiong
    et al.
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Shenzhen Univ, Peoples R China.
    Xu, Weidong
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Nanjing Tech Univ NanjingTech, Peoples R China.
    Yang, Jie
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Shenzhen Univ, Peoples R China.
    Bai, Sai
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Teng, Pengpeng
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Nanjing Univ Aeronaut and Astronaut, Peoples R China.
    Yang, Ying
    Nanjing Univ Aeronaut and Astronaut, Peoples R China.
    Wang, Jianpu
    Nanjing Tech Univ NanjingTech, Peoples R China.
    Zhao, Ni
    Chinese Univ Hong Kong, Peoples R China.
    Zhang, Wenjing
    Shenzhen Univ, Peoples R China.
    Huang, Wei
    Nanjing Tech Univ NanjingTech, Peoples R China; NPU, Peoples R China.
    Gao, Feng
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Bidirectional optical signal transmission between two identical devices using perovskite diodes2020Ingår i: NATURE ELECTRONICS, ISSN 2520-1131, Vol. 3, nr 3, s. 156-164Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    A solution-processed perovskite diode that functions as both optical transmitter and receiver can be used to build a monolithic pulse sensor and a bidirectional optical communication system. The integration of optical signal generation and reception into one device-thus allowing a bidirectional optical signal transmission between two identical devices-is of value in the development of miniaturized and integrated optoelectronic devices. However, conventional solution-processable semiconductors have intrinsic material and design limitations that prevent them from being used to create such devices with a high performance. Here we report an efficient solution-processed perovskite diode that is capable of working in both emission and detection modes. The device can be switched between modes by changing the bias direction, and it exhibits light emission with an external quantum efficiency of over 21% and a light detection limit on a subpicowatt scale. The operation speed for both functions can reach tens of megahertz. Benefiting from the small Stokes shift of perovskites, our diodes exhibit a high specific detectivity (more than 2 x 10(12) Jones) at its peak emission (~804 nm), which allows an optical signal exchange between two identical diodes. To illustrate the potential of the dual-functional diode, we show that it can be used to create a monolithic pulse sensor and a bidirectional optical communication system.

  • 115.
    Bao, Chunxiong
    et al.
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Shenzhen Univ, Peoples R China.
    Yang, Jie
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Southeast Univ, Peoples R China.
    Bai, Sai
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Xu, Weidong
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Yan, Zhibo
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten. Nanjing Univ, Peoples R China.
    Xu, Qingyu
    Southeast Univ, Peoples R China.
    Liu, Junming
    Nanjing Univ, Peoples R China.
    Zhang, Wenjing
    Shenzhen Univ, Peoples R China.
    Gao, Feng
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    High Performance and Stable All-Inorganic Metal Halide Perovskite-Based Photodetectors for Optical Communication Applications2018Ingår i: Advanced Materials, ISSN 0935-9648, E-ISSN 1521-4095, Vol. 30, nr 38, artikel-id 1803422Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Photodetectors are critical parts of an optical communication system for achieving efficient photoelectronic conversion of signals, and the response speed directly determines the bandwidth of the whole system. Metal halide perovskites, an emerging class of low-cost solution-processed semiconductors, exhibiting strong optical absorption, low trap states, and high carrier mobility, are widely investigated in photodetection applications. Herein, through optimizing the device engineering and film quality, high-performance photodetectors based on all-inorganic cesium lead halide perovskite (CsPbIxBr3-x), which simultaneously possess high sensitivity and fast response, are demonstrated. The optimized devices processed from CsPbIBr2 perovskite show a practically measured detectable limit of about 21.5 pW cm(-2) and a fast response time of 20 ns, which are both among the highest reported device performance of perovskite-based photodetectors. Moreover, the photodetectors exhibit outstanding long-term environmental stability, with negligible degradation of the photoresponse property after 2000 h under ambient conditions. In addition, the resulting perovskite photodetector is successfully integrated into an optical communication system and its applications as an optical signal receiver on transmitting text and audio signals is demonstrated. The results suggest that all-inorganic metal halide perovskite-based photodetectors have great application potential for optical communication.

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  • 116.
    Barsk, Niklas
    Linköpings universitet, Institutionen för systemteknik.
    Ogg Vorbis decoder for Motorola DSP560022004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    Ogg Vorbis is a rather new audio format with some similarities with other more known formats such as MP3 and WMA. It is generally accepted to have a better audio quality than most competing formats and it is in contrast to many of its competitors totally licence and royalty free.

    The goal with this thesis is to port the existing fixed point decoder Tremor, which is written in C, to Motorola's DSP56002. The DSP has a very limited amount of memory so some optimizations has to be made to be able to run Tremor successfully.

    The report presents the necessary steps taken to port Tremor to the DSP and the difficulties of this process. It also describes the memory and CPU usage of the DSP when running Tremor and other results of the port.

    A description as well as examples and workarounds of bugs found in the compiler g56k is attached to this report.

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  • 117.
    Bashir, Fayyaz
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Design and Characterization of Dual Polarized feed for Satellite Communication Antenna2012Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    So far, extensive research has been made, and researchers have shown that use of septum polarizer for feed designing not only provides the dual polarization but also improve the input reflection and cross-polar isolation performance of the feed.

    In this thesis design of the feed for satellite communication antenna has been investigated, which provides the transmission in right hand circular polarization and reception in left hand circular polarization. A feed which covers both receives and transmits bands, i.e. (7.25-7.75 GHz) and (7.9-8.4 GHz) was designed by using the low axial ratio stepped septum polarizer in square waveguide technology, and the circular horn with the round ring choke at the aperture of the feed. Choke at the aperture of the feed was reduced the level of side and back lobes and improves the gain and efficiency of the reflector antenna by putting more energy at the aperture of the reflector antenna. The excitation of the feed has been done by using the standard WR-112 rectangular waveguide at the input of the feed.

    Design and optimization of the feed have been done in High frequency structure simulator (HFSS) tool, and the simulation results show the input reflection performance of the feed less than -18 dB and the cross-polar isolation better than 25 dB. Finally, the optimized design of feed has been fabricated and measured results show that feed has reasonable input reflection and good cross-polar isolation performance over the entire bandwidth.

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  • 118.
    Behnam, Henry
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Konstruktion och byggnation av testfixtur för 10Gbit/s transpondermoduler2002Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    This thesis for the Master of Science degree was performed at Solectron Corporation in Norrköping. The background for the thesis was a need to develop and build two test fixtures to automatize testing and adjusting of transmitter modules (TX-fixture) and receiver modules (RX-fixture) which are head devices in DWDM-systems. The basic elements for the test fixtures are: Test board, switch board and DC/DC board.

    The main function of the test board is to handle communication between the transmitter and receiver modules and supply voltage to these modules. The test board was insufficient and modified with a microprocessor to handle the communication between the PC and the receiver module. There are two connectors (NexLev) on test board to connect the receiver and transmitter modules.

    The switchboard has been used in fixtures for testing and adjusting both the receiver and transmitter modules for data rate up to 2.5 Gbit/s. This board has been modified for use in new fixtures for data rate up to 10Gbit/s.

    Because the power consumption of the test module will be measured with the amperemeter in the power supply, the reference module and the test module cannot be supplied by the same power supply. Because of high cost and the fact that no current is measured it is unacceptable to use a power supply to feed the reference module. The solution is to build a DC/DC board.

    Because the NexLev connector has a durability of 30-40 times it was necessary to have a connector with higher durability. This connector is located between the test board and the test module. Without this connector the project will not be profitable for the company.

    Some parts in RX- and TX-fixture have been used in older versions of fixtures for data rate up to 2.5Gbit/s. These parts have been updated for the new test demands of the new fixtures.

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  • 119.
    Bendtsen, Marcus
    Linköpings universitet, Institutionen för datavetenskap. Linköpings universitet, Tekniska högskolan.
    Development and piloting of a fully automated, push based, extended session alcohol intervention on university students: a feasibility study2013Självständigt arbete på avancerad nivå (magisterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Alcohol consumption amongst university students in Sweden has repeatedly been measured to be at risky levels for more than 50% of students. Internet based brief interventions aimed to intervene and prevent risky drinking have been developed with some success during recent years. Single session interventions have been implemented into routine practice in Sweden and other countries, however not all risky drinkers benefit from these single session brief interventions.

    This feasibility study attempted to develop and pilot an extended session intervention, where participants received messages with motivating content several times a week for a few weeks. All students on semester 1, 3 and 5 at Linköpings Universisty were invited to join a brief single session intervention as part of routine practice, and those who completed the single session intervention were invited to join the new extended intervention.

    Out of a total of 11,284 students that were invited to complete the single session intervention 4916 (%=43.6) responded. Out of these 1216 (%=24.7) decided to enrol to the extended intervention and 898 (%=77.9) completed the follow up questionnaire after the extended intervention. Participants that enrolled to the extended intervention were automatically placed in a draw for one of two iPads.

    Issues were found with participants that wanted to receive messages via SMS, as 28.3% didn’t activate their SMS intervention and hence didn’t enrol to the extended intervention. Furthermore there was some indication that participants exposed to more messages were more positive towards the content, as were participants receiving SMS messages over email message. This might be an indication that email may not be up to par with SMS for delivering this type of intervention.

    The study showed that this kind of extended intervention is worthwhile pursuing. Risky drinkers were more likely to find the intervention useful, and a majority of all participants would possibly or definitely recommend the intervention to a friend that needed help with their alcohol consumption. Future studies should focus on decreasing the number of participants not activating their SMS intervention, experimenting with enrolment without any prize and possibly detached from single session intervention, measuring the effect on alcohol consumption of the intervention as well as identifying any differences between receiving the intervention via email or SMS.

    The responsibility of expanding and enhancing the research of fully automated brief interventions lay upon researches from several fields. There is a need of refining the human--‐computer interaction as well as the content and design of the intervention. This cannot occur effectively from a single department but should be a joint venture in order to be cost effective and to utilize expertise.

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  • 120.
    Bengtsson, Carl Johan
    Linköpings universitet, Institutionen för systemteknik.
    SmartMedia-controller på chip2002Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    This report deals with the design of a controller for SmartMedia™ flash memory cards, based on a hardware description found in the SmartMedia™ Interface Library - SMIL.

    The design was made on logic gate level, using standard cells in OrCAD Capture. After simulation of the design in PSpice A/D, it was exported as an EDIF netlist, which was used to make a chip layout in L-Edit, a layout tool for making integrated circuits. The layout was made using a method called Standard Place and Route - SPR, where the layout tool places standard cells from a library and connects them according to the EDIF netlist.

    A netlist which could be simulated in PSpice was extracted from the finished chip layout to verify that the function of the design was the same as before the transition from schematic to layout.

    The standard cells in the library used to make the chip layout have to meet certain criteria in order for both SPR and extraction to work and this is also discussed.

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  • 121.
    Bengtsson, Filip
    et al.
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska fakulteten.
    Sköld, David
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska fakulteten.
    Analysis of angular accuracy in the IFF Monopulse receiver2018Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    This master thesis investigates how certain components error margin may affect the accuracy of a IFF monopulse receiver. The IFF monopulse receiver measures the angle of arrival of the incident signal by comparing sum and difference signals created in the receiver. The components of interest are phase shifters and attenuators, where both can give individual and different errors depending on the antenna steering angle. The project is conducted at Saab Aeronautics, based on a receiver in development for the Gripen E aircraft. The results of the thesis generated results showing that the angular accuracy decreases with the increase of steering angle. The angular deviation can for some cases be seen as sufficiently small for the receiver to work properly in the ideal case.

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  • 122.
    Bengtsson, Fredrik
    et al.
    Linköpings universitet, Institutionen för systemteknik.
    Berglund, Rikard
    Linköpings universitet, Institutionen för systemteknik.
    Digital compensation of distortion in audio systems2010Självständigt arbete på avancerad nivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    The advancements of computational power in low cost FPGAs are giving the opportunityto implement real-time compensation of loudspeakers and audio systems. The need for expensive commercial audio systems is reduced when the fidelity ofmuch cheaper audio systems easily can be improved by real-time compensation. The topic of this thesis is to investigate and evaluate methods for digital compensationof distortion in audio systems. More specifically, a VHDL module isimplemented to, when necessary, alleviate the problem of drastically deterioratingfidelity of the bass appearing when the input power is too high.

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  • 123.
    Bengtsson, Johnny
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Forensisk hårddiskkloning och undersökning av hårddiskskrivskydd2004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [sv]

    Detta examensarbete reder ut arbetsprinciperna för olika typer av hårddiskskrivskydd; hårdvaruskrivskydd, mjukvaruskrivskydd, hybridskrivskydd och bygelskrivskydd. Slutsatsen av utredningen är att endast hårdvaruskrivskydd Detta examensarbete reder ut arbetsprinciperna för olika typer av hårddiskskrivskydd; hårdvaruskrivskydd, mjukvaruskrivskydd, hybridskrivskydd och bygelskrivskydd. Slutsatsen av utredningen är att endast hårdvaruskrivskydd bedöms ha tillräckligt pålitliga skyddsprinciper, vilket motiveras av dess oberoende från både hårdvara och operativsystem.

    Vidare undersöks hårdvaruskrivskyddet Image MASSter(TM) Drive Lock från Intelligent Computer Solutions (ICS). Några egentliga slutsatser gick inte dra av kretskonstruktionen, bortsett från att den är uppbyggd kring en FPGA (Xilinx Spartan-II, XC2S15) med tillhörande PROM (XC17S15APC).

    En egenutvecklad idé till autenticieringsmetod för hårddiskkloner föreslås som ett tillägg till arbetet. Principen bygger på att komplettera hårddiskklonen med unik information om hårddisk såväl kloningsomständigheter, vilka sammanflätas genom XOR-operation av komponenternas hashsummor.Autenticieringsmetoden kan vid sjösättning möjligen öka rättsäkerheten för både utredarna och den som står misstänkt vid en brottsutredning.

    Arbetet är till stora delar utfört vid och på uppdrag av Statens kriminaltekniska laboratorium (SKL) i Linköping.

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  • 124.
    Berg, Amanda
    Linköpings universitet, Institutionen för systemteknik, Datorseende. Linköpings universitet, Tekniska högskolan.
    Classification of leakage detections acquired by airborne thermography of district heating networks2013Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    In Sweden and many other northern countries, it is common for heat to be distributed to homes and industries through district heating networks. Such networks consist of pipes buried underground carrying hot water or steam with temperatures in the range of 90-150 C. Due to bad insulation or cracks, heat or water leakages might appear.

    A system for large-scale monitoring of district heating networks through remote thermography has been developed and is in use at the company Termisk Systemteknik AB. Infrared images are captured from an aircraft and analysed, finding and indicating the areas for which the ground temperature is higher than normal. During the analysis there are, however, many other warm areas than true water or energy leakages that are marked as detections. Objects or phenomena that can cause false alarms are those who, for some reason, are warmer than their surroundings, for example, chimneys, cars and heat leakages from buildings.

    During the last couple of years, the system has been used in a number of cities. Therefore, there exists a fair amount of examples of different types of detections. The purpose of the present master’s thesis is to evaluate the reduction of false alarms of the existing analysis that can be achieved with the use of a learning system, i.e. a system which can learn how to recognize different types of detections. 

    A labelled data set for training and testing was acquired by contact with customers. Furthermore, a number of features describing the intensity difference within the detection, its shape and propagation as well as proximity information were found, implemented and evaluated. Finally, four different classifiers and other methods for classification were evaluated.

    The method that obtained the best results consists of two steps. In the initial step, all detections which lie on top of a building are removed from the data set of labelled detections. The second step consists of classification using a Random forest classifier. Using this two-step method, the number of false alarms is reduced by 43% while the percentage of water and energy detections correctly classified is 99%.

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  • 125.
    Berggren, Henrik
    et al.
    Linköpings universitet, Institutionen för systemteknik, Fordonssystem.
    Melin, Martin
    Linköpings universitet, Institutionen för systemteknik, Fordonssystem.
    UKF and EKF with time dependent measurement and model uncertainties for state estimation in heavy duty diesel engines2011Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    The continuous challenge to decrease emissions, sensor costs and fuel consumption in diesel engines is battled in this thesis. To reach higher goals in engine efficiency and environmental sustainability the prediction of engine states is essential due to their importance in engine control and diagnosis. Model output will be improved with help from sensors, advanced mathematics and non linear Kalman filtering. The task consist of constructing non linear Kalman Filters and to adaptively weight measurements against model output to increase estimation accuracy. This thesis shows an approach of how to improve estimates by nonlinear Kalman filtering and how to achieve additional information that can be used to acquire better accuracy when a sensor fails or to replace existing sensors. The best performing Kalman filter shows a decrease of the Root Mean Square Error of 75 % in comparison to model output.

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  • 126.
    Berglund, Jens
    Linköpings universitet, Institutionen för systemteknik.
    In-Vehicle Prediction of Truck Driver Sleepiness: Steering Related Variables2007Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    In this master thesis project quantitative testing in a truck simulator with 22 participants were conducted during which ten in-vehicle variables were measured. Examples of measured variables are steering wheel torque, lateral position and yaw angle. These measured variables were then used to calculate 17 independent variables that all to some extent explain the sleepiness level of the driver. The drivers’ sleepiness level was measured using the Karolinska Sleepiness Scale (KSS) in order to judge the performance of the independent variables. The combination of the 17 independent variables that best explain the sleepiness level of the driver is then extracted using multiple regression analysis with forward selection.

    Sometimes some of the independent variables are not defined; therefore different models were created to handle all possible combinations of valid and invalid independent variables. The final system uses six different models to predict the sleepiness level of the driver.

    The performance of the final system showed promising results. The system can correctly classify the drivers in approximately 87% of the cases. The number of occasions when the system classify the driver as sleepy when he/she is still alert is very low, approximately 0.7%.

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  • 127.
    Berglund, Krister
    et al.
    Linköpings universitet, Institutionen för systemteknik.
    Matteusson, Oskar
    Linköpings universitet, Institutionen för systemteknik.
    On the realization of switched-capacitor integrators for sigma-delta modulators2007Självständigt arbete på avancerad nivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    The sigma-delta techniques for analog-to-digital conversion have for long been utilized when high precision is needed. Despite the fact that these have been realized by a numerous of different structures, the theory of how to construct a sigma-delta ADC is not very extensive.

    This thesis will assume that an SFG description of the CRFB sigma-delta modulator has been designed and presents a structured method to obtain a circuit realization of the integrators in a specific modulator.

    The first activity is to scale the inputs to each integrator in order to make sure that the produced outputs of each integrator is within the output-range of the OTA which is used. The next thing that is presented is an algorithmic way of descending from the SFG design of the modulator down to a switched-capacitor implementation of the system.

    To be able to continue with the circuit realization, one needs to do a rigorous noise analysis of the modulator, which gives the sizes of the different capacitors in the SC-circuits. The last topic of this thesis is a method to obtain the specifications of the OTA in each integrator.

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  • 128.
    Bergsten, Johan
    et al.
    Chalmers, Gothenburg, Sweden.
    Li, Xun
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Nilsson, Daniel
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Danielsson, Örjan
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Pedersen, Henrik
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Kemi. Linköpings universitet, Tekniska fakulteten.
    Janzén, Erik
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Forsberg, Urban
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Rorsman, Niklas
    Chalmers, Gothenburg, Sweden.
    AlGaN/GaN high electron mobility transistors with intentionally doped GaN buffer using propane as carbon precursor2016Ingår i: Japanese Journal of Applied Physics, ISSN 0021-4922, E-ISSN 1347-4065, Vol. 55, s. 05FK02-1-05FK02-4, artikel-id 05FK02Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    AlGaN/GaN high electron mobility transistors (HEMTs) fabricated on a heterostructure grown by metalorganic chemical vapor deposition using analternative method of carbon (C) doping the buffer are characterized. C-doping is achieved by using propane as precursor, as compared to tuningthe growth process parameters to control C-incorporation from the gallium precursor. This approach allows for optimization of the GaN growthconditions without compromising material quality to achieve semi-insulating properties. The HEMTs are evaluated in terms of isolation anddispersion. Good isolation with OFF-state currents of 2 ' 10%6A/mm, breakdown fields of 70V/μm, and low drain induced barrier lowering of0.13mV/V are found. Dispersive effects are examined using pulsed current–voltage measurements. Current collapse and knee walkout effectslimit the maximum output power to 1.3W/mm. With further optimization of the C-doping profile and GaN material quality this method should offer aversatile approach to decrease dispersive effects in GaN HEMTs.

  • 129.
    Bergstrand, Johan
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem.
    Förbättra SNR i en digital TV-box genom översampling av A/D-omvandlare2010Självständigt arbete på grundnivå (högskoleexamen), 10 poäng / 15 hpStudentuppsats (Examensarbete)
    Abstract [sv]

    Vår uppgift är att undersöka om vi kan förbättra utsignalens kvalité från ett digitalt TV-kort genom att översampla A/D-omvandlare. Vi kommer att programmera vår kod i en FPGA och i den finns enbart 3 stycken multiplikatorer lediga. Utgången från vårt filter ska ha samma frekvens som innan översamplingen, vi kommer därför att bygga ett FIR-filter som decimerar signalen. Vi valde detta filter för att kunna utnyttja symmetri och minimera antalet multiplikatorer. Vi använde ett filter med ordningen 44 vilket ger 45 koefficienter. Dessa koefficienter beräknades i Matlab med hjälp av funktionen ”firls” som minimerar energivärdet i stoppbandet.

     

    Vi utförde mätningar på SNR samt grupplöptiden. Dessa visade att SNR förbättrades endast 0,7 dB samt att grupplöptiden inte påverkades nämnvärt. För att kunna förbättra SNR och hitta felkällan som begränsar signalen gjorde vi följande åtgärder.

     

    • Fastställde att instrumenten verkligen kunde mäta så höga decibelvärden.
    • Att det inte finns några begränsningar på utgången.
    • Att det inte finns några störningar på ingången.
    • Ändrade koefficienter i filterkoden för att variera filtrets egenskaper.

     

    De åtgärder vi gjorde förbättrade inte SNR på konstruktionen. På grund av tidsbrist kunde vi inte fortsätta våra undersökningar. Det vi skulle gjort från början är att skapa en testbänk till vår filterkod för att kunna verifiera att den fungerade. Vi kan inte med säkerhet fastställa att filtret verkligen fungerar enligt de initiala kraven. Vi skulle även försöka förbättra klockan till FPGA:n eftersom denna kan skapa klockjitter. Vi skulle även försöka skapa fler mätpunkter i kedjan, att kunna mäta signalen efter A/D-omvandlaren och direkt efter vårt filter.

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  • 130.
    Bergström, Joakim
    et al.
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Nilsson-Sundén, Hampus
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Cost effective optimization of system safety and reliability2015Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    A method able to analyze and optimize subsystems could be useful to reduce project cost, increase subsystem reliability, improve overall aircraft safety and reduce subsystem weight. The earlier the optimization of development of an aircraft in the design phase can be performed, the better the yield of the optimization becomes. This master thesis was formed in order to construct an automatic analysis method, implementing a Matlab script, evaluating devices forming aircraft subsystems using a Genetic Algorithm. In addition to aircraft subsystems, the method constructed in the work is compatible with systems of various industries with minor modifications of the script.

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  • 131.
    Bernardin, Evans K.
    et al.
    Univ S Florida, FL 33620 USA.
    Frewin, Christopher L.
    Univ Texas Dallas, TX 75080 USA.
    Everly, Richard
    Nanotechnol Res and Educ Ctr USF, FL 33617 USA.
    Ul-Hassan, Jawad
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Saddow, Stephen E.
    Univ S Florida, FL 33620 USA.
    Demonstration of a Robust All-Silicon-Carbide Intracortical Neural Interface2018Ingår i: Micromachines, ISSN 2072-666X, E-ISSN 2072-666X, Vol. 9, nr 8, artikel-id 412Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Intracortical neural interfaces (INI) have made impressive progress in recent years but still display questionable long-term reliability. Here, we report on the development and characterization of highly resilient monolithic silicon carbide (SiC) neural devices. SiC is a physically robust, biocompatible, and chemically inert semiconductor. The device support was micromachined from p-type SiC with conductors created from n-type SiC, simultaneously providing electrical isolation through the resulting p-n junction. Electrodes possessed geometric surface area (GSA) varying from 496 to 500 K m(2). Electrical characterization showed high-performance p-n diode behavior, with typical turn-on voltages of 2.3 V and reverse bias leakage below 1 nArms. Current leakage between adjacent electrodes was 7.5 nArms over a voltage range of -50 V to 50 V. The devices interacted electrochemically with a purely capacitive relationship at frequencies less than 10 kHz. Electrode impedance ranged from 675 +/- 130 k (GSA = 496 mu m(2)) to 46.5 +/- 4.80 k (GSA = 500 K mu m(2)). Since the all-SiC devices rely on the integration of only robust and highly compatible SiC material, they offer a promising solution to probe delamination and biological rejection associated with the use of multiple materials used in many current INI devices.

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  • 132.
    Beshkova, M.
    et al.
    Bulgarian Academic Science, Bulgaria.
    Hultman, Lars
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Tunnfilmsfysik. Linköpings universitet, Tekniska fakulteten.
    Yakimova, Rositsa
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Device applications of epitaxial graphene on silicon carbide2016Ingår i: Vacuum, ISSN 0042-207X, E-ISSN 1879-2715, Vol. 128, s. 186-197Artikel, forskningsöversikt (Refereegranskat)
    Abstract [en]

    Graphene has become an extremely hot topic due to its intriguing material properties allowing for ground-breaking fundamental research and applications. It is one of the fastest developing materials during the last several years. This progress is also driven by the diversity of fabrication methods for graphene of different specific properties, size, quantity and cost. Graphene grown on SiC is of particular interest due to the possibility to avoid transferring of free standing graphene to a desired substrate while having a large area SiC (semi-insulating or conducting) substrate ready for device processing. Here, we present a review of the major current explorations of graphene on SiC in electronic devices, such as field effect transistors (FET), radio frequency (RF) transistors, integrated circuits (IC), and sensors. The successful role of graphene in the metrology sector is also addressed. Typical examples of graphene on SiC implementations are illustrated and the drawbacks and promises are critically analyzed. (C) 2016 Elsevier Ltd. All rights reserved.

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  • 133.
    Bharadhwaj, Harsha
    Linköpings universitet, Institutionen för systemteknik.
    Study and Realisation of Nyquist Rate Filters in Voltage Inverter Switch Technique2006Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    Low-sensitivity switched capacitor filters imitating 'R','L' and 'C' can be built by means of capacitances, ordinary switches and voltage inverter switches (VIS). These structures carry the inherent bilinear transformation of their doubly resistively terminated ladder reference filters. This one to one correspondence between the 's-domain' and the 'z-domain' results in the Nyquist criterion being the only limitation on the sampling frequency. This eliminates the necessity for oversampling and VIS filters can be designed for high operating rates.

    Filters based on VIS principle were analysed in previous literatures in the 'phi-domain'. In this thesis work, a successful attempt has been made to formulate an analysis procedure for discrete-time filters based on VIS principle in the 'z-domain'. Significant details have been brought out in comparison with the respective reference filter. A fifth-order lowpass filter has been designed and implemented to exhibit the closeness to the bilinearly transformed continuous-time reference filter. Settling time analysis has been done to justify the need for filters using VIS principle as compared to the filters employing integrator based switched capacitor filter. It is shown that VIS filter can be made to settle within half the period required for a conventional integrator based switched capacitor filter.

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  • 134.
    Bhardwaj, Divya Anshu
    Linköpings universitet, Institutionen för systemteknik.
    Inverse Discrete Cosine Transform by Bit Parallel Implementation and Power Comparision2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    The goal of this project was to implement and compare Invere Discrete Cosine Transform using three methods i.e. by bit parallel, digit serial and bit serial. This application describes a one dimensional Discrete Cosine Transform by bit prallel method and has been implemented by 0.35 ìm technology. When implementing a design, there are several considerations like word length etc. were taken into account. The code was implemented using WHDL and some of the calculations were done in MATLAB. The VHDL code was the synthesized using Design Analyzer of Synopsis; power was calculated and the results were compared.

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  • 135.
    Bhaskar Gudey, Bala
    et al.
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Kane, Jacob
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Co-Design of Antenna and LNA for 1.7 - 2.7 GHz2012Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    In a radio frequency (RF) system, the front-end of a radio receiver consists of an active antenna arrangement with a conducting mode antenna along with an active circuit. This arrangement helps avoid losses and SNR degradation due to the use of a coaxial cable. The active circuit is essentially an impedance matching network and a low noise amplification (LNA) stage. The input impedance of the antenna is always different from the source impedance required to be presented at the LNA input for maximum power gain and this gives rise to undesired reflections at the antenna-LNA junction. This necessitates a matching network that provides the impedance matching between the antenna and the LNA at a central frequency (CF). From the Friis formula it is seen that the total noise figure (NF) of the system is dependent on the noise figure and gain of the first stage. So, by having an LNA that provides a high gain (typically >15 dB) which inserts minimum possible noise (desirably < 1 dB), the overall noise figure of the system can be maintained low. The LNA amplifies the signal to a suitable power level that will enable the subsequent demodulation and decoding stages to efficiently recover the original signal. The antenna and the LNA can be matched with each other in two possible ways. The first approach is the traditional method followed in RF engineering where in both the antenna and LNA are matched to 50 Ω terminations and connected to each other. In this classical method, the antenna and LNA are matched to 50 Ω at the CF and does not take into account the matching at other frequencies in the operation range. The second approach employs a co-design method to match the antenna and LNA without a matching network or with minimum possible components for matching. This is accomplished by varying one or more parameters of either the antenna or LNA to control the impedances and ultimately achieve a matching over a substantial range of frequencies instead at the CF alone. The co-design method is shown to provide higher gain and a lower NF with reduced number of components, cost and size as compared to the classical method.

    The thesis work presented here is a study, design and manufacturing of an antenna-LNA module for a wide frequency range of 1.7 GHz – 2.7 GHz to explore the gain and NF improvements in the co-design approach. Planar micro strip patch antennas and GaAs E-pHEMT transistor based LNA’s are designed and the matching and co-design are simulated to test the gain and NF improvements. Furthermore, fully functional prototypes are developed with Roger R04360 substrate and the results from simulations and actual measurements are compared and discussed

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  • 136.
    Bhat, Goutam
    Linköpings universitet, Institutionen för systemteknik, Datorseende.
    Accurate Tracking by Overlap Maximization2019Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Visual object tracking is one of the fundamental problems in computer vision, with a wide number of practical applications in e.g.\ robotics, surveillance etc. Given a video sequence and the target bounding box in the first frame, a tracker is required to find the target in all subsequent frames. It is a challenging problem due to the limited training data available. An object tracker is generally evaluated using two criterias, namely robustness and accuracy. Robustness refers to the ability of a tracker to track for long durations, without losing the target. Accuracy, on the other hand, denotes how accurately a tracker can estimate the target bounding box.

    Recent years have seen significant improvement in tracking robustness. However, the problem of accurate tracking has seen less attention. Most current state-of-the-art trackers resort to a naive multi-scale search strategy which has fundamental limitations. Thus, in this thesis, we aim to develop a general target estimation component which can be used to determine accurate bounding box for tracking. We will investigate how bounding box estimators used in object detection can be modified to be used for object tracking. The key difference between detection and tracking is that in object detection, the classes to which the objects belong are known. However, in tracking, no prior information is available about the tracked object, other than a single image provided in the first frame. We will thus investigate different architectures to utilize the first frame information to provide target specific bounding box predictions. We will also investigate how the bounding box predictors can be integrated into a state-of-the-art tracking method to obtain robust as well as accurate tracking.

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  • 137.
    Bhide, Ameya
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska fakulteten.
    Alvandpour, Atila
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska fakulteten.
    Critical Path Analysis of Two-channel Interleaved Digital MASH ΔΣ Modulators2013Ingår i: 2013 NORCHI, 11–12 November, 2013, Vilnius, Lithuania, IEEE , 2013, s. 1-4Konferensbidrag (Refereegranskat)
    Abstract [en]

    Implementation of wireless wideband transmitters using ΔΣ DACs requires very high speed modulators. Digital MASH ΔΣ modulators are good candidates for speed enhancement using interleaving because they require only adders and can be cascaded. This paper presents an analysis of the integrator critical path of two-channel interleaved ΔΣ modulators. The bottlenecks for a high-speed operation are identified and the performance of different logic styles is compared. Static combinational logic shows the best trade-off and potential for use in such high speed modulators. A prototype 12-bit second order MASH ΔΣ modulator designed in 65 nm CMOS technology based on this study achieves 9 GHz operation at 1 V supply.

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  • 138.
    Bhide, Ameya
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska högskolan.
    Alvandpour, Atila
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska högskolan.
    Timing challenges in high-speed interleaved ΔΣ DACs2014Ingår i: 14th International Symposium on Integrated Circuits (ISIC), 2014, IEEE , 2014, s. 46-49Konferensbidrag (Refereegranskat)
    Abstract [en]

    Time-interleaved ΔΣ DACs have the potential for wideband and high-speed operation. Their SNR is limited by the timing skew between the output delays of the channels to the output. In a two-channel interleaved ΔΣ DAC, the channel skew arises from the duty cycle error in the half sample rate clock. The effects of timing skew error can be mitigated by hold interleaving, digital pre-filtering or compensation in the form of analog post-correction or digital pre-correction. This paper presents a comparative study of these techniques for two-channel interleaving and the trade-offs are investigated. First order FIR pre-filtering is found to be a suitable solution with a moderate DAC matching penalty of one bit. Higher order pre-filtering achieves a near immunity to timing skew at the cost of higher matching penalty. Correction techniques are found to be less effective than pre-filtering and not well suited for high-speed implementation.

  • 139.
    Bhuiya, Iftekharul Karim
    Linköpings universitet, Institutionen för systemteknik.
    Design of a High Speed AGC Amplifier for Multi-level Coding2006Självständigt arbete på avancerad nivå (magisterexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    This thesis presents the design of a broadband and high speed dc-coupled AGC amplifier for multi-level (4-PAM) signaling with a symbol rate of 1-GS/s ( 2-Gb/s ) . It is a high frequency analog design with several design challenges such as high -3 dB bandwidth ( greater than 500 MHz ) and highly linear gain while accommodating a large input swing range ( 120 mVp-p to 1800 mVp-p diff.) and delivering constant

    differential output swing of 1700 mVp-p to 50-ohm off-chip loads at high speed. Moreover, the gain control circuit has been designed in analog domain. The amplifier incorporates both active and passive feedback in shunt-shunt topology in order to achieve wide bandwidth. This standalone chip has been implemented in AMS 0.35 micron CMOS process. The post layout eye-diagrams seem to be quite satisfactory.

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    FULLTEXT01
  • 140.
    Bilbao, Héctor Uhalte
    Linköpings universitet, Institutionen för systemteknik.
    DAB Transmission System Simulation2004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    DAB (Digital Audio Broadcasting) is the radio digital system developed as an european standard by the ETSI, EN 300 400, based on the Eureka-147 group works, to improve the performance of the analogue radio systems (AM and FM). The system is based on the OFDM technology which allows DAB to exploit the spectrum frequencies in a better way with a higher quality of sound for mobile receivers specially. The main part of the OFDM system is based on the FFT algorithms to spread the data flow over different orthogonal carriers. The simulation has been developed in Simulink<sup>TM</sup>and Matlab<sup>TM</sup>and the layout designed follows faithfully the standard for the transmission system. The simulation can be reloaded by the user with the information presented in this thesis. Thus, this work can be continued to complete the DAB whole system simulation. The results obtained running this simulation show the main DAB system characteristics.

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    FULLTEXT01
  • 141.
    Biswas, Shampa
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System.
    Integrated CMOS Doppler Radar: System Specification & Oscillator Design2016Självständigt arbete på avancerad nivå (magisterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    This thesis report presents system specification, such as frequency and output power level, and selection topology of an oscillator circuit suitable for a CMOS Integrated Doppler radar application, in order to facilitate short range target detection within 5-15 m range, using a 0.35 μm CMOS process. With this selected CMOS process, the frequency band at 2.45 GHz or 5 GHz, with a maximum output power level of 25 mW (e.i.r.p), is found to be appropriate for the whole system to obtain a good performance. In this thesis work, a Ring VCO with pseudo-differential architecture has been designed and optimised for 2.45 GHz application. However, for 5 GHz application, a differential cross-coupled LC VCO oscillator topology has been suggested and it is so designed that it can be further scaled down to operate at a frequency of 2.45 GHz. The performance of the oscillator circuits has been tested at circuit level and has been presented as simulation results in this report.

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    fulltext
  • 142.
    Bjelevac, Salko
    et al.
    Linköpings universitet, Institutionen för systemteknik, Fordonssystem. Linköpings universitet, Tekniska fakulteten.
    Karlsson, Peter
    Linköpings universitet, Institutionen för systemteknik, Fordonssystem. Linköpings universitet, Tekniska fakulteten.
    Steering System Verification Using Hardware-in-the-Loop2015Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    In order for leading industrial companies to remain competitive, the process of product developement constantly needs to improve. In order to shorten development time -- that is the time from idea to product -- simulations of products in-house is becoming a popular method. This method saves money and time since expensive prototypes become unnecessary. Today the calibration of steering gears is done in test vehicles by experienced test drivers. This is a time consuming process that is very costly because of expensive test vehicles.

    This report investigates possibilities and difficulties with transfering the calibrations from field to rig. A steering rig has been integrated with a car simulation program. Comparisons between simulation in the loop (SIL) and hardware in the loop (HIL) have been made and differences between different configurations of steering gears have been evaluated. An automatic process including calibration of parameters, testing and analysis of the test results has been implemented. The work laid the foundation of calibration of steering parameters and showed correlation between calibration parameters and objective metrics.

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    fulltext
  • 143.
    Bjärhusen, Jonas
    Linköpings universitet, Institutionen för systemteknik.
    Design av slutsteg med digital PWM-teknik för gitarr2006Självständigt arbete på avancerad nivå (magisterexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [sv]

    Softube har utvecklat DSP-kort och mjukvara för att simulera ljudet från rörförstärkare. Syftet med det här examensarbetet är att konstruera en kompakt förstärkare med hög effekt som ska fungera tillsammans med DSP-kortet för att bilda en enhet som ska kunna ersätta flera olika typer av gitarrförstärkare. Fördelar med en sådan lösning är att den skulle vara lättare att bära, ta mindre plats och bli billigare, än om de riktiga förstärkarna används. Förstärkaren som konstruerats är av klass D-typ med digital modulator. Det finns ett antal olika färdiga moduler som utgår från en analog signal, men eftersom signalen från DSP-kortet kommer i digital form skulle i så fall en separat DA-omvandlare behövas. Resultatet är en förstärkare på ca 400 W, med 0,4% distorsion vid 1 kHz och 70% av maximal signalnivå. Rapporten består av en allmän faktadel där principerna för klass D presenteras, en del som beskriver konstruktionen av just den här förstärkarmodulen, och sist en resultatdel med mätningar.

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  • 144.
    Bjärhusen, Jonas
    et al.
    Linköpings universitet, Institutionen för systemteknik.
    Martinsson, Jan-Olof
    Linköpings universitet, Institutionen för systemteknik.
    PWM Effekt Audioförstärkare2004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    The purpose with the report is to show that it is possible to design a class-D amplifier, using a programmable FPGA mounted on a developing card from Xess and a H-bridge. The FPGA was programmed in VHDL which is the language the software from Xilinx use to implement a logical function into the FPGA The logical function corresponds to a modeling of the music signal and the modeling can be described as a comparator which compare the music signal with a triangle wave and as a out signal produce a pulse width modulated (PWM) signal. The report is also a review and evaluating of two different modulating technologies, AD- modeling and BD-modeling. A detailed part about how the H-bridge was designed and how it works. The result of this project is a working audio amplifier to a significant lower price than the products in todays market.

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    FULLTEXT01
  • 145.
    Björklund, Nora
    Linköpings universitet, Institutionen för systemteknik. Linköpings universitet, Tekniska högskolan.
    Dynamic Reconfiguration using Crystalline Oxide Semiconductor Technology in a Multi-Context Field Programmable Gate Array2014Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Dynamically reconfigurable FPGAs was described in the 1990’s by Bolotski,Tau, DeHon and Trimberger. The idea was to expand the FPGA’sfunction space temporally instead of spatially, and in doing so allowing reuseof the FPGA’s functional resources in time, increasing the utilization rate of the functional resources. Many DPGA designs today are based on the "Time-Multiplexed FPGA" that Trim-berger et al. described in 1997 now more commonly called Multi-Context FPGA,in which memory bits are added to every configuration memory to create con-figuration contexts that the FPGA can switch between. The dominating memorytechnology used in FPGAs and DPGAs is SRAM; a volatile memory technologythat uses a relatively large area and also have an excessive power consumption. Because of the increase of configuration bits in DPGAs, the SRAM memory draw-backs imposes larger effects on its design.In recent years new memory technologies have been implemented in a broadrange of applications, out of which DPGAs are one. Among these technologies,implementation with crystalline IGZO FETs have been argued to overcome sev-eral of the earlier mentioned drawbacks in a DPGA. The memory technology isbased on a hybrid-process of CMOS and crystalline-IGZO, with IGZO materialstacked on top of the CMOS to save area; further, it has an extremely low off-statepower which reduces off-state leakage and is used to create small, non-volatilememory cells. In this thesis a way to enable dynamic reconfiguration in a CAAC-IGZO-based MC-FPGA is presented. A routing switch is presented and implemented to solvea problem in a reference design relating to boosting on the routing switchs’ con-figuration memories. The proposed routing switch is non-volatile and can reducearea by about 38% , and increase performance by 37% at a driving voltage of 1.5Vcompared to a SRAM-based routing switch.

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    thesis_norbj648
  • 146.
    Björn, Annika
    et al.
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten.
    Safaric, Luka
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten.
    Karlsson, Anna
    Scandinavian Biogas Fuels AB, Sweden.
    Danielsson, Åsa
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten.
    Ejlertsson, Jörgen
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten. Scandinavian Biogas Fuels AB, Sweden.
    Svensson, Bo
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten.
    Shakeri Yekta, Sepehr
    Linköpings universitet, Institutionen för tema, Tema Miljöförändring. Linköpings universitet, Filosofiska fakulteten.
    Substrate and operational conditions as regulators of fluid properties in full-scale continuous stirred-tank biogas reactors - implications for rheology-driven power requirements2018Ingår i: Water Science and Technology, ISSN 0273-1223, E-ISSN 1996-9732, Vol. 78, nr 4, s. 814-826Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Understanding fluid rheology is important for optimal design and operation of continuous stirred-tank biogas reactors (CSTBRs) and is the basis for power requirement estimates. Conflicting results have been reported regarding the applicability of total solid (TS) and/or total volatile solid (TVS) contents of CSTBR fluids as proxies for rheological properties. Thus, the present study investigates relationships between rheological properties of 12 full-scale CSTBR fluids, their substrate profiles, and major operational conditions, including pH, TS and TVS contents, organic loading rate, hydraulic retention time, and temperature. Rheology-driven power requirements based on various fluid characteristics were evaluated for a general biogas reactor setup. The results revealed a significant correlation only between the rheological fluid properties and TS or TVS contents for sewage sludge digesters and thermophilic co-digesters (CD), but not for mesophilic CD. Furthermore, the calculated power requirements for pumping and mixing, based on the various fluid characteristics of the studied CSTBRs, varied broadly irrespective of TS and TVS contents. Thus, this study shows that the TS and/or TVS contents of digester fluid are not reliable estimators of the rheological properties in CSTBRs digesting substrates other than sewage sludge.

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    fulltext
  • 147.
    Blaauwendraad, Bart
    Linköpings universitet, Institutionen för systemteknik.
    TIR, design and testing of a Simple GALS2002Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    Globally-asynchronous locally-synchronous (GALS) systems may become a solution for nowadays challenges in the field of VLSI design. Fully synchronous chips are becoming not feasible anymore due to clock distribution and power consumtion problems. The value of GALS lies in combination of well know synchronous design methods and relative simple asynchronous communication channels.

    The key components are the communication control ports around the synchronous modules and the stretchable clock also called a wrapper. This clock has a unbound delay and is controlled by events the asynchronous channel.

    A simple GALS system consisting of a 4-bit transmitter, integrator and receiver has been designed and layouted for a 0,35 micron CMOS proces. A 4-phase bundled protocol is used with GasP FIFO's. Novel circuits has been designed to switch from the one wire asynchronous communication of the FIFO to the 4-phase of the wrapper.

    The report also dicusses the challenges for manufature test on asynchronous designs. A test strategy for GALS systems is been devoloped.

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  • 148. Beställ onlineKöp publikationen >>
    Blad, Anton
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Early-Decision Decoding of LDPC Codes2009Licentiatavhandling, monografi (Övrigt vetenskapligt)
    Abstract [en]

    Since their rediscovery in 1995, low-density parity-check (LDPC) codes have received wide-spread attention as practical capacity-approaching code candidates. It has been shown that the class of codes can perform arbitrarily close to the channel capacity, and LDPC codes are also used or suggested for a number of important current and future communication standards. However, the problem of implementing an energy-efficient decoder has not yet been solved. Whereas the decoding algorithm is computationally simple, withuncomplicated arithmetic operations and low accuracy requirements, the random structure and irregularity of a theoretically well-defined code does not easily allow efficient VLSI implementations. Thus the LDPC decoding algorithm can be said to be communication-bound rather than computation-bound.

    In this thesis, a modification to the sum-product decoding algorithm called early-decision decoding is suggested. The modification is based on the idea that the values of the bits in a block can be decided individually during decoding. As the sum-product decoding algorithm is a soft-decision decoder, a reliability can be defined for each bit. When the reliability of a bit is above a certain threshold, the bit can be removed from the rest of the decoding process, and thus the internal communication associated with the bit can be removed in subsequent iterations. However, with the early decision modification, an increased error probability is associated. Thus, bounds on the achievable performance as well as methods to detect graph inconsistencies resulting from erroneous decisions are presented. Also, a hybrid decoder achieving a negligible performance penalty compared to the sum-product decoder is presented. With the hybrid decoder, the internal communication is reduced with up to 40% for a rate-1/2 code with a length of 1152 bits, whereas increasing the rate allows significantly higher gains.

    The algorithms have been implemented in a Xilinx Virtex 5 FPGA, and the resulting slice utilization andenergy dissipation have been estimated. However, due to increased logic overhead of the early decision decoder, the slice utilization increases from 14.5% to 21.0%, whereas the logic energy dissipation reduction from 499 pJ to 291 pJ per iteration and bit is offset by the clock distribution power, increased from 141 pJ to 191 pJ per iteration and bit. Still, the early decision decoder shows a net 16% estimated decrease of energy dissipation.

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    Early-Decision Decoding of LDPC Codes
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    Cover
  • 149.
    Blad, Anton
    Linköpings universitet, Institutionen för systemteknik.
    Efficient Decoding Algorithms for Low-Density Parity-Check Codes2005Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    Low-density parity-check codes have recently received much attention because of their excellent performance and the availability of a simple iterative decoder. The decoder, however, requires large amounts of memory, which causes problems with memory consumption.

    We investigate a new decoding scheme for low density parity check codes to address this problem. The basic idea is to define a reliability measure and a threshold, and stop updating the messages for a bit whenever its reliability is higher than the threshold. We also consider some modifications to this scheme, including a dynamic threshold more suitable for codes with cycles, and a scheme with soft thresholds which allow the possibility of removing a decision which have proved wrong.

    By exploiting the bits different rates of convergence we are able to achieve an efficiency of up to 50% at a bit error rate of less than 10^-5. The efficiency should roughly correspond to the power consumption of a hardware implementation of the algorithm.

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    FULLTEXT01
  • 150. Beställ onlineKöp publikationen >>
    Blad, Anton
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Low Complexity Techniques for Low Density Parity Check Code Decoders and Parallel Sigma-Delta ADC Structures2011Doktorsavhandling, monografi (Övrigt vetenskapligt)
    Abstract [en]

    Since their rediscovery in 1995, low-density parity-check (LDPC) codes have received wide-spread attention as practical capacity-approaching code candidates. It has been shown that the class of codes can perform arbitrarily close to the channel capacity, and LDPC codes are also used or suggested for a number of important current and future communication standards. However, the problem of implementing an energy-efficient decoder has not yet been solved. Whereas the decoding algorithm is computationally simple, with uncomplicated arithmetic operations and low accuracy requirements, the random structure and irregularity of a theoretically well-defined code does not easily allow efficient VLSI implementations. Thus the LDPC decoding algorithm can be said to be communication-bound rather than computation-bound.

    In this thesis, a modification to the sum-product decoding algorithm called earlydecision decoding is suggested. The modification is based on the idea that the values of the bits in a block can be decided individually during decoding. As the sumproduct decoding algorithm is a soft-decision decoder, a reliability can be defined for each bit. When the reliability of a bit is above a certain threshold, the bit can be removed from the rest of the decoding process, and thus the internal communication associated with the bit can be removed in subsequent iterations. However, with the early decision modification, an increased error probability is associated. Thus, bounds on the achievable performance as well as methods to detect graph inconsistencies resulting from erroneous decisions are presented. Also, a hybrid decoder achieving a negligible performance penalty compared to the sum-product decoder is presented. With the hybrid decoder, the internal communication is reduced with up to 40% for a rate-1/2 code with a length of 1152 bits, whereas increasing the rate allows significantly higher gains.

    The algorithms have been implemented in a Xilinx Virtex 5 FPGA, and the resulting slice utilization and energy dissipation have been estimated. However, due to increased logic overhead of the early decision decoder, the slice utilization increases from 14.5% to 21.0%, whereas the logic energy dissipation reduction from 499 pJ to 291 pJ per iteration and bit is offset by the clock distribution power, increased from 141 pJ to 191 pJ per iteration and bit. Still, the early decision decoder shows a net 16% estimated decrease of energy dissipation.

    Ladda ner fulltext (pdf)
    Low Complexity Techniques for Low Density Parity Check Code Decoders and Parallel Sigma-Delta ADC Structures
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    omslag
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