liu.seSök publikationer i DiVA
Ändra sökning
Avgränsa sökresultatet
2345678 201 - 250 av 1022
RefereraExporteraLänk till träfflistan
Permanent länk
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annat format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annat språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
Träffar per sida
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sortering
  • Standard (Relevans)
  • Författare A-Ö
  • Författare Ö-A
  • Titel A-Ö
  • Titel Ö-A
  • Publikationstyp A-Ö
  • Publikationstyp Ö-A
  • Äldst först
  • Nyast först
  • Skapad (Äldst först)
  • Skapad (Nyast först)
  • Senast uppdaterad (Äldst först)
  • Senast uppdaterad (Nyast först)
  • Disputationsdatum (tidigaste först)
  • Disputationsdatum (senaste först)
  • Standard (Relevans)
  • Författare A-Ö
  • Författare Ö-A
  • Titel A-Ö
  • Titel Ö-A
  • Publikationstyp A-Ö
  • Publikationstyp Ö-A
  • Äldst först
  • Nyast först
  • Skapad (Äldst först)
  • Skapad (Nyast först)
  • Senast uppdaterad (Äldst först)
  • Senast uppdaterad (Nyast först)
  • Disputationsdatum (tidigaste först)
  • Disputationsdatum (senaste först)
Markera
Maxantalet träffar du kan exportera från sökgränssnittet är 250. Vid större uttag använd dig av utsökningar.
  • 201.
    Cherukumudi, Dinesh
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter.
    Ultra-Low Noise and Highly Linear Two-Stage Low Noise Amplifier (LNA)2011Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    An ultra-low noise two-stage LNA design for cellular basestations using CMOS is proposed in this thesis work.  This thesis is divided into three parts. First, a literature survey which intends to bring an idea on the types of LNAs available and their respective outcomes in performances, thereby analyze how each design provides different results and is used for different applications. In the second part, technology comparison for 0.12µm, 0.18µm, and 0.25µm technologies transistors using the IBM foundry PDKs are made to analyze which device has the best noise performance. Finally, in the third phase bipolar and CMOS-based two-stage LNAs are designed using IBM 0.12µm technology node, decided from the technology comparison. In this thesis a two-stage architecture is used to obtain low noise figure, high linearity, high gain, and stability for the LNA. For the bipolar design, noise figure of 0.6dB, OIP3 of 40.3dBm and gain of 26.8dB were obtained. For the CMOS design, noise figure of 0.25dB, OIP3 of 46dBm and gain of 26dB were obtained. Thus, the purpose of this thesis is to analyze the LNA circuit in terms of design, performance, application and various other parameters. Both designs were able to fulfill the design goals of noise figure < 1 dB, OIP3 > 40 dBm, and gain >18 dB.

    Ladda ner fulltext (pdf)
    fulltext
  • 202.
    Chinnam, Krishna Chytanya
    Department of Physics, Chemistry and Biology.
    Capacitive pH-Sensors using pH sensitive polymer2009Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    This project aims in building a new experimental setup for capacitive measurements of a pH-Sensor. PAA-IOA (Poly Acrylic Acid co – Iso Octyl Acrylate) is the dielectric material over the in-plane interdigitated gold electrodes where PAA IOA acts as an H+ ion sensing layer. The changes in the capacitance of the sensor when the sensor is dipped into different pH solutions will be quantized accordingly. The dipping setup is built in such a way that the electrodes (containing the polymer layer) can be easily dipped into different pH liquids and to eliminate any contact between the polymer and set-up (e.g. pressure effects on the sensor). From the setup it is visible that the gold electrodes are not subjected to any external force as in the case of the setup used previously. Three phases of experiments have been used in this project to get a clear view on the working principle of the polymer. The effect of pH is only considered in this project, as we already have the evidences for the salt sensitiveness of PAA IOA from the work done in the past. The influence of various pH on polymer is observed as capacitance measurements. Response time is more than 5 minutes for PAA IOA. ∆C decreases with frequency and frequency choice depends on application/electronics. The degree of other ions influence is not clear but they have a minor influence in the resistance.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 203.
    Choudhury, Imran
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Design of Variable Attenuators Using Different Kinds of PIN-Diodes2013Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Variable attenuators are important circuits that can be employed in many radio frequency (RF) applications, e.g., in automatic gain control (AGC) amplifiers, broadband gain-control blocks at RF frequencies or as broadband vector modulators. For any applications, low insertion phase shift and low power consumption are of interest. A way to implement variable attenuators is using the RF PIN diode. The PIN diode is characterized by a low doped (I = intrinsic) semiconductor region between p- (P) and n-type (N) semiconductor regions. Besides the variable attenuators, the PIN-diode is used in other RF circuits, such as RF switches, limiters and phase shifters. This project presents the design of variable attenuators at 7.5 GHz and 500 MHz frequency bandwidth for ultra-wideband (UWB) applications using two different PIN diodes. The variable attenuators have a topology based on 90° hybrid couplers. The design is performed using Advance Design Systems (ADS) from Agilent Technologies Inc. After presenting the PIN diode and its equivalent circuit, the theory of the 90° passive directional branch line coupler and the operation principle of the variable attenuators are presented. As the selection of the appropriate PIN diode is a critical step in the design, special attention is dedicated to this aspect. It follows the design of the variable attenuators with extensive descriptions of the simulations in ADS. Firstly, both series and shunt attenuators are presented. However, as these circuits normally offer narrow band variable attenuation, the 900 directional branch line coupler is used in the attenuator for broader band operation. At the end, a double hybrid coupler is found to eliminate the ripple in the high attenuation state of the single hybrid coupled attenuator. So the final topology of the variable attenuator is a double hybrid coupler variable attenuator- Moreover, in this project, different PIN diodes are investigated for variable attenuator applications. Different manufacture companies are currently providing different kinds of PIN diodes in terms of parameters and packages. Every type of PIN diodes are providing different sort of advantages to the designers. That is why it has become more difficult for the RF designers to choose the right device for the specified application. Beside the design of the variable attenuator using PIN diodes, some considerations in form of a guide line to the designers while they are using the PIN diode for designing the variable attenuator. In this work, the used PIN diodes are a beam lead PIN diode and chip PIN diode. The beam lead PIN diode is used because it is manufactured for high frequency and it produces excellent electrical performance and isolation at high frequencies. On the other hand, the chip PIN diode eliminates the problem of package parasitics. However, printed circuit board (PCB) manufacturing limitations at the university laboratory incline the balance in the favor of the beam lead PIN diode, HPND- 4005 from Avagotech, instead of the also considered chip diode MA-COM MA4P202.

    Ladda ner fulltext (pdf)
    fulltext
  • 204.
    Christoph, Heilmair
    Linköpings universitet, Institutionen för systemteknik, Informationskodning.
    GPU-Based Visualisation of Viewshed from Roads or Areas in a 3D Environment2016Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Viewshed refers to the calculation and visualisation of what part of a terrain isvisible from a given observer point. It is used within many fields, such as militaryplanning or telecommunication tower placement. So far, no general fast methodsexist for calculating the viewshed for multiple observers that may for instancerepresent a road within the terrain. Additionally, if the terrain contains over-lapping structures such as man-made constructions like bridges, most currentviewshed algorithms fail. This report describes two novel methods for viewshedcalculation using multiple observers for terrain that may contain overlappingstructures. The methods have been developed at Vricon in Linköping as a Mas-ter’s Thesis project. Both methods are implemented using the graphics program-ming unit and the OpenGL graphics library, using a computer graphics approach.Results are presented in the form of figures and images, as well as running timetables using two different test setups. Lastly, future possible improvements arealso discussed. The results show that the first method is a viable real-time solu-tion and that the second method requires some additional work.

    Ladda ner fulltext (pdf)
    fulltext
  • 205.
    Claesson, Jonas
    Linköpings universitet, Institutionen för systemteknik.
    Design and Implementation of an Asynchronous Pipelined FFT Processor2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    FFT processors are today one of the most important blocks in communication equipment. They are used in everything from broadband to 3G and digital TV to Radio LANs. This master's thesis project will deal with pipelined hardware solutions for FFT processors with long FFT transforms, 1K to 8K points. These processors could be used for instance in OFDM communication systems.

    The final implementation of the FFT processor uses a GALS (Globally Asynchronous Locally Synchronous) architecture, that implements the SDF (Single Delay Feedback) radix-22 algorithm.

    The goal of this report is to outline the knowledge gained during the master's thesis project, to describe a design methodology and to document the different building blocks needed in these kinds of systems.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 206.
    Collaert, N.
    et al.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Alian, A.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Arimura, H.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Boccardi, G.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Eneman, G.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Franco, J.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Ivanov, Ts.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Lin, D.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Loo, R.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Merckling, C.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Mitard, J.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Pourghaderi, M. A.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Rooyackers, R.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Sioncke, S.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Sun, J. W.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Vandooren, A.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Veloso, A.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Verhulst, A.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Waldron, N.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Witters, L.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Zhou, D.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Barla, K.
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Thean, A. V. -Y
    Imec, Kapeldreef 75, Heverlee, Belgium.
    Ultimate nano-electronics: New materials and device concepts for scaling nano-electronics beyond the Si roadmap2015Ingår i: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 132, s. 218-225Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Abstract In this work, we will give an overview of the innovations in materials and new device concepts that will be needed to continue Moore’s law to the sub-10 nm technology nodes. To meet the power and performance requirements high mobility materials in combination with new device concepts like tunnel FETs and gate-all-around devices will need to be introduced. As the density is further increased and it becomes increasingly difficult to put contacts, spacers and gate in the available gate pitch, disruptive integration schemes such as vertical transistors and monolithic 3D integration might lead the way to the ultimate scaling of CMOS.

  • 207.
    Comina, German
    et al.
    Linköpings universitet, Institutionen för fysik, kemi och biologi. Linköpings universitet, Tekniska fakulteten.
    Suska, Anke
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Kemiska och optiska sensorsystem. Linköpings universitet, Tekniska fakulteten.
    Filippini, Daniel
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Kemiska och optiska sensorsystem. Linköpings universitet, Tekniska fakulteten.
    3D printed disposable optics and lab-on-a-chip devices for chemical sensing with cell phones2017Ingår i: MICROFLUIDICS, BIOMEMS, AND MEDICAL MICROSYSTEMS XV, SPIE-INT SOC OPTICAL ENGINEERING , 2017, Vol. 10061, artikel-id UNSP 100610EKonferensbidrag (Refereegranskat)
    Abstract [en]

    Digital manufacturing (DM) offers fast prototyping capabilities and great versatility to configure countless architectures at affordable development costs. Autonomous lab-on-a-chip (LOC) devices, conceived as only disposable accessory to interface chemical sensing to cell phones, require specific features that can be achieved using DM techniques. Here we describe stereo-lithography 3D printing (SLA) of optical components and unibody-LOC (ULOC) devices using consumer grade printers. ULOC devices integrate actuation in the form of check-valves and finger pumps, as well as the calibration range required for quantitative detection. Coupling to phone camera readout depends on the detection approach, and includes different types of optical components. Optical surfaces can be locally configured with a simple polishing-free post-processing step, and the representative costs are 0.5 US$/device, same as ULOC devices, both involving fabrication times of about 20 min.

  • 208.
    Cronborn, Jesper
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Automatization of test rig for microwave ovens2013Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    The thesis work is a part of a project where the major goal is to improve the efficiency of the evaluations of microwave ovens at Whirlpool Sweden AB. The purpose of the work has been to develop an automatic control and measurement system for microwave ovens. In an earlier thesis work, a test rig has been developed and this test rig has been further developed to an autonomous system. The software for this system is developed in LabVIEW and interfaces to some measuring instruments has been implemented for the system. As a plan for the programming work, UML-diagrams were created in Visual Paradigm To make it easy for the user to handle the system, a user interface has been created in LabVIEW. The system handles different XML-files: oven profiles and test profiles, which are defined by the user. An oven profile contains coordinates for specific positions at the front of a microwave oven, e.g. button positions and corners. There will be one oven profile per oven model. A test profile contains different stages with position names, operations and time delays. The position names are the names of the positions defined in the oven profile. The results from a measurement will be saved in a CSV-file.

    Ladda ner fulltext (pdf)
    fulltext
  • 209.
    Cui, Yong
    et al.
    Chinese Acad Sci, Peoples R China; Univ Chinese Acad Sci, Peoples R China.
    Wang, Yuming
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Bergqvist, Jonas
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Yao, Huifeng
    Chinese Acad Sci, Peoples R China.
    Xu, Ye
    Univ Chinese Acad Sci, Peoples R China.
    Gao, Bowei
    Univ Chinese Acad Sci, Peoples R China.
    Yang, Chenyi
    Univ Sci and Technol Beijing, Peoples R China.
    Zhang, Shaoqing
    Univ Sci and Technol Beijing, Peoples R China.
    Inganäs, Olle
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Gao, Feng
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Biomolekylär och Organisk Elektronik. Linköpings universitet, Tekniska fakulteten.
    Hou, Jianhui
    Chinese Acad Sci, Peoples R China; Univ Chinese Acad Sci, Peoples R China; Univ Sci and Technol Beijing, Peoples R China.
    Wide-gap non-fullerene acceptor enabling high-performance organic photovoltaic cells for indoor applications2019Ingår i: NATURE ENERGY, ISSN 2058-7546, Vol. 4, nr 9, s. 768-775Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Organic photovoltaic cells are potential candidates to drive low power consumption off-grid electronics for indoor applications. However, their power conversion efficiency is still limited by relatively large losses in the open-circuit voltage and a non-optimal absorption spectrum for indoor illumination. Here, we carefully designed a non-fullerene acceptor named IO-4CI and blend it with a polymer donor named PBDB-TF to obtain a photoactive layer whose absorption spectrum matches that of indoor light sources. The photovoltaic characterizations reveal a low energy loss below 0.60 eV. As a result, the organic photovoltaic cell (1 cm(2)) shows a power conversion efficiency of 26.1% with an open-circuit voltage of 1.10 V under a light-emitting diode illumination of 1,000 lux (2,700 K). We also fabricated a large-area cell (4 cm(2)) through the blade-coating method. Our cell shows an excellent stability, maintaining its initial photovoltaic performance under continuous illumination of the indoor light source for 1,000 hours.

  • 210.
    Dabrowski, Jerzy
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Fast BER Test for Digital RF Transceivers2009Ingår i: 14th IEEE European Test Symposium, Sevilla, Spain, May 25-29, 2009Konferensbidrag (Refereegranskat)
    Abstract [en]

    The paper presents a fast bit-error-rate (BER) test suitable for digital receivers or transceivers. The test technique makes use of an elevated BER which can be achieved by geometrical translation of the signal constellation points on the IQ plane. As the elevated BER requires much less bits (or symbols) to be measured, significant savings in the test time can be anticipated. Also a maximum sensitivity to impairments in the noise factor is obtained in this way. To develop an effective elevated-BER test for a device in mass production a careful characterization procedure must be carried out, followed by a fine tuning procedure aimed at improving the test resolution and thereby the test coverage. The technique is supported by a simple statistical model and illustrated by a simulation example of a 4QAM receiver.

    Ladda ner fulltext (pdf)
    Fast BER Test for Digital RF Transceivers
  • 211.
    Dacheng, Chen
    Linköpings universitet, Institutionen för systemteknik.
    VHDL Implementation of a Fast Adder Tree2005Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    This thesis discusses the design and implementation of a VHDL generator for Wallace tree with (3:2) counter modules and (2:2) counter modules to solve fast addition problem.

    The basic research has been carried out by MATLAB programming environment and automatic generation of VHDL file based on the result obtained from MATLAB simulation. MODELSIM has been used for compilation and simulation of the VHDL file.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 212.
    Dagne, Carl
    Linköpings universitet, Institutionen för systemteknik.
    Implementering av tillståndsmaskiner med PRBS2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [sv]

    Tillståndsmaskiner är vanliga komponenter i många digitala konstruktioner. En vanlig typ av tillståndsmaskin är räknare. Räknare är ofta ganska kostsamma att implementera, med avseende på antalet grindar. För att reducera denna kostnad kan istället en PRBS (Pseudo Random Binary Sequence) användas. Denna byggs upp av ett register där en xor - operation utförs mellan två positioner, som beror på längden av registret. Resultatet från denna operation skiftas sedan in i registret. På detta sätt fås en till synes slumpmässig sekvens. Talen är dock inte på något sätt slumpmässiga utan kan hela tiden förutsägas. I detta examensarbete har en undersökning för att konstruera en billig tillståndsmaskin med hjälp av PRBS:er gjorts i MatLab. Tre olika program har skrivits för att beräkna olika kostnader vid implementering av en tillståndsmaskin.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 213.
    Dahl, Emil
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System.
    MOSFET Packaging for Low Voltage DC/DC Converter: Comparing embedded PCB packaging to newly developed packaging2020Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    This thesis studies the options of using PCB embedding bare die power MOSFET and new packaging of MOSFET to increase the power density in a PCB. This is to decrease the winding losses in an isolated DC/DC converter which, according to "Flex Power Modules", can be done by improving the interleaving between the layers of the transformer and/or decreasing the AC loop. To test the MOSFET packaging two layout are made from a reference PCB, one using embedded MOSFET and the other using the new packaging. The leakage induction and winding losses are simulated and if they are lower compared to the reference PCB prototypes are manufactured. The simulated result is that PCB embedded MOSFET decrease the leakage induction but the winding loss is higher. With the new packaging the leakage induction is higher and the winding loss has linear characteristics. Only the PCB with the new MOSFET packaging is made because the MOSFET die gate pad is too small for the PCB manufacturer to make a via connection to it. The PCB is tested that it operates as a DC/DC converter with a 40-60 V input and a 12 V output. The PCB is put on a test board in a wind-tunnel to test its characteristics under different wind speeds, input voltage and loads. The result is that the PCB has a higher efficiency than the reference PCB but it has worse thermal resistance. Further development of the design needs to be made to improve the thermal resistance. Using new packaging is a way to continue the development of power converter with lower efficiency but embedding MOSFET needs a less complicated manufacturing process before there is any widespread usage.

    Ladda ner fulltext (pdf)
    fulltext
  • 214.
    Dahlbäck, Magnus
    Linköpings universitet, Institutionen för systemteknik.
    Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    Today's radio frequency receivers for digital wireless communication are getting more and more complex. A single receiver unit should support multiple bands, have a wide bandwidth, be flexible and show good performance. To fulfil these requirements, new receiver architectures have to be developed and used. One possible alternative is the RF undersampling architecture.

    This thesis evaluates the RF undersampling architecture, which make use of an undersampling track-and-hold circuit with very wide bandwidth to perform direct sampling of the RF carrier before the analogue-to-digital converter. The architecture’s main advantages and drawbacks are identified and analyzed. Also, techniques and improvements to solve or reduce the main problems of the RF undersampling receiver are proposed.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 215.
    Dahlqvist, Michael
    et al.
    Linköpings universitet, Institutionen för systemteknik.
    Röst, Andreas
    Linköpings universitet, Institutionen för systemteknik.
    Modulgenerator för generering av Brent Kung-adderare2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [sv]

    För att snabba upp addering av tal, vilket är en vital del inom signalbehandling finns olika algoritmer. En sådan algoritm är Brent Kungs vilken har en tidsfördröjning proportionell mot log2(N).

    I rapporten jämförs några olika varianter av adderare med avseende på grinddjup, vilket är proportionelltmot propageringstiden. En modulgenerator för Brent Kung-adderare implementeras med Skill-kod i Cadence. Modulgeneratorn kan genera adderare av obegränsad ordlängd och är även teknologi oberoende. Brent Kung-adderarens fysiska begränsningar studeras och förslag ges på lämpliga förbättringar.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 216.
    Dahlström, Patrik
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Geo-based Mobility Control for Mobile Traffic Simulators2013Självständigt arbete på avancerad nivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Most mobile traffic simulators of today depend on the user to supply the mobility behavior of the simulated UEs. This becomes a problem when certain wanted mobility characteristics are to be tested, since the user have to go trough a trial-and-error procedure to come up with the proper mobility behavior. This thesis presents two approaches to mobility control, where the aim is to control UE mobility based on certain mobility characteristics supplied by the end user.

    The first approach introduces the concept of assigning tasks to UEs, e.g. “cross cell border” or “move to a certain cell”. Furthermore, concepts from control theory are borrowed to control the task assignment process, making it more dynamic and robust.

    The second approach iteratively calculate movement patterns for the UEs in an area until it finds a movement pattern that has a high probability of satisfying the user’s requested mobility characteristics.

    In order to properly evaluate these two approaches a prototype simulator was developed, as well as a virtual network controller to be tested. This test environment simulate a simplified tree network topology.

    Both approaches was tested to control the total number of handovers per second in a simulated area. They both show high accuracy and acceptable precision. Additionally, the task based approach was used to control the cell utilization in a target cell. However, the cell utilization tests showed a lower accuracy and precision than the handover rate control tests.

    Ladda ner fulltext (pdf)
    fulltext
  • 217.
    Dahm, Rickard
    Linköpings universitet, Institutionen för teknik och naturvetenskap, Fysik och elektroteknik. Linköpings universitet, Tekniska högskolan.
    Autotuning of RPM controller2013Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Under detta projekt som utfördes på Scania CV AB undersöktes möjligheten att använda sig av en adaptiv regulator för att reglera motorvarvtalet på en lastbilsmotor som driver utrustning via ett kraftuttag. Fördelen med att använda sig av adaptiv reglering istället för den parameterstyrda PID reglering som används idag är att regulatorn kan klara av fler utrustningstyper. Dagens regulator kan få problem vid stora belastningsmoment eller tröghetsmoment. Detta kan lösas med adaptiv reglering.

    I rapporten presenteras en modellbaserad regulator som använder systemets tröghetsmoment. Då systemets tröghetsmoment är okänt ges även förslag på hur detta skulle kunna estimeras. Den modellbaserade regulatorn visar sig vara mycket effektiv då skattningen av tröghetsmomentet lyckas. Det Kalmanfilter som designats för att estimera systemet fungerar dock ej för alla önskvärda fall och en fortsatt studie på hur denna design ska se ut krävs innan regulatorn testas på ett verkligt system.

    Ladda ner fulltext (pdf)
    fulltext
  • 218.
    Dai, Jianxing
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System.
    Analysis and Design of a High-Frequency RC Oscillator Suitable for Mass Production2017Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    Oscillators are components providing clock signals. They are widely required by low-cost on-chip applications, such as biometric sensors and SoCs. As part of a sensor, a relaxation oscillator is implemented to provide a clock reference. Limited by the sensor application, a clock reference outside the sensor is not desired. An RC implementation of the oscillator has a balanced accuracy performance with low-cost advantage. Hence an RC relaxation oscillator is chosen to provide the clock inside the sensor.

    This thesis proposes a current mode relaxation oscillator to achieve low frequency standard deviation across different supplies, temperatures and process corners. A comparison between a given relaxation oscillator and the proposed design is made as well. All oscillators in this thesis use 0.18 μm technology and 1.8 V nominal supply. The proposed oscillator manages to achieve a frequency standard deviation across all PVT variations less than ±6.5% at 78.4 MHz output frequency with a power dissipation of 461.2 μW. The layout of the oscillator's core area takes up 0.003 mm2.

    Ladda ner fulltext (pdf)
    fulltext
  • 219.
    Danielsson, M.
    et al.
    Royal Institute of Technology, AlbaNova University Center.
    Bornefalk, H.
    Royal Institute of Technology, AlbaNova University Center.
    Svensson, Christer
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter.
    Improving image quality in photon counting-mode detector systems2012Patent (Övrig (populärvetenskap, debatt, mm))
  • 220.
    Danielsson, Per-Erik
    Linköpings universitet, Institutionen för systemteknik. Linköpings universitet, Tekniska högskolan.
    Implementations of the Convolution Operation1982Rapport (Övrigt vetenskapligt)
    Abstract [en]

    The first part of this article surveys a large number of implementations of the convolution operation (which is also known as the sum-of-products, the inner product) based on a systematic exploration of index permutations. First we assume a limited amount of parallelism in the form of an adder. Next, multipliers and RAM:s are utilized. The so called distributed arithmetic follows naturally from this approach.

    The second part brings in the concept of pipelining on the bitlevel to obtain high throughput convolvers adapted for VLSI-design (systolic arrays). The serial/parallel multiplier is analyzed in a way that unravels a vast amount new variations. Even more interesting, all these new variations can be carried over to serial/parallel convolvers. These novel devices can be implemented as linear structures of identical cells where the multipliers are embedded at equidistant intervals.

    Ladda ner fulltext (pdf)
    Implementations of the Convolution Operation
  • 221.
    Debela, Ahmed M.
    et al.
    UPMC Univ Paris 06, France.
    Ortiz, Mayreli
    Univ Rovira and Virgili, Spain.
    Beni, Valerio
    Linköpings universitet, Institutionen för teknik och naturvetenskap. Linköpings universitet, Tekniska fakulteten. Res Inst Sweden, Sweden.
    Lesage, Denis
    UPMC Univ Paris 06, France.
    Cole, Richard
    UPMC Univ Paris 06, France.
    OSullivan, Ciara K.
    Univ Rovira and Virgili, Spain; Inst Catalana Recerca and Estudis Avancats, Spain.
    Thorimbert, Serge
    UPMC Univ Paris 06, France.
    Hasenknopf, Bernold
    UPMC Univ Paris 06, France.
    Functionalized Deoxynucleotides and DNA Primers for Electrochemical Diagnostics of Disease Predispostions2017Ingår i: SELECTED PROCEEDINGS FROM THE 231ST ECS MEETING, ELECTROCHEMICAL SOC INC , 2017, Vol. 77, nr 11, s. 1873-1883Konferensbidrag (Refereegranskat)
    Abstract [en]

    Redox labeled DNAs are of increasing interest for the fabrication of next generation molecular tools. In the present work we are investigating the use of various redox labeled dNTPs, ddNTPs and DNA primers for use in detection of diseases. We have reported the use of Polyoxometalate (POM) labeled DNA primers and dNTPs for use in PCR and subsequently used for direct electrochemical detection of PCR products. The use of POM labeled DNAs in PCR enabled us to check the compatibility with polymerases and PCR incorporability of the modified DNAs. Furthermore we have investigated the solid-phase array based primer extension (e-PEX) with redox labelled ddNTPs (ferrocene (Fc), anthraquinone (AQ) phenothiazine (PTZ) and methylene blue (MB)) to prove the strategy of detection of single nucleotide polymorphisms using the labeled ddNTPs. This strategy will allow the development of cost-effective, rapid and user-friendly platform for the screening of known and unknown genetic mutations.

  • 222.
    Dell'Amico, Alessandro
    et al.
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Fluida och mekatroniska system. Linköpings universitet, Tekniska högskolan.
    Krus, Petter
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Fluida och mekatroniska system. Linköpings universitet, Tekniska högskolan.
    Modeling, Simulation, and Experimental Investigation of an Electrohydraulic Closed-Center Power Steering System2015Ingår i: IEEE/ASME transactions on mechatronics, ISSN 1083-4435, E-ISSN 1941-014X, Vol. 20, nr 5, s. 2452-2462Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    In steering-related active safety systems, active steering is a key component. Active steering refers to the possibility to control the road wheel angle or the required torque to turn the wheels by means of an electronic signal. Due to the high axle loads in heavy vehicles, hydraulic power is needed to assist the driver in turning the wheels. One solution to realize active steering is, then, to use electronically controlled valves that are of closed-center type. This means that the assistance pressure, or force, can  be set to any feasible value and still benefit from the high power density of fluid power systems. A closed-center solution also implies that a significant reduction in fuel consumption is possible. This paper investigates such an electrohydraulic power steering system, and a comparison with the original system is also made. The findings have shown that while a high response of the pressure control loop is desired for a good steering feel, instability might occur at higher steering wheel torque levels. This has effectively been shown and explained by simulation and hardware-in-the-loop simulation, together with linear analysis. For any desired boost curve, the response of the pressure control loop must be designed to preserve stability over the entire working range.

    Ladda ner fulltext (pdf)
    fulltext
  • 223.
    Dheilly, Nicolas
    et al.
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Planson, Dominique
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Brosselard, Pierre
    Centro Nacional de Microelectrónica, Campus UAB, Bellaterra, Spain.
    Hassan, Jawad
    Linköpings universitet, Institutionen för fysik, kemi och biologi, Halvledarmaterial. Linköpings universitet, Tekniska fakulteten.
    Bevilacqua, Pascal
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Tournier, Dominique
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Montserrat, Josep
    Centro Nacional de Microelectrónica, Campus UAB, Bellaterra, Spain.
    Raynaud, Christophe
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Morel, Hervé
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Measurement of Carrier Lifetime Temperature Dependence in 3.3kV 4H-SiC PiN Diodes Using OCVD Technique2009Ingår i: Silicon Carbide and Related Materials 2008, Trans Tech Publications Ltd , 2009, Vol. 615, s. 703-706Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper reports on the influence of temperature on the electrical carrier lifetime of a 3.3 kV 4H-SiC PiN diode processed with a new generation of SiC material. The Open Circuit Voltage Decay (OCVD) is used to evaluate ambipolar lifetime evolution versus temperature. The paper presents a description of the setup, electrical measurements and extraction fittings. The ambipolar lifetime is found to rise from 600 ns at 30 °C to 3.5 μs at 150 °C.

  • 224.
    Di Orio, Giovanni
    et al.
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Rocha, Andre
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Ribeiro, Luis
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Industriell Produktion. Linköpings universitet, Tekniska fakulteten.
    Barata, Jose
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    The PRIME Semantic Language: Plug and Produce in Standard- based Manufacturing Production Systems2015Ingår i: Proceedings of the Flexible Automation and Intelligent Manufacturing Conference, 2015Konferensbidrag (Övrigt vetenskapligt)
    Abstract [en]

    Nowadays manufacturing production systems are becoming more and more responsive in order to succeed in ahighly unstable environment. The capability of a production system to effectively and efficiently adapt and evolveto face the changing requirements – imposed by volatile and dynamic global markets – is a necessary conditionto enable manufacturing enterprises to be agile. Since the agility of a manufacturing enterprise is always limitedby the agility of its own building blocks than it needs to be spread over the whole enterprise including the operationand information technologies (OT/IT). Turning to production systems, one of the significant challenges isrepresented by the possibility to provide easy and rapid (re-)configuration of their internal components and/orprocesses. Innovative technologies and paradigms have been explored during the years that combined with theincreasing advancement in manufacturing technologies enable the implementation of the “plug and produce”paradigm. The “plug and produce” paradigm is the foundation of any agile production system, since to be agile itis inevitably required to reduce the installation and (re-)engineering activities time – changing/adapting the systemto new requirements – while promoting configuration rather than programming. Therefore, the “plug andproduce” paradigm is a necessary but not sufficient condition for implementing agile production systems. Modernproduction systems are typically known for their plethora of heterogeneous component/equipment. In this complexscenario, the implementation of the “plug and produce” paradigm implies the existence of a well-definedontological model to support components/equipment abstraction with the objective to allow interactions,collaboration and knowledge sharing between them. The PRIME semantic language specifies the semanticstructure for the knowledge models and overall system communication language.

  • 225.
    Dida, Bashkim
    Linköpings universitet, Institutionen för systemteknik.
    Automatiserad konstruktion av analoga förstärkare2005Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    The last few decades the development in the field of electronics has been huge. The components performance gets better at the same time as the manufacturing cost decreases. Many of the design moments that have to be done, are done automatically today, but it can get better. Especially for analog circuit design.

    At Electronic System in Linköpings universitet, research is in progress to develop a tool that can design analog circuits in reasonable time. It means that it has to size the components (transistors, resistances, capacitances etc), so that the circuit can fulfill the performance requirements. An optimization method in conjunction with derived equations for the circuit performance is used to solve this task. The tool is created to design e.g. analog amplifiers. The goal is to decrease the design time and at the same time achieve better circuit performance.

    This tool has been tested on three different circuits, a power-amplifier, a Nested Miller Compensated amplifier with an active feedback (Active Nested Miller Compensation) and a Nested Miller Compensated amplifier without an active feedback (Nested Miller Compensation). In this report the results from the designing tests are presented.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 226.
    Disqah, Arash
    et al.
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Maheri, Alireza
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Busawon, Krishna
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Fritzson, Peter
    Linköpings universitet, Institutionen för datavetenskap, Programvara och system. Linköpings universitet, Tekniska högskolan.
    Standalone DC Microgrids as Complementarity Dynamical Systems: Modeling and Applications.2015Ingår i: Control Engineering Practice, ISSN 0967-0661, Vol. 35, nr 10, s. 102-112Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    It is well known that, due to bimodal operation as well as existent discontinuous differential states of batteries, standalone microgrids belong to the class of hybrid dynamical systems of non-Filippov type. In this work, however, standalone microgrids are presented as complementarity systems (CSs) of the Filippov type which is then used to develop a multivariable nonlinear model predictive control (NMPC)-based load tracking strategy as well as Modelica models for long-term simulation purposes. The developed load tracker strategy is a multi-source maximum power point tracker (MPPT) that also regulates the DC bus voltage at its nominal value with the maximum of ±2.0% error despite substantial demand and supply variations.

  • 227.
    Doelman, Reinier
    et al.
    Delft Univ Technol, Netherlands.
    Klingspor, Måns
    Linköpings universitet, Institutionen för systemteknik, Reglerteknik. Linköpings universitet, Tekniska fakulteten.
    Hansson, Anders
    Linköpings universitet, Institutionen för systemteknik, Reglerteknik. Linköpings universitet, Tekniska fakulteten.
    Löfberg, Johan
    Linköpings universitet, Institutionen för systemteknik, Reglerteknik. Linköpings universitet, Tekniska fakulteten.
    Verhaegen, Michel
    Delft Univ Technol, Netherlands.
    Identification of the dynamics of time-varying phase aberrations from time histories of the point-spread function2019Ingår i: Optical Society of America. Journal A: Optics, Image Science, and Vision, ISSN 1084-7529, E-ISSN 1520-8532, Vol. 36, nr 5, s. 809-817Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    To optimally compensate for time-varying phase aberrations with adaptive optics, a model of the dynamics of the aberrations is required to predict the phase aberration at the next time step. We model the time-varying behavior of a phase aberration, expressed in Zernike modes, by assuming that the temporal dynamics of the Zernike coefficients can be described by a vector-valued autoregressive (VAR) model. We propose an iterative method based on a convex heuristic for a rank-constrained optimization problem, to jointly estimate the parameters of the VAR model and the Zernike coefficients from a time series of measurements of the point-spread function (PSF) of the optical system. By assuming the phase aberration is small, the relation between aberration and PSF measurements can be approximated by a quadratic function. As such, our method is a blind identification method for linear dynamics in a stochastic Wiener system with a quadratic nonlinearity at the output and a phase retrieval method that uses a time-evolution-model constraint and a single image at every time step. (c) 2019 Optical Society of America.

    Ladda ner fulltext (pdf)
    fulltext
  • 228.
    Doudorov, Grigori
    Linköpings universitet, Institutionen för systemteknik.
    Evaluation of Si-LDMOS transistors for RF Power Amplifier in 2-6 GHz frequency range2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    In this thesis the models of Si-LDMOS transistors have been investigated with Agilent EEsof ADS version 2002a for operation in the 2-6 GHz frequency range. The first one is the Motorola’s (MRF21010) model based on a 30 mm prototype of a Si-LDMOS transistor. The second one is a model based on a 1 mm prototype of Si-LDMOS transistor developed at Chalmers University. Large-signal simulations of Chalmers’ model have demonstrated results, which lead to the conclusion that,this model cannot be efficiently utilised for design for a PA in the 2-6 GHz frequency range. However, additional simulations with reduced Rd (drain losses) show the deep impact of this parameter on the main properties of the designed PA. Hence, it is important to take it into account during new processes of Si-LDMOS as well as to improve the CAD model. The final conclusion regarding Si-LDMOS cannot be made just based on these simulation results, since they are not in accordance with the published ones. The next step should be aimed at improving the model and further investigation of Si-LDMOS to prove their ability to operate in the 2-6 GHz frequency range.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 229.
    Drougge, Max
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Fluida och mekatroniska system.
    Spårning av rotorblad på UAV2016Självständigt arbete på grundnivå (kandidatexamen), 10,5 poäng / 16 hpStudentuppsats (Examensarbete)
    Abstract [sv]

    Arbetet gick ut på att utvärdera befintliga spårningsmetoder, utforma en procedur för spårning, ge förslag på lämplig utrustning och om tid fanns, testa konceptet. Arbetet skulle också dokumenteras så att krav, design och beslut kan förstås av någon som inte varit delaktig i arbetet. För att minska vibrationerna i UAV behöver rotorbladen spåras, det vill säga, rotorbladen ska befinna sig på samma höjd vid samma position i rotationen. Om spårningen inte är korrekt kan detta leda till oönskade vibrationer som kan vara farliga för UAV:er. I dagsläget används en metod som är väldigt tidskrävande. Metoden har heller inte speciellt god precision i mätningarna. För att komma fram med en ny spårningsmetod jämfördes olika metoder som används idag. Vilka krav som fanns på metoden, även kostnad och tid togs med vid utformandet. Spårningsmetoden som tagits fram innefattar en avståndsmätare som använder sig av ljus. Mätning sker på respektive rotorblad, därefter skickas data för behandling till en mikrokontroller. Resultatet blev ett nytt spårningskoncept med stor potential. Med mer utvecklingsarbete och testning skulle det kunna bli en egen produkt som kan till exepel säljas tillsammans med UAV eller helt separat. Examensarbetet har utförts hos företaget CybAero AB.

    Ladda ner fulltext (pdf)
    fulltext
  • 230.
    Dubois, Tobias
    Linköpings universitet, Institutionen för datavetenskap.
    Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO2007Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    NXP Semiconductors (formerly Philips Semiconductors) has created a new embedded asynchronous FIFO module. It is a small and fast full-custom design with Design-for-Test (DfT) functionality. The fault detection qualities of a proposed manufacturing test for this FIFO have been analyzed by a defect-based method based on analog simulation. Resistive bridges and opens of different sizes in the bit-cell matrix and in the asynchronous control have been investigated.

    The fault coverage for bridge defects in the bit-cell matrix of the initial FIFO test has been improved by inclusion of an additional data background and low-voltage testing. 100% fault coverage is reached for low resistance bridges. The fault coverage for opens has been improved by a new test procedure including waiting periods.

    98.4% of the hard bridge defects in the asynchronous control slices can be detected with some modifications of the initial test.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 231.
    Duhan, Isac
    Linköpings universitet, Institutionen för systemteknik, Fordonssystem.
    Design of Automated Generation of Residual Generators for Diagnosis  of Dynamic Systems2011Självständigt arbete på avancerad nivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [sv]

    Diagnos och övervakning av tekniska system används för att upptäcka fel när de inträffar. För att ställa en diagnos kan tester baserade på residualer användas. Residualer används för att jämföra observationer av ett system med en model av system för att upptäcka inkonsistens.

    Det finns ofta många typer av fel som påverkar ett systems tillstånd.Dessa tillstånd modelleras med olika felmoder. För varje felmod används olika uppsättningar av modellekvationer för att beskriva systemets beteende. När diagnoser ska ställas i realtid är det ofta bra och ibland avgörande att kunna byta felmod när ett fel plötsligt inträffar i systemet. Om multipelfel kan inträffa blir antalet kombinationer av fel ofta så stort att residualekvationerna för alla felmoder inte kan förberedas. Detta gäller även för relativt små system. För att hantera problemet bör residualerna kunna genereras vid den tidpunkt då de behövs.

    Examensarbetets huvuduppgift handlar om att undersöka hur residualerna kan genereras automatiskt, givet en felmod och en modell. En algoritm har utvecklats och verifierats med en model av ett kraftsystem för en satellit, kallad ADAPT-Lite. Algoritmen har gjorts i två versioner. Den ena tillåts göra algebraiska beräkningar men den andra, i så storutsträckning som möjligt, tillåts endast göra numeriska beräkningar. En numerisk algoritm föredras i en automatiserad process p.g.a. generellt sett kortare beräkningstid och dess egenskap att kunna lösa vissa problem som inte kan lösas algebraiskt. Den algebraiska algoritmen har dock visats sig ge aningen noggrannare resultat i många fall.

    Ladda ner fulltext (pdf)
    thesis_IsacDuhan
  • 232.
    Duman, Yusuf
    Linköpings universitet, Institutionen för systemteknik.
    FIFO-kostruktion baserat på ett enkel-ports SRAM2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [sv]

    Vid implementeringar av FIFO-arkitekturer har asynkrona FIFO-konstruktioner använts. Denna lösningsmetod har visat sig innehålla en del brister vid tillämpning på höghastighets system, vilket ledde till att synkrona FIFOn började ersätta asynkrona FIFOn.

    Den synkrona arkitekturen har samma funktonalitet som de asynkrona typerna med fördelar som högre hastighet och enklare gränssnitt.

    I rapporten har olika FIFO-konstruktioner behandlats och jämförelser har gjorts mellan synkrona och asynkrona arkitekturer. Det vid ISY konstruerade SRAM-minnet har sedan avgjort vilken typ av FIFO-arkitektur som varit bäst lämpad för implementering.

    Det implementerade FIFO-minnet ordnar indata- och utdataflöden till ett enkelports SRAM-minne på 256 ord med 16 bitar per ord.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 233.
    Duong, Quoc Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik. Linköpings universitet, Tekniska fakulteten.
    Qazi, Fahad
    Catena AB, Stockholm, Sweden .
    Dabrowski, Jerzy
    Linköpings universitet, Institutionen för systemteknik. Linköpings universitet, Tekniska fakulteten.
    Analysis and design of low noise transconductance amplifier for selective receiver front-end2015Ingår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 85, nr 2, s. 361-372Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Analysis and design of a low-noise transconductance amplifier (LNTA) aimed at selective current-mode (SAW-less) wideband receiver front-end is presented. The proposed LNTA uses double cross-coupling technique to reduce noise figure (NF), complementary derivative superposition, and resistive feedback to achieve high linearity and enhance input matching. The analysis of both NF and IIP3 using Volterra series is described in detail and verified by SpectreRF (A (R)) circuit simulation showing NF less than 2 dB and IIP3 = 18 dBm at 3 GHz. The amplifier performance is demonstrated in a two-stage highly selective receiver front-end implemented in 65 nm CMOS technology. In measurements the front-end achieves blocker rejection competitive to SAW filters with noise figure 3.2-5.2 dB, out of band IIP3 greater than+17 dBm and blocker P-1dB greater than+5 dBm over frequency range of 0.5-3 GHz.

    Ladda ner fulltext (pdf)
    fulltext
  • 234.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska högskolan.
    Alvandpour, Atila
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska högskolan.
    Low Noise Linear and Wideband Transconductance Amplifier Design for Current-mode Frontend2014Konferensbidrag (Refereegranskat)
    Abstract [en]

    A low-noise transconductance amplifier (LNTA) aimed at current-mode (Saw-less, Software-define radio) wideband receiver frontend is presented. In this application, the LNTA operates with a capacitive load to provide high linearity and sufficient G<;sub>m<;/sub> gain over a wide frequency band. By combination of various circuit techniques the LNTA, which is designed in 65 nm CMOS, achieves in simulation the noise figure in range [1-1.34] dB and linearity of maximum IIP3 = 16.5 dBm over 0.5-6 GHz band. The maximum transconductance G<;sub>m<;/sub> = 12.9 mS, the return loss S11 <; -10 dB while the total power consumption is 4 mW for 1.2 V supply.

  • 235.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska fakulteten.
    Bhide, Ameya
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska fakulteten.
    Alvandpour, Atila
    Linköpings universitet, Institutionen för systemteknik, Elektroniska Kretsar och System. Linköpings universitet, Tekniska fakulteten.
    Design and analysis of high-speed split-segmented switched-capacitor DACs2017Ingår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 92, nr 2, s. 199-217Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    In order to achieve high speed and high resolution for switched-capacitor (SC) digital-to-analog converters (DACs), an architecture of split-segmented SC DAC is proposed. The detailed design considerations of kT/C noise, capacitor mismatch, settling time and simultaneous switching noise are mathematically analyzed and modelled. The design area WCu is defined based on that analysis. It is used not only to identify the maximum speed and resolution but also to find the design point (WCu) for certain speed and resolution of SC DAC topology. The segmentation effects are also considered. An implementation example of this type of DACs is a 12-bit 6-6 split-segmented SC DAC designed in 65 nm CMOS. The linear open-loop output driver utilizing derivation superposition technique for nonlinear cancellation is used to drive off-chip load for the SC array without compromising its performance. The measured results show that the SC DAC achieves a 44 dB spurious free dynamic range within a 1 GHz bandwidth of input signal at 5 GS/s while consuming 50 mW from 1 V digital and 1.2 V analog supplies. The overall performance that was achieved from measurement is poorer than expected due to lower power supply rejection ratio in fabricated chip. This DAC can be used in transmitter baseband for wideband wireless communications.

    Ladda ner fulltext (pdf)
    fulltext
  • 236.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska fakulteten.
    Dabrowski, Jerzy
    Linköpings universitet, Institutionen för systemteknik, Kommunikationssystem. Linköpings universitet, Tekniska fakulteten.
    Alvandpour, Atila
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska fakulteten.
    Highly linear open-loop output driver design for high speed capacitive DACs2013Ingår i: 2013 NORCHIP, 11–12 November, 2013, Vilnius, LITHUANIA, 2013, s. 1-4Konferensbidrag (Refereegranskat)
    Abstract [en]

    Design of a high speed output driver for capacitive digital-to-analog converters (SC DACs) is presented. As the output voltage swing of those DACs is usually greater than 300 mVpp the driver is designed for large signal operation that is a challenge in terms of the DAC linearity. Two non-linearity cancellation techniques are applied to the driver circuit, the derivative superposition (DS) and the resistive source degeneration resulting in HD3 <; -70 dB and HD2 <; -90 dB over the band of 0.5-4 GHz in 65-nm CMOS. For the output swing of 300 mVpp and 1.2 V supply its power consumption is 40 mW. For verification the driver is implemented in a 12-bit pipeline SC DAC. In simulations the complete Nyquist-rate DAC achieves SFDR of 64 dB for signal bandwidth up to 2.2 GHz showing a negligible non-linearity contribution by the designed driver for signal frequencies up to 1.3 GHz and a degradation by 3 dB at 2.2 GHz.

  • 237.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska fakulteten.
    Dabrowski, Jerzy J.
    Linköpings universitet, Institutionen för systemteknik, Kommunikationssystem. Linköpings universitet, Tekniska fakulteten.
    Focused Calibration for Advanced RF Test with Embedded RF Detectors2013Ingår i: European Conference on Circuit Theory and Design (ECCTD), 2013, IEEE , 2013, s. 1-4Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this paper a technique suitable for on-chip IP3/IP2 RF test by embedded RF detectors is presented. A lack of spectral selectivity of the detectors and diverse nonlinearity of the circuit under test (CUT) impose stiff constraints on the respective test measurements for which focused calibration approach and a support by customized models of CUT is necessary. Also cancellation of second-order intermodulation effects produced by the detectors under the two-tone test is required. The test technique is introduced using a polynomial model of the CUT. Simulation example of a practical CMOS LNA under IP3/IP2 RF test with embedded RF detectors is presented showing a good measurement accuracy.

  • 238.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter.
    Dabrowski, Jerzy J.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter.
    On-chip IP3 IP2 RF Advanced Test and Calibration Technique with Embedded RF Detectors2013Konferensbidrag (Övrigt vetenskapligt)
  • 239.
    Duong, Quoc-Tai
    et al.
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Dąbrowski, Jerzy
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Wideband RF Detector Design for High Performance On-Chip Test2012Ingår i: NORCHIP 2012, IEEE , 2012, s. 1-4Konferensbidrag (Refereegranskat)
    Abstract [en]

    A wideband, high dynamic range RF amplitude detector design aimed at on-chip test is presented. Boosting gain and sub-ranging techniques are applied to the detection circuit to increase gain over the full range of input amplitudes without compromising the input impedance. Followed by a variable gain amplifier (VGA) and a 9-bit A/D converter the RF detector system, designed in 65 nm CMOS, achieves in simulation the minimum detectable signal of -58 dBm and 63 dB dynamic range over 0.5 GHz - 9 GHz band with input impedance larger than 4 kΩ. The detector is intended for on-chip calibration and the attained specifications put it among the reported state-of-the-art solutions.

  • 240.
    Ebrahimi Mehr, Golnaz
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Design of a Rom-Less Direct Digital Frequency Synthesizer in 65nm CMOS Technology2013Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    A 4 bit, Rom-Less Direct Digital Frequency Synthesizer (DDFS) is designed in 65nm CMOS technology. Interleaving with Return-to-Zero (RTZ) technique is used to increase the output bandwidth and synthesized frequencies. The performance of the designed synthesizer is evaluated using Cadence Virtuoso design tool. With 3.2 GHz sampling frequency, the DDFS achieves the spurious-free dynamic range (SFDR) of 60 dB to 58 dB for synthesized frequencies between 200 MHz to 1.6 GHz. With 6.4 GHz sampling frequency, the synthesizer achieves the SFDR of 46 dB to 40 dB for synthesized frequencies between 400 MHz to 3.2 GHz. The power consumption is 80 mW for the designed mixed-signal blocks.

    Ladda ner fulltext (pdf)
    fulltext
  • 241.
    Edbom, Emil
    et al.
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Henriksson, Henrik
    Linköpings universitet, Institutionen för teknik och naturvetenskap.
    Design comparison between HiperLAN/2 and IEEE802.11a services2001Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    This paper is a study and comparison between the two Wireless LAN (WLAN) standards HiperLAN/2 and IEEE 802.11a. WLANs are used instead or together with ordinary LANs to increase mobility in for example an office. HiperLAN/2 is an European standard developed by ETSI and the IEEEs standard is American.

    A WLAN-card consists roughly of a Medium Access Control (MAC), Physichal layer (PHY) and an antenna. The antenna is the same for the different standards.

    Both standards operates at 5.4 GHz with a maximum transmission rate at 54 Mbit/s and they use OFDM to modulate the signal. This means that the physical layer in the two standards is similar.

    The differences between the standards are in the Medium Access Control (MAC) layer. HiperLAN/2 has a much more complex MAC since it is developed with the starting point in cellular phones. Therefore this MAC is not very similar to ETHERNET that is the protocol used by regular network. On the other hand it is built to be compatible with cellular phones and other applications.

    The 802.11a MAC is very much the same as in the 802.11b standard that is the most used standard at present. The difference is that 802.11a can send at much higher data rates. This MAC is build with starting point in ETHERNET so it has a similar interface to the computer. This makes it less complex.

    The different MACs can provide different services. The greatest difference is that 802.11a can use a distributed send mode where any STA can send if the medium is idle. This reminds a lot of ETHERNET but they use different methods to sense if the medium is idle. In HiperLAN/2 are all transmissions scheduled by the AP. 802.11a can operate in a similar way but at the moment this mode is not as fully developed as in HiperLAN/2. There are working groups in IEEE that works toward an improvement of 802.11a so it can use queues with different priorities, this is already implemented in HiperLAN/2.

    Another important issue in wireless environment is security. Both standards use encryption to protect their messages. The difference is that HiperLAN/2 changes their encryption key for every connection where 802.11a uses the same key the whole time. This gives HiperLAN/2 a better security with todays standard but thereare working groups dealing with implementing key-exchange functions and Kerberos use in 802.11a. Chapter 8 is a description of a program that we developed in C++. The program is used to monitor the different registers and ports a WLAN-card use. It is written for a 802.11b card and should be used together with Windows 2000. The source code can be found in appendix C.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 242.
    Edhammer, Jens
    Linköpings universitet, Institutionen för systemteknik, Informationskodning.
    Rigid Body Physics for Synthetic Data Generation2016Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    For synthetic data generation with concave collision objects, two physics simu- lations techniques are investigated; convex decomposition of mesh models for globally concave collision results, used with the physics simulation library Bullet, and a GPU implemented rigid body solver using spherical decomposition and impulse based physics with a spatial sorting-based collision detection.

    Using the GPU solution for rigid body physics suggested in the thesis scenes con- taining large amounts of bodies results in a rigid body simulation up to 2 times faster than Bullet 2.83. 

    Ladda ner fulltext (pdf)
    fulltext
  • 243.
    Edman, Anders
    et al.
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Svensson, Christer
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Mesgarzadeh, Behzad
    Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
    Synchronous Latency-Insensitive Design for Multiple Clock Domain2005Ingår i: Proceedings of the IEEE International System-on-Chip Conference (SoCC), IEEE Explore , 2005, s. 83-86Konferensbidrag (Refereegranskat)
    Abstract [en]

    Modern system-on-chip designs often require multiple clock frequencies. On the other hand, global interconnects suffer large delays. This paper proposes a method that manages these two problems within the framework of conventional synchronous design flow. The design is partitioned into isochronous blocks already at behavioral level, where each block is synchronous using a local clock. The local clock frequencies are assumed related by rational numbers. Communication between blocks is managed with FIFOs at each receiver, which manage different clock frequencies and hide unknown delays or clock skews. This method guarantees clock true implementation of a clock true behavioral description utilizing a predefined block-to-block latency.

  • 244.
    Eek, Magnus
    et al.
    Saab Aeronaut, Aircraft Vehicle Syst, Modeling and Simulat, SE-58188 Linkoping, Sweden.
    Hallqvist, Robert
    Saab Aeronaut, Aircraft Vehicle Syst, Modeling and Simulat, SE-58188 Linkoping, Sweden.
    Gavel, Hampus
    Saab Aeronaut, Aeronaut Engn and Weapons, SE-58188 Linkoping, Sweden.
    Ölvander, Johan
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Maskinkonstruktion. Linköpings universitet, Tekniska fakulteten.
    A Concept for Credibility Assessment of Aircraft System Simulators2016Ingår i: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, ISSN 1940-3151, Vol. 13, nr 6, s. 219-233Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    An efficient methodology for verification, validation, and credibility assessment of simulation models and simulator applications is an enabler for the aeronautical industrys increasing reliance on modeling and simulation in system design and verification and on training. As a complement to traditional document-centric approaches, this paper presents a method for credibility assessment of simulator applications, in which credibility information is presented to end users directly during simulation. The central idea is that each model in a simulator is extended with a metamodel describing different aspects of credibility. The metamodel includes a number of static credibility measures and a dynamic measure that may vary during simulation. The concept is implemented and tested in two system simulators for the Saab Gripen fighter aircraft. According to the evaluation, the concept facilitates an intuitive overview of model dependencies, as well as credibility information for individual models and for a simulator as a whole. This implies a support for detecting test plan deficiencies or that a simulator configuration is not a suitable platform for the execution of a particular test. Furthermore, model developers and end users are encouraged to reflect upon central credibility aspects like intended use, model fidelity, and test worthiness in their daily work.

  • 245. Beställ onlineKöp publikationen >>
    Eghbali, Amir
    Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
    Contributions to Flexible Multirate Digital Signal Processing Structures2009Licentiatavhandling, monografi (Övrigt vetenskapligt)
    Abstract [en]

    A current focus among communication engineers is to design flexible radio systems in order to handle services among different telecommunication standards. Efficient support of dynamic interactive communication systems requires flexible and cost-efficient radio systems. Thus, low-cost multimode terminals will be crucial building blocks for future generations of multimode communication systems. Here, different bandwidths, from different telecommunication standards, must be supported and, thus, there is a need for a system which can handle a number of different bandwidths. This can be done using multimode transmultiplexers (TMUXs) which make it possible for different users to share a common channel in a time-varying manner. These TMUXs allow bandwidth-on-demand so that the resulting communication system has a dynamic allocation of bandwidth to users. Each user occupies a specific portion of the channel where the location and width of this portion may vary with time.

    Another focus among communication engineers is to provide various wideband services accessible to everybody everywhere. Here, satellites with high-gain spot beam antennas, on-board signal processing, and switching will be a major complementary part of future digital communication systems. Satellites provide a global coverage and if a satellite is in orbit, customers only need to install a satellite terminal and subscribe to the service. Efficient utilization of the available limited frequency spectrum, by these satellites, calls for on-board signal processing to perform flexible frequency-band reallocation (FFBR).

    Considering these two focuses in one integrated system where the TMUXs operate on-ground and FFBR networks operate on-board, one can conclude that successful design of dynamic communication systems requires high levels of flexibility in digital signal processing structures. In other words, there is a need for flexible digital signal processing structures that can support different telecommunication scenarios and standards. This flexibility (or reconfigurability) must not impose restrictions on the hardware and, ideally, it must come at the expense of simple software modifications. In other words, the system is based on a hardware platform and its parameters can easily be modified without the need for hardware changes.

    This thesis aims to outline flexible TMUX and FFBR structures which can allow dynamic communication scenarios with simple software reconfigurations on the same hardware platform. In both structures, the system parameters are determined in advance. For these parameters, the required filter design problems are solved only once. Dynamic communications, with users having different time-varying bandwidths, are then supported by adjusting some multipliers of the proposed multimode TMUXs and a simple software programming in the channel switch of the FFBR network. These do not require any hardware changes and can be performed online. However, the filter design problem is solved only once and offline.

    Ladda ner fulltext (pdf)
    Contributions to Flexible Multirate Digital
    Ladda ner (pdf)
    Cover
  • 246.
    Eghbali, Amir
    Linköpings universitet, Institutionen för systemteknik.
    On Filter Bank Based MIMO Frequency Multiplexing and Demultiplexing2006Självständigt arbete på grundnivå (yrkesexamen), 20 poäng / 30 hpStudentuppsats
    Abstract [en]

    The next generation satellite communication networks will provide multimedia services supporting high bit rate, mobility, ATM, and TCP/IP. In these cases, the satellite technology will act as the internetwork infrastructure of future global systems and assuming a global wireless system, no distinctions will exist between terrestrial and satellite communications systems, as well as between fixed and 3G mobile networks. In order for satellites to be successful, they must handle bursty traffic from users and provide services compatible with existing ISDN infrastructure, narrowcasting/multicasting services not offered by terrestrial ISDN, TCP/IP-compatible services for data applications, and point-to-point or point-to-multipoint on-demand compressed video services. This calls for onboard processing payloads capable of frequency multiplexing and demultiplexing and interference suppression.

    This thesis introduces a new class of oversampled complex modulated filter banks capable of providing frequency multiplexing and demultiplexing. Under certain system constraints, the system can handle all possible shifts of different user signals and provide variable bandwidths to users. Furthermore, the aliasing signals are attenuated by the stopband attenuation of the channel filter thus ensuring the approximation of the perfect reconstruction property as close as desired. Study of the system efficient implementation and its mathematical representation shows that the proposed system has superiority over the existing approaches for Bentpipe payloads from the flexibility, complexity, and perfect reconstruction points of view. The system is analyzed in both SISO and MIMO cases. For the MIMO case, two different scenarios for frequency multiplexing and demultiplexing are discussed.

    To verify the results of the mathematical analysis, simulation results for SISO, two scenarios of MIMO, and effects of the finite word length on the system performance are illustrated. Simulation results show that the system can perform frequency multiplexing and demultiplexing and the stopband attenuation of the prototype filter controls the aliasing signals since the filter coefficients resolution plays the major role on the system performance. Hence, the system can approximate perfect reconstruction property by proper choice of resolution.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 247.
    Ehrenstråhle, Carl
    Linköpings universitet, Institutionen för systemteknik, Datorteknik.
    Polynomial Expansion-Based Displacement Calculation on FPGA2016Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [en]

    This thesis implements a system for calculating the displacement between two consecutive video frames. The displacement is calculated using a polynomial expansion-based algorithm. A unit tested bottoms-up approach is successfully used to design and implement the system. The designed and implemented system is thoroughly elaborated upon. The chosen algorithm and its computational details are presented to provide context to the implemented system. Some of the major issues and their impact on the system are discussed.

    Ladda ner fulltext (pdf)
    fulltext
  • 248.
    Eilertsen, Adrian
    Linköpings universitet, Institutionen för systemteknik, Reglerteknik.
    Modellering av reserv- och nödkraftsystem i JAS 39 Gripen2010Självständigt arbete på avancerad nivå (masterexamen), 20 poäng / 30 hpStudentuppsats (Examensarbete)
    Abstract [sv]

    Simulering är ett viktigt verktyg under utveckling av JAS 39 Gripen, eftersom detta möjliggör att både pengar och tid kan sparas.

    Reserv- och nödkraftsystemet Auxiliary and Emergency Power System, AEPS, som är en del av Gripens hjälpkraftsystem, har till uppgift att försörja flygplanet med el- och hydraulkraft före uppstart och efter nedstängning av huvudmotor. Systemet fungerar även som backup vid bortfall av ordinarie kraftförsörjning. Grovt förenklat består systemet av en logisk kontrollenhet och en turbindriven reservväxellåda. På reservväxellådan finns en reservgenerator och en reservhydraulpump för elkraft respektive hydraulkraftförsörjning. Luftflödet till turbinen regleras av en så kallad Air Modulating Valve, AMV.

    Den här rapporten beskriver en ny modell av AEPS. Modellen omfattar den logiska kontrollenheten och en fysikalisk beskrivning av systemets reglerventil, turbin, växellåda, reservgenerator och reservhydraulpump. Den logiska modellen kopplas samman med den fysikaliska och möjliggör simulering av hela systemet. Implementeringen görs i Matlab/Simulink.

    Arbetet leder fram till en komplett modell för AEPS där dynamiska förlopp beskrivs. Verifiering görs genom att jämföra simuleringar med mätningar från det fysiska systemet. Tillfredställande resultat uppnås, speciellt för tryck in till turbin och varvtal för reservgenerator.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 249.
    Ek, Tobias
    Linköpings universitet, Institutionen för systemteknik.
    GALS,Design och simulering för FPGA med VHDL2004Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    Heat, clock scew and frequency optimization are some of the problems a semiconductor designer must face. By splitting a synchrounous block into multiple pieces which comunicates asynchronously with eachother and provide them with independent clocks, these problems may be reduced.

    GALS (Global Asynchronous Local Synchronous) is a wrapper that wraps a synchronous block and provides it with a clock. Multiple GALS-elements will make the whole system. The clockfrequency may be independently adjusted between each block. The clocks may be started and halted independantly depending on the workload.

    Describing the system in a hardware language as VHDL, and implement it into an FPGA (Field Programmable Grid Array), makes the development of applications fast and cheap.

    Ladda ner fulltext (pdf)
    FULLTEXT01
  • 250.
    Ekebrand, Terese
    et al.
    Linköpings universitet, Institutionen för systemteknik.
    Funke, Nils
    Linköpings universitet, Institutionen för systemteknik.
    A Parameterizable Standard Cell Generator2003Självständigt arbete på grundnivå (yrkesexamen)Studentuppsats
    Abstract [en]

    This master thesis describes the creation of a fully parameterizable design tool, intended for automatic generation of standard cell layouts from basic schematic information. The thesis covers general background on programs for automatic layout generation, standard cells and basics in IC design. Algorithms commonly used in various parts of such programs are presented, and the ones used to implement the tool are described in depth.

    Ladda ner fulltext (pdf)
    FULLTEXT01
2345678 201 - 250 av 1022
RefereraExporteraLänk till träfflistan
Permanent länk
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annat format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annat språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf