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  • 301.
    Andersson, Magnus
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Gunnarsson, Svante
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Glad, Torkel
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Norrlöf, Mikael
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    A Simulation and Animation Tool for Studying Multivariable Control2002In: Proceedings of the 15th IFAC World Congress, 2002, p. 1432-1432Conference paper (Refereed)
    Abstract [en]

    A simulation and animation tool for education in multivariable control is presented. The purpose of the tool is to support studies of various aspects of multivariable dynamical systems and design of multivariable feedback control systems. Different ways to use this kind of tool in control education are also presented and discussed.

  • 302.
    Andersson, Magnus
    et al.
    Linköping University, Department of Electrical Engineering.
    Severinson, Kristofer
    Linköping University, Department of Electrical Engineering.
    Hydroakustisk kommunikation med bandspridningsteknik2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This thesis investigates techniques for stealth hydroacoustic communication using spread spectrum. The Swedish naval defense organisations have a vision that all their units should be able to communicate with each other, even between underwater vehicles. But the properties of water makes it a complex channel to use for wireless communications. Radiomagnetic waves have very limited range in water, therefore acoustic waves are used.

    In this report the basics of wireless communication systems are described including source coding, channel coding, modulation techniques as well as different techniques for spread spectrum. The fundamental principle for all spread spectrum systems is to use more bandwidth than necessary to spread the signal energy in the frequency spectrum. This limits the data rate but results in a robust communication link which is difficult to detect, intercept and to jam.

    In addition to the theoretical background, this thesis also gives a brief description of a Matlab system and a VHDL-system that was developed during the project. Finally the results of this project are presented and some suggestions of further developments are given.

  • 303.
    Andersson, Maria
    et al.
    Swedish Defence Research Agency, Sweden.
    Gustafsson, Fredrik
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    St-Laurent, Louis
    INO, Canada.
    Prevost, Donald
    INO, Canada.
    Recognition of Anomalous Motion Patterns in Urban Surveillance2013In: IEEE Journal on Selected Topics in Signal Processing, ISSN 1932-4553, E-ISSN 1941-0484, Vol. 7, no 1, p. 102-110Article in journal (Refereed)
    Abstract [en]

    We investigate the unsupervised K-means clustering and the semi-supervised hidden Markov model (HMM) to automatically detect anomalous motion patterns in groups of people (crowds). Anomalous motion patterns are typically people merging into a dense group, followed by disturbances or threatening situations within the group. The application of K-means clustering and HMM are illustrated with datasets from four surveillance scenarios. The results indicate that by investigating the group of people in a systematic way with different K values, analyze cluster density, cluster quality and changes in cluster shape we can automatically detect anomalous motion patterns. The results correspond well with the events in the datasets. The results also indicate that very accurate detections of the people in the dense group would not be necessary. The clustering and HMM results will be very much the same also with some increased uncertainty in the detections.

  • 304.
    Andersson, Maria
    et al.
    FOI Swedish Defence Research Agency.
    Rydell, Joakim
    FOI Swedish Defence Research Agency.
    Ahlberg, Jörgen
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, Faculty of Science & Engineering. FOI Swedish Defence Research Agency.
    Estimation of crowd behaviour using sensor networks and sensor fusion2009Conference paper (Refereed)
    Abstract [en]

    Commonly, surveillance operators are today monitoring a large number of CCTV screens, trying to solve the complex cognitive tasks of analyzing crowd behavior and detecting threats and other abnormal behavior. Information overload is a rule rather than an exception. Moreover, CCTV footage lacks important indicators revealing certain threats, and can also in other respects be complemented by data from other sensors. This article presents an approach to automatically interpret sensor data and estimate behaviors of groups of people in order to provide the operator with relevant warnings. We use data from distributed heterogeneous sensors (visual cameras and a thermal infrared camera), and process the sensor data using detection algorithms. The extracted features are fed into a hidden Markov model in order to model normal behavior and detect deviations. We also discuss the use of radars for weapon detection.

  • 305.
    Andersson, Markus
    Linköping University, Department of Electrical Engineering, Automatic Control.
    Automatic Tuning of Motion Control System for an Autonomous Underwater Vehicle2019Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The interest for marine research and exploration has increased rapidly during the past decades and autonomous underwater vehicles (AUV) have been found useful in an increased amount of applications. The demand for versatile platform AUVs, able to perform a wide range of tasks, has become apparent. A vital part of an AUV is its motion control system, and an emerging problem for multipurpose AUVs is that the control performance is affected when the vehicle is configured with different payloads for each mission. Instead of having to manually re-tune the control system between missions, a method for automatic tuning of the control system has been developed in this master’s thesis.

    A model-based approach was implemented, where the current vehicle dynamics are identified by performing a sequence of excitation maneuvers, generating informative data. The data is used to estimate model parameters in predetermined model structures, and model-based control design is then used to determine an appropriate tuning of the control system.

    The performance and potential of the suggested approach were evaluated in simulation examples which show that improved control can be obtained by using the developed auto-tuning method. The results are considered to be sufficiently promising to justify implementation and further testing on a real AUV.

    The automatic tuning process is performed prior to a mission and is meant to compensate for dynamic changes introduced between separate missions. However, the AUV dynamics might also change during a mission which requires an adaptive control system. By using the developed automatic tuning process as foundation, the first steps towards an indirect adaptive control approach have been suggested.

    Also, the AUV which was studied in the thesis composed another interesting control problem by being overactuated in yaw control, this because yawing could be achieved by using rudders but also by differential drive of the propellers. As an additional and separate part of the thesis, an approach for using both techniques simultaneously have been proposed.

  • 306.
    Andersson, Martin
    Linköping University, Department of Electrical Engineering.
    Konstruktion av förstärkare och insamplingssteg till en PSAADC i 0.25 um CMOS2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. The main specifications for the voltage reference generator is to generate stable reference voltages with low noise and a good PSRR. Efforts has also been made to minimize the power consumption.

  • 307.
    Andersson, Martin
    Linköping University, Department of Electrical Engineering, Information Coding.
    Parametric Prediction Model for Perceived Voice Quality in Secure VoIP2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    More and more sensitive information is communicated digitally and with thatcomes the demand for security and privacy on the services being used. An accurateQoS metric for these services are of interest both for the customer and theservice provider. This thesis has investigated the impact of different parameterson the perceived voice quality for encrypted VoIP using a PESQ score as referencevalue. Based on this investigation a parametric prediction model has been developedwhich outputs a R-value, comparable to that of the widely used E-modelfrom ITU. This thesis can further be seen as a template for how to construct modelsof other equipments or codecs than those evaluated here since they effect theresult but are hard to parametrise.

    The results of the investigation are consistent with previous studies regarding theimpact of packet loss, the impact of jitter is shown to be significant over 40 ms.The results from three different packetizers are presented which illustrates theneed to take such aspects into consideration when constructing a model to predictvoice quality. The model derived from the investigation performs well withno mean error and a standard deviation of the error of a mere 1:45 R-value unitswhen validated in conditions to be expected in GSM networks. When validatedagainst an emulated 3G network the standard deviation is even lower.v

  • 308.
    Andersson, Martin
    et al.
    FOI, Linköping.
    Elbornsson, Jonas
    Linköping University, Department of Electrical Engineering.
    Eklund, Jan-Erik
    Infineon, Linköping.
    Alvbrant, Joakim
    Infineon, Linköping.
    Fredriksson, Henrik
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
    Verification of a blind mismatch error equalization method for randomly interleaved ADCs using 2.5V/12/30MSs PSAADC.2003In: ESSCIRC 2003,2003, Lissabon: Grafica Maiadouro SA , 2003, p. 473-Conference paper (Refereed)
  • 309.
    Andersson, Mathias
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Image processing algorithms for compensation of spatially variant blur2005Independent thesis Basic level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This report adresses the problem of software correction of spatially variant blur in digital images. The problem arises when the camera optics contains flaws, when the scene contains multiple moving objects with different relative motion or the camera itself is i.e. rotated. Compensation through deconvolving is impossible due to the shift-variance in the PSF hence alternative methods are required. There are a number of suggested methods published. This report evaluates two methods

  • 310.
    Andersson, Mats
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Image Feature Representation for Analogue VLSI Representation1989Licentiate thesis, monograph (Other academic)
  • 311.
    Andersson, Mats
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Granlund, Gösta H.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    A Hybrid Image Processing Architecture1988Report (Other academic)
  • 312.
    Andersson, Mats
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Controllable 3-D Filters1993In: Proceedings of the SSAB Symposium on Image Analysis: Gothenburg, 1993Conference paper (Refereed)
  • 313.
    Andersson, Mats
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Orientation Estimation in Ambiguous Neighbourhoods1992In: Theory & Applications of Image Analysis: eds P. Johansen and S. Olsen / [ed] P. Johansen and S. Olsen, Singapore: World Scientific Publishing Co , 1992, p. 189-210Chapter in book (Refereed)
  • 314.
    Andersson, Mats
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Granlund, Gösta H.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Implementation of Image Processing Operations from Analogue Convolver Responses1989In: Proceedings of the SSAB Conference on Image Analysis: Gothenburg, Sweden, 1989, p. 67-74Conference paper (Refereed)
  • 315.
    Andersson, Mats T.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Controllable Multi-dimensional Filters and Models in Low-Level Computer Vision1992Doctoral thesis, monograph (Other academic)
    Abstract [en]

    This thesis concerns robust estimation of low-level features for use in computer vision systems. The presentation consists of two parts.

    The first part deals with controllable filters and models. A basis filter set is introduced which supports a computationally efficient synthesis of filters in arbitrary orientations. In contrast to many earlier methods, this approach allows the use of more complex models at an early stage of the processing. A new algorithm for robust estimation of orientation is presented. The algorithm is based on synthesized quadrature responses and supports the simultaneous representation and individual averaging of multiple events. These models are then extended to include estimation and representation of more complex image primitives such as as line ends, T-junctions, crossing lines and curvature. The proposed models are based on symmetry properties in the Fourier domain as well as in the spatial plane and the feature extraction is performed by applying the original basis filters directly on the grey-level image. The basis filters and interpolation scheme are finally generalized to allow synthesis of 3-D filters. The performance of the proposed models and algorithms is demonstrated using test images of both synthetic and real world data.

    The second part of the thesis concerns an image feature representation adapted for a robust analogue implementation. A possible use for this approach is in analogue VLSI or corresponding analogue hardware adapted for neural networks. The methods are based on projections of quadrature filter responses and mutual inhibition of magnitude signals.

  • 316.
    Andersson, Mats T.
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Controllable 3-D Filters for Low Level Computer Vision1993Report (Other academic)
    Abstract [en]

    Three-dimensional data processing is becoming more and more common. Typical operations are for example estimation of optical flow in video sequences and orientation estimation in 3-D MR images. This paper proposes an efficient approach to robust low level feature extraction for 3-D image analysis. In contrast to many earlier algorithms the methods proposed in this paper support the use of relatively complex models at the initial processing steps. The aim of this approach is to provide the means to handle complex events at the initial processing steps and to enable reliable estimates in the presence of noise. A limited basis filter set is proposed which forms a basis on the unit sphere and is related to spherical harmonics. From these basis filters, different types of orientation selective filters are synthesized. An interpolation scheme that provides a rotation as well as a translation of the synthesized filter is presented. The purpose is to obtain a robust and invariant feature extraction at a manageable computational cost.

  • 317.
    Andersson, Mats
    et al.
    Linköping University, Department of Biomedical Engineering, Medical Informatics. Linköping University, The Institute of Technology.
    Wiklund, Johan
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Biomedical Engineering, Medical Informatics. Linköping University, The Institute of Technology.
    Filter Networks1999In: Proceedings of Signal and Image Processing (SIP'99), Nassau, Bahamas: IASTED , 1999, p. 213-217Conference paper (Refereed)
    Abstract [en]

    This paper presents a new and efficient approach for optimization and implementation of filter banks e.g. velocity channels, orientation channels and scale spaces. The multi layered structure of a filter network enable a powerful decomposition of complex filters into simple filter components and the intermediary results may contribute to several output nodes. Compared to a direct implementation a filter network uses only a fraction of the coefficients to provide the same result. The optimization procedure is recursive and all filters on each level are optimized simultaneously. The individual filters of the network, in general, contain very few non-zero coefficients, but there are are no restrictions on the spatial position of the coefficients, they may e.g. be concentrated on a line or be sparsely scattered. An efficient implementation of a quadrature filter hierarchy for generic purposes using sparse filter components is presented.

  • 318.
    Andersson, Mats
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Wiklund, Johan
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Knutsson, Hans
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Sequential Filter Trees for Efficient 2D 3D and 4D Orientation Estimation1998Report (Other academic)
    Abstract [en]

    A recursive method to condense general multidimensional FIR-filters into a sequence of simple kernels with mainly one dimensional extent has been worked out. Convolver networks adopted for 2, 3 and 4D signals is presented and the performance is illustrated for spherically separable quadrature filters. The resulting filter responses are mapped to a non biased tensor representation where the local tensor constitutes a robust estimate of both the shape and the orientation (velocity) of the neighbourhood. A qualitative evaluation of this General Sequential Filter concept results in no detectable loss in accuracy when compared to conventional FIR (Finite Impulse Response) filters but the computational complexity is reduced several orders in magnitude. For the examples presented in this paper the attained speed-up is 5, 25 and 300 times for 2D, 3D and 4D data respectively The magnitude of the attained speed-up implies that complex spatio-temporal analysis can be performed using standard hardware, such as a powerful workstation, in close to real time. Due to the soft implementation of the convolver and the tree structure of the sequential filtering approach the processing is simple to reconfigure for the outer as well as the inner (vector length) dimensionality of the signal. The implementation was made in AVS (Application Visualization System) using modules written in C.

  • 319.
    Andersson, Michael
    Linköping University, Department of Electrical Engineering, Vehicular Systems. Linköping University, The Institute of Technology.
    Fault diagnosis of a Fixed Wing UAV Using Hardware and Analytical Redundancy2013Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    In unmanned aerial systems an autopilot controls the vehicle without human interference. Modern autopilots use an inertial navigation system, GPS, magnetometers and barometers to estimate the orientation, position, and velocity of the aircraft. In order to make correct decisions the autopilot must rely on correct information from the sensors.

    Fault diagnosis can be used to detect possible faults in the technical system when they occur. One way to perform fault diagnosis is model based diagnosis, where observations of the system are compared with a mathematical model of the system. Model based diagnosis is a common technique in many technical applications since it does not require any additional hardware. Another way to perform fault diagnosis is hardware diagnosis, which can be performed if there exists hardware redundancy, i.e. a set of identical sensors measuring the same quantity in the system.

    The main contribution of this master thesis is a model based diagnosis system for a fixed wing UAV autopilot. The diagnosis system can detect faults in all sensors on the autopilot and isolate faults in vital sensors as the GPS, magnetometer, and barometers. This thesis also provides a hardware diagnosis system based on the redundancy obtained with three autopilots on a single airframe. The use of several autopilots introduces hardware redundancy in the system, since every autopilot has its own set of sensors. The hardware diagnosis system handles faults in the sensors and actuators on the autopilots with full isolability, but demands additional hardware in the UAV.

  • 320.
    Andersson, Mikael
    et al.
    Linköping University, Department of Electrical Engineering.
    Karlström, Per
    Linköping University, Department of Electrical Engineering.
    Parallel JPEG Processing with a Hardware Accelerated DSP Processor2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This thesis describes the design of fast JPEG processing accelerators for a DSP processor.

    Certain computation tasks are moved from the DSP processor to hardware accelerators. The accelerators are slave co processing machines and are controlled via a new instruction set. The clock cycle and power consumption is reduced by utilizing the custom built hardware. The hardware can perform the tasks in fewer clock cycles and several tasks can run in parallel. This will reduce the total number of clock cycles needed.

    First a decoder and an encoder were implemented in DSP assembler. The cycle consumption of the parts was measured and from this the hardware/software partitioning was done. Behavioral models of the accelerators were then written in C++ and the assembly code was modified to work with the new hardware. Finally, the accelerators were implemented using Verilog.

    Extension of the accelerator instructions was given following a custom design flow.

  • 321.
    Andersson Naesseth, Christian
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Machine learning using approximate inference: Variational and sequential Monte Carlo methods2018Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Automatic decision making and pattern recognition under uncertainty are difficult tasks that are ubiquitous in our everyday life. The systems we design, and technology we develop, requires us to coherently represent and work with uncertainty in data. Probabilistic models and probabilistic inference gives us a powerful framework for solving this problem. Using this framework, while enticing, results in difficult-to-compute integrals and probabilities when conditioning on the observed data. This means we have a need for approximate inference, methods that solves the problem approximately using a systematic approach. In this thesis we develop new methods for efficient approximate inference in probabilistic models.

    There are generally two approaches to approximate inference, variational methods and Monte Carlo methods. In Monte Carlo methods we use a large number of random samples to approximate the integral of interest. With variational methods, on the other hand, we turn the integration problem into that of an optimization problem. We develop algorithms of both types and bridge the gap between them.

    First, we present a self-contained tutorial to the popular sequential Monte Carlo (SMC) class of methods. Next, we propose new algorithms and applications based on SMC for approximate inference in probabilistic graphical models. We derive nested sequential Monte Carlo, a new algorithm particularly well suited for inference in a large class of high-dimensional probabilistic models. Then, inspired by similar ideas we derive interacting particle Markov chain Monte Carlo to make use of parallelization to speed up approximate inference for universal probabilistic programming languages. After that, we show how we can make use of the rejection sampling process when generating gamma distributed random variables to speed up variational inference. Finally, we bridge the gap between SMC and variational methods by developing variational sequential Monte Carlo, a new flexible family of variational approximations.

    List of papers
    1. Capacity estimation of two-dimensional channels using Sequential Monte Carlo
    Open this publication in new window or tab >>Capacity estimation of two-dimensional channels using Sequential Monte Carlo
    2014 (English)In: 2014 IEEE Information Theory Workshop, 2014, p. 431-435Conference paper, Published paper (Refereed)
    Abstract [en]

    We derive a new Sequential-Monte-Carlo-based algorithm to estimate the capacity of two-dimensional channel models. The focus is on computing the noiseless capacity of the 2-D (1, ∞) run-length limited constrained channel, but the underlying idea is generally applicable. The proposed algorithm is profiled against a state-of-the-art method, yielding more than an order of magnitude improvement in estimation accuracy for a given computation time.

    National Category
    Control Engineering Computer Sciences Probability Theory and Statistics
    Identifiers
    urn:nbn:se:liu:diva-112966 (URN)10.1109/ITW.2014.6970868 (DOI)
    Conference
    Information Theory Workshop
    Available from: 2015-01-06 Created: 2015-01-06 Last updated: 2018-11-09
    2. Sequential Monte Carlo for Graphical Models
    Open this publication in new window or tab >>Sequential Monte Carlo for Graphical Models
    2014 (English)In: Advances in Neural Information Processing Systems, 2014, p. 1862-1870Conference paper, Published paper (Refereed)
    Abstract [en]

    We propose a new framework for how to use sequential Monte Carlo (SMC) algorithms for inference in probabilistic graphical models (PGM). Via a sequential decomposition of the PGM we find a sequence of auxiliary distributions defined on a monotonically increasing sequence of probability spaces. By targeting these auxiliary distributions using SMC we are able to approximate the full joint distribution defined by the PGM. One of the key merits of the SMC sampler is that it provides an unbiased estimate of the partition function of the model. We also show how it can be used within a particle Markov chain Monte Carlo framework in order to construct high-dimensional block-sampling algorithms for general PGMs.

    National Category
    Computer Sciences Probability Theory and Statistics Control Engineering
    Identifiers
    urn:nbn:se:liu:diva-112967 (URN)
    Conference
    Neural Information Processing Systems (NIPS)
    Available from: 2015-01-06 Created: 2015-01-06 Last updated: 2018-11-09Bibliographically approved
    3. Nested Sequential Monte Carlo Methods
    Open this publication in new window or tab >>Nested Sequential Monte Carlo Methods
    2015 (English)In: Proceedings of The 32nd International Conference on Machine Learning / [ed] Francis Bach, David Blei, Journal of Machine Learning Research (Online) , 2015, Vol. 37, p. 1292-1301Conference paper, Published paper (Refereed)
    Abstract [en]

    We propose nested sequential Monte Carlo (NSMC), a methodology to sample from sequences of probability distributions, even where the random variables are high-dimensional. NSMC generalises the SMC framework by requiring only approximate, properly weighted, samples from the SMC proposal distribution, while still resulting in a correct SMC algorithm. Furthermore, NSMC can in itself be used to produce such properly weighted samples. Consequently, one NSMC sampler can be used to construct an efficient high-dimensional proposal distribution for another NSMC sampler, and this nesting of the algorithm can be done to an arbitrary degree. This allows us to consider complex and high-dimensional models using SMC. We show results that motivate the efficacy of our approach on several filtering problems with dimensions in the order of 100 to 1 000.

    Place, publisher, year, edition, pages
    Journal of Machine Learning Research (Online), 2015
    Series
    JMLR Workshop and Conference Proceedings, ISSN 1938-7228 ; 37
    National Category
    Computer Sciences Control Engineering Probability Theory and Statistics
    Identifiers
    urn:nbn:se:liu:diva-122698 (URN)
    Conference
    32nd International Conference on Machine Learning, Lille, France, 6-11 July, 2015
    Available from: 2015-11-16 Created: 2015-11-16 Last updated: 2018-11-09Bibliographically approved
    4. Interacting Particle Markov Chain Monte Carlo
    Open this publication in new window or tab >>Interacting Particle Markov Chain Monte Carlo
    Show others...
    2016 (English)In: Proceedings of the 33rd International Conference on Machine Learning (ICML), 2016Conference paper, Published paper (Refereed)
    Abstract [en]

    We introduce interacting particle Markov chain Monte Carlo (iPMCMC), a PMCMC method based on an interacting pool of standard and conditional sequential Monte Carlo samplers. Like related methods, iPMCMC is a Markov chain Monte Carlo sampler on an extended space. We present empirical results that show significant improvements in mixing rates relative to both non-interacting PMCMC samplers and a single PMCMC sampler with an equivalent memory and computational budget. An additional advantage of the iPMCMC method is that it is suitable for distributed and multi-core architectures.

    Keywords
    Sequential Monte Carlo, Probabilistic programming, parallelisation
    National Category
    Computer Sciences Control Engineering Probability Theory and Statistics
    Identifiers
    urn:nbn:se:liu:diva-130043 (URN)
    Conference
    International Conference on Machine Learning (ICML), New York, USA, June 19-24, 2016
    Projects
    CADICS
    Funder
    Cancer and Allergy Foundation
    Available from: 2016-07-05 Created: 2016-07-05 Last updated: 2018-11-09
    5. Reparameterization Gradients through Acceptance-Rejection Sampling Algorithms
    Open this publication in new window or tab >>Reparameterization Gradients through Acceptance-Rejection Sampling Algorithms
    2017 (English)In: Proceedings of the 20th International Conference on Artificial Intelligence and Statistics, 2017Conference paper, Published paper (Refereed)
    Abstract [en]

    Variational inference using the reparameterization trick has enabled large-scale approximate Bayesian inference in complex probabilistic models, leveraging stochastic optimization to sidestep intractable expectations. The reparameterization trick is applicable when we can simulate a random variable by applying a differentiable deterministic function on an auxiliary random variable whose distribution is fixed. For many distributions of interest (such as the gamma or Dirichlet), simulation of random variables relies on acceptance-rejection sampling. The discontinuity introduced by the accept-reject step means that standard reparameterization tricks are not applicable. We propose a new method that lets us leverage reparameterization gradients even when variables are outputs of a acceptance-rejection sampling algorithm. Our approach enables reparameterization on a larger class of variational distributions. In several studies of real and synthetic data, we show that the variance of the estimator of the gradient is significantly lower than other state-of-the-art methods. This leads to faster convergence of stochastic gradient variational inference.

    Series
    Proceedings of Machine Learning Research, ISSN 1938-7228 ; 54
    National Category
    Computer Sciences
    Identifiers
    urn:nbn:se:liu:diva-152645 (URN)
    Conference
    Artificial Intelligence and Statistics, 20-22 April 2017, Fort Lauderdale, FL, USA
    Available from: 2018-11-09 Created: 2018-11-09 Last updated: 2018-11-21
    6. Variational Sequential Monte Carlo
    Open this publication in new window or tab >>Variational Sequential Monte Carlo
    2018 (English)In: Proceedings of the Twenty-First International Conference on Artificial Intelligence and Statistics, 2018Conference paper, Published paper (Refereed)
    Abstract [en]

    Many recent advances in large scale probabilistic inference rely on variational methods. The success of variational approaches depends on (i) formulating a flexible parametric family of distributions, and (ii) optimizing the parameters to find the member of this family that most closely approximates the exact posterior. In this paper we present a new approximating family of distributions, the variational sequential Monte Carlo (VSMC) family, and show how to optimize it in variational inference. VSMC melds variational inference (VI) and sequential Monte Carlo (SMC), providing practitioners with flexible, accurate, and powerful Bayesian inference. The VSMC family is a variational family that can approximate the posterior arbitrarily well, while still allowing for efficient optimization of its parameters. We demonstrate its utility on state space models, stochastic volatility models for financial data, and deep Markov models of brain neural circuits.

    National Category
    Computer Sciences
    Identifiers
    urn:nbn:se:liu:diva-152646 (URN)
    Conference
    International Conference on Artificial Intelligence and Statistics, Playa Blanca, Lanzarote, Canary Islands, April 9 - 11, 2018
    Available from: 2018-11-09 Created: 2018-11-09 Last updated: 2018-11-16Bibliographically approved
  • 322.
    Andersson Naesseth, Christian
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Nowcasting using Microblog Data2012Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [en]

    The explosion of information and user generated content made publicly available through the internet has made it possible to develop new ways of inferring interesting phenomena automatically. Some interesting examples are the spread of a contagious disease, earth quake occurrences, rainfall rates, box office results, stock market fluctuations and many many more. To this end a mathematical framework, based on theory from machine learning, has been employed to show how frequencies of relevant keywords in user generated content can estimate daily rainfall rates of different regions in Sweden using microblog data.

    Microblog data are collected using a microblog crawler. Properties of the data and data collection methods are both discussed extensively. In this thesis three different model types are studied for regression, linear and nonlinear parametric models as well as a nonparametric Gaussian process model. Using cross-validation and optimization the relevant parameters of each model are estimated and the model is evaluated on independent test data. All three models show promising results for nowcasting rainfall rates.

  • 323.
    Andersson Naesseth, Christian
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Vision and Radar Sensor Fusion for Advanced Driver Assistance Systems2013Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The World Health Organization predicts that by the year 2030, road traffic injuries will be one of the top five leading causes of death. Many of these deaths and injuries can be prevented by driving cars properly equipped with state-of-the-art safety and driver assistance systems. Some examples are auto-brake and auto-collision avoidance which are becoming more and more popular on the market today. A recent study by a Swedish insurance company has shown that on roadswith speeds up to 50 km/h an auto-brake system can reduce personal injuries by up to 64 percent. In fact in an estimated 40 percent of crashes, the auto-brake reduced the effects to the degree that no personal injury was sustained.

    It is imperative that these so called Advanced Driver Assistance Systems, to be really effective, have good situational awareness. It is important that they have adequate information of the vehicle’s immediate surroundings. Where are other cars, pedestrians or motorcycles relative to our own vehicle? How fast are they driving and in which lane? How is our own vehicle driving? Are there objects in the way of our own vehicle’s intended path? These and many more questions can be answered by a properly designed system for situational awareness.

    In this thesis we design and evaluate, both quantitatively and qualitatively, sensor fusion algorithms for multi-target tracking. We use a combination of camera and radar information to perform fusion and find relevant objects in a cluttered environment. The combination of these two sensors is very interesting because of their complementary attributes. The radar system has high range resolution but poor bearing resolution. The camera system on the other hand has a very high bearing resolution. This is very promising, with the potential to substantially increase the accuracy of the tracking system compared to just using one of the two. We have also designed algorithms for path prediction and a first threat awareness logic which are both qualitively evaluated.

  • 324.
    Andersson Naesseth, Christian
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Linderman, Scott
    Columbia University, New York City, New York, United States.
    Ranganath, Rajesh
    New York University, New York City, New York, United States.
    Blei, David
    Columbia University, New York City, New York, United States.
    Variational Sequential Monte Carlo2018In: Proceedings of the Twenty-First International Conference on Artificial Intelligence and Statistics, 2018Conference paper (Refereed)
    Abstract [en]

    Many recent advances in large scale probabilistic inference rely on variational methods. The success of variational approaches depends on (i) formulating a flexible parametric family of distributions, and (ii) optimizing the parameters to find the member of this family that most closely approximates the exact posterior. In this paper we present a new approximating family of distributions, the variational sequential Monte Carlo (VSMC) family, and show how to optimize it in variational inference. VSMC melds variational inference (VI) and sequential Monte Carlo (SMC), providing practitioners with flexible, accurate, and powerful Bayesian inference. The VSMC family is a variational family that can approximate the posterior arbitrarily well, while still allowing for efficient optimization of its parameters. We demonstrate its utility on state space models, stochastic volatility models for financial data, and deep Markov models of brain neural circuits.

  • 325.
    Andersson Naesseth, Christian
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Lindsten, Fredrik
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Schön, Thomas
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Capacity estimation of two-dimensional channels using Sequential Monte Carlo2014In: 2014 IEEE Information Theory Workshop, 2014, p. 431-435Conference paper (Refereed)
    Abstract [en]

    We derive a new Sequential-Monte-Carlo-based algorithm to estimate the capacity of two-dimensional channel models. The focus is on computing the noiseless capacity of the 2-D (1, ∞) run-length limited constrained channel, but the underlying idea is generally applicable. The proposed algorithm is profiled against a state-of-the-art method, yielding more than an order of magnitude improvement in estimation accuracy for a given computation time.

  • 326.
    Andersson Naesseth, Christian
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Lindsten, Fredrik
    The University of Cambridge, Cambridge, United Kingdom.
    Schön, Thomas
    Uppsala University, Uppsala, Sweden.
    Nested Sequential Monte Carlo Methods2015In: Proceedings of The 32nd International Conference on Machine Learning / [ed] Francis Bach, David Blei, Journal of Machine Learning Research (Online) , 2015, Vol. 37, p. 1292-1301Conference paper (Refereed)
    Abstract [en]

    We propose nested sequential Monte Carlo (NSMC), a methodology to sample from sequences of probability distributions, even where the random variables are high-dimensional. NSMC generalises the SMC framework by requiring only approximate, properly weighted, samples from the SMC proposal distribution, while still resulting in a correct SMC algorithm. Furthermore, NSMC can in itself be used to produce such properly weighted samples. Consequently, one NSMC sampler can be used to construct an efficient high-dimensional proposal distribution for another NSMC sampler, and this nesting of the algorithm can be done to an arbitrary degree. This allows us to consider complex and high-dimensional models using SMC. We show results that motivate the efficacy of our approach on several filtering problems with dimensions in the order of 100 to 1 000.

  • 327.
    Andersson Naesseth, Christian
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, The Institute of Technology.
    Lindsten, Fredrik
    University of Cambridge, Cambridge, UK.
    Schön, Thomas
    Uppsala University, Uppsala, Sweden.
    Sequential Monte Carlo for Graphical Models2014In: Advances in Neural Information Processing Systems, 2014, p. 1862-1870Conference paper (Refereed)
    Abstract [en]

    We propose a new framework for how to use sequential Monte Carlo (SMC) algorithms for inference in probabilistic graphical models (PGM). Via a sequential decomposition of the PGM we find a sequence of auxiliary distributions defined on a monotonically increasing sequence of probability spaces. By targeting these auxiliary distributions using SMC we are able to approximate the full joint distribution defined by the PGM. One of the key merits of the SMC sampler is that it provides an unbiased estimate of the partition function of the model. We also show how it can be used within a particle Markov chain Monte Carlo framework in order to construct high-dimensional block-sampling algorithms for general PGMs.

  • 328.
    Andersson Naesseth, Christian
    et al.
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering. Columbia University, USA.
    Ruiz, Francisco
    Columbia University, USA, University of Cambridge, UK.
    Linderman, Scott
    Columbia University, USA.
    Blei, David
    Columbia University, USA.
    Reparameterization Gradients through Acceptance-Rejection Sampling Algorithms2017In: Proceedings of the 20th International Conference on Artificial Intelligence and Statistics, 2017Conference paper (Refereed)
    Abstract [en]

    Variational inference using the reparameterization trick has enabled large-scale approximate Bayesian inference in complex probabilistic models, leveraging stochastic optimization to sidestep intractable expectations. The reparameterization trick is applicable when we can simulate a random variable by applying a differentiable deterministic function on an auxiliary random variable whose distribution is fixed. For many distributions of interest (such as the gamma or Dirichlet), simulation of random variables relies on acceptance-rejection sampling. The discontinuity introduced by the accept-reject step means that standard reparameterization tricks are not applicable. We propose a new method that lets us leverage reparameterization gradients even when variables are outputs of a acceptance-rejection sampling algorithm. Our approach enables reparameterization on a larger class of variational distributions. In several studies of real and synthetic data, we show that the variance of the estimator of the gradient is significantly lower than other state-of-the-art methods. This leads to faster convergence of stochastic gradient variational inference.

  • 329.
    Andersson, Niklas
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Design of Integrated Building Blocks for the Digital/Analog Interface2015Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    The integrated circuit has, since it was invented in the late 1950's, undergone a tremendous development and is today found in virtually all electric equipment. The small feature size and low production cost have made it possible to implement electronics in everyday objects ranging from computers and mobile phones to smart prize tags. Integrated circuits are typically used for data communication, signal processing and data storage. Data is usually stored in digital format but signal processing can be performed both in the digital and in the analog domain. For best performance, the right partition of signal processing between the analog and digital domain must be used. This is made possible by data converters converting data between the domains. A device converting an analog signal into a digital representation is called an analog-to-digital converter (ADC) and a device converting digital data into an analog representation is called a digital-to-analog converter (DAC). In this work we present research results on these data converters and the results are compiled in three different categories. The first contribution is an error correction technique for DACs called dynamic element matching, the second contribution is a power efficient time-to-digital converter architecture and the third is a design methodology for frequency synthesis using digital oscillators.

    The accuracy of a data converter, i.e., how accurate data is converted, is often limited by manufacturing errors. One type of error is the so-called matching error and in this work we investigate an error correction technique for DACs called dynamic element matching (DEM). If distortion is limiting the performance of a DAC, the DEM technique increases the accuracy of the DAC by transforming the matching error from being signal dependent, which results in distortion, to become signal independent noise. This noise can then be spectrally shaped or filtered out and hereby increasing the overall resolution of the system. The DEM technique is investigated theoretically and the theory is supported by measurement results from an implemented 14-bit DAC using DEM. From the investigation it is concluded that DEM increases the performance of the DAC when matching errors are dominating but has less effect at conversion speeds when dynamic errors dominate.

    The next contribution is a new time-to-digital converter (TDC) architecture. A TDC is effectively an ADC converting a time difference into a digital representation. The proposed architecture allows for smaller and more power efficient data conversion than previously reported and the implemented TDC prototype is smaller and more power efficient as compared to previously published TDCs in the same performance segment.

    The third contribution is a design methodology for frequency synthesis using digital oscillators. Digital oscillators generate a sinusoidal output using recursive algorithms. We show that the performance of digital oscillators, in terms of amplitude and frequency stability, to a large extent depends on the start conditions of the oscillators. Further we show that by selecting the proper start condition an oscillator can be forced to repeat the same output sequence over and over again, hence we have a locked oscillator. If the oscillator is locked there is no drift in amplitude or frequency which are common problems for recursive oscillators not using this approach. To find the optimal start conditions a search algorithm has been developed which has been thoroughly tested in simulations. The digital oscillator output is used for test signal generation for a DAC or used to generate tones with high spectral purity using DACs.

    List of papers
    1. A comparison of dynamic element matching in DACs
    Open this publication in new window or tab >>A comparison of dynamic element matching in DACs
    1999 (English)In: Proceedings '99 : Oslo, Norway, 8-9 November 1999 / [ed] Trond Sæther, 1999, p. 385-390Conference paper, Published paper (Other academic)
    Abstract [en]

    In the field of dynamic element matching, DEM, techniques, some "new" important theoretical results have been presented during the last decade. However, no comparison between these different DEM techniques (FRDEM, PRDEM, NSDEM) used in wideband digital-to-analog converters, DACs, has been reported. A brief review of different DEM techniques and a comparison between their properties in terms of complexity, etc., are presented in this paper together with simulation results showing the impact of using different DEM techniques.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112582 (URN)8798263722 (ISBN)
    Conference
    The 17th NORCHIP Conference, November 8-9, Oslo, Norway
    Available from: 2014-12-04 Created: 2014-12-04 Last updated: 2018-11-08Bibliographically approved
    2. A strategy for implementing dynamic element matching in current-steering DACs
    Open this publication in new window or tab >>A strategy for implementing dynamic element matching in current-steering DACs
    2000 (English)In: Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on, IEEE , 2000, p. 51-56Conference paper, Published paper (Other academic)
    Abstract [en]

    Interesting comparisons of dynamic element matching (DEM) techniques, have been presented during the last decade. However, not many chip implementations of these DEM techniques have been presented so far. A brief review of different DEM techniques are presented in this paper together with a strategy for implementing the partial randomization DEM, PRDEM, technique in a 3.3 V supply, 14 bit CMOS current-steering wideband digital-to-analog converter (DAC)

    Place, publisher, year, edition, pages
    IEEE, 2000
    Keywords
    0.35 micron;11 MHz;14 bit;3.3 V;88 MHz;CMOS wideband DAC;current-steering DACs;dynamic element matching;partial randomization technique;wideband digital-to-analog converter;CMOS integrated circuits;digital-analogue conversion;
    National Category
    Other Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-70637 (URN)10.1109/SSMSD.2000.836445 (DOI)0-7803-5975-5 (ISBN)
    Conference
    SSMSD 2000, 27 - 29 Feb. 2000, San Diego, CA , USA
    Available from: 2011-09-14 Created: 2011-09-14 Last updated: 2018-11-08
    3. Models and Implementation of a Dynamic Element Matching DAC
    Open this publication in new window or tab >>Models and Implementation of a Dynamic Element Matching DAC
    2003 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 34, no 1, p. 7-16Article in journal (Refereed) Published
    Abstract [en]

    The dynamic element matching (DEM) techniques for digital-to-analog converters (DACs) has been suggested as a promising method to improve matching between the DAC''s reference levels. However, no work has so far taken the dynamic effects that limit the performance for higher frequenciesinto account. In this paper we present a model describing the dynamic properties of a DEM DAC and compare the simulated results with measurements of a 14-bit current-steering DEM DAC implemented in a 0.35-μm CMOS process. The measured data agrees well with the results predicted by the used model. It is also shown that the DEM technique does not necessarily increase the performance of a DAC when dynamic errors are dominating the achievable performance.

    Place, publisher, year, edition, pages
    Netherlands: Springer, 2003
    Keywords
    DAC, DEM, CMOS, matching, current-steering
    National Category
    Other Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-21845 (URN)10.1023/A:1020331415597 (DOI)
    Available from: 2009-10-06 Created: 2009-10-06 Last updated: 2017-12-13
    4. A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture
    Open this publication in new window or tab >>A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture
    2014 (English)In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 61, no 10, p. 773-777Article in journal (Refereed) Published
    Abstract [en]

    A new Vernier time-to-digital converter (TDC) architecture using a delay line and a chain of delay latches is proposed. The delay latches replace the functionality of one delay chain and the sample register commonly found in Vernier converters, hereby enabling power and hardware efficiency improvements. The delay latches can be implemented using either standard or full custom cells, allowing the architecture to be implemented in field-programmable gate arrays, digital synthesized application-specific integrated circuits, or in full custom design flows. To demonstrate the proposed concept, a 7-bit Vernier TDC has been implemented in a standard 65-nm CMOS process with an active core size of 33 mu m x 120 mu m. The time resolution is 5.7 ps with a power consumption of 1.75 mW measured at a conversion rate of 100 MS/s.

    Place, publisher, year, edition, pages
    Institute of Electrical and Electronics Engineers (IEEE), 2014
    Keywords
    CMOS; delay latch; time-to-digital converter (TDC); Vernier
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112180 (URN)10.1109/TCSII.2014.2345289 (DOI)000343320500009 ()
    Available from: 2014-11-18 Created: 2014-11-18 Last updated: 2017-12-05
    5. Power-efficient time-to-digital converter for all-digital frequency locked loops
    Open this publication in new window or tab >>Power-efficient time-to-digital converter for all-digital frequency locked loops
    2015 (English)In: 2015 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), Institute of Electrical and Electronics Engineers (IEEE), 2015, p. 300-303Conference paper, Published paper (Refereed)
    Abstract [en]

    An 8-bit time-to-digital converter (TDC) for all-digital frequency-locked loops ispresented. The selected architecture uses a Vernier delay line where the commonlyused D flip-flops are replaced with a single enable transistor in the delay elements.This architecture allows for an area efficient and power efficient implementation. Thetarget application for the TDC is an all-digital frequency-locked loop which is alsooverviewed in the paper. A prototype chip has been implemented in a 65 nm CMOSprocess with an active core area of 75μmˆ120μm. The time resolution is 5.7 ps with apower consumption of 1.85 mW measured at 50 MHz sampling frequency.

    Place, publisher, year, edition, pages
    Institute of Electrical and Electronics Engineers (IEEE), 2015
    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112589 (URN)10.1109/ECCTD.2015.7300008 (DOI)000380498200010 ()978-1-4799-9877-7 (ISBN)
    Conference
    European Conference on Circuit Theory and Design (ECCTD)
    Available from: 2014-12-04 Created: 2014-12-04 Last updated: 2019-01-07Bibliographically approved
    6. Steady-state cycles in digital oscillators
    Open this publication in new window or tab >>Steady-state cycles in digital oscillators
    2014 (English)Manuscript (preprint) (Other academic)
    Abstract [en]

    Digital recursive oscillators locked in steady-state can be used to generate sinusoids with high spectral purity. The locking occurs when the oscillator returns to a previously visited state and repeats its sequence. In this work we propose a new search algorithm and two new search strategies to find all steady-states for a given oscillator configuration. The improvement in spurious-free dynamic range is between 7 and 40 dB compared to previously reported results. The algorithm is also able to find oscillator sequences for more frequencies than previously reported work. A key part of the method is the reduction of the search space made possible by a proposed extension of existing theory on recursive oscillators. Specific properties of digital oscillators in a steady-state are also discussed. It is shown that the initial states can be used to individually control the phase, amplitude, spectral purity, and also cycle length of the oscillator output.

    National Category
    Electrical Engineering, Electronic Engineering, Information Engineering
    Identifiers
    urn:nbn:se:liu:diva-112590 (URN)
    Available from: 2014-12-04 Created: 2014-12-04 Last updated: 2018-11-08Bibliographically approved
  • 330.
    Andersson, Niklas
    et al.
    Ericsson Microelectronics AB.
    Andersson, Ola
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Models and Implementation of a Dynamic Element Matching DAC2003In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 34, no 1, p. 7-16Article in journal (Refereed)
    Abstract [en]

    The dynamic element matching (DEM) techniques for digital-to-analog converters (DACs) has been suggested as a promising method to improve matching between the DAC''s reference levels. However, no work has so far taken the dynamic effects that limit the performance for higher frequenciesinto account. In this paper we present a model describing the dynamic properties of a DEM DAC and compare the simulated results with measurements of a 14-bit current-steering DEM DAC implemented in a 0.35-μm CMOS process. The measured data agrees well with the results predicted by the used model. It is also shown that the DEM technique does not necessarily increase the performance of a DAC when dynamic errors are dominating the achievable performance.

  • 331.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
    A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture2014In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 61, no 10, p. 773-777Article in journal (Refereed)
    Abstract [en]

    A new Vernier time-to-digital converter (TDC) architecture using a delay line and a chain of delay latches is proposed. The delay latches replace the functionality of one delay chain and the sample register commonly found in Vernier converters, hereby enabling power and hardware efficiency improvements. The delay latches can be implemented using either standard or full custom cells, allowing the architecture to be implemented in field-programmable gate arrays, digital synthesized application-specific integrated circuits, or in full custom design flows. To demonstrate the proposed concept, a 7-bit Vernier TDC has been implemented in a standard 65-nm CMOS process with an active core size of 33 mu m x 120 mu m. The time resolution is 5.7 ps with a power consumption of 1.75 mW measured at a conversion rate of 100 MS/s.

  • 332.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Power-efficient time-to-digital converter for all-digital frequency locked loops2015In: 2015 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), Institute of Electrical and Electronics Engineers (IEEE), 2015, p. 300-303Conference paper (Refereed)
    Abstract [en]

    An 8-bit time-to-digital converter (TDC) for all-digital frequency-locked loops ispresented. The selected architecture uses a Vernier delay line where the commonlyused D flip-flops are replaced with a single enable transistor in the delay elements.This architecture allows for an area efficient and power efficient implementation. Thetarget application for the TDC is an all-digital frequency-locked loop which is alsooverviewed in the paper. A prototype chip has been implemented in a 65 nm CMOSprocess with an active core area of 75μmˆ120μm. The time resolution is 5.7 ps with apower consumption of 1.85 mW measured at 50 MHz sampling frequency.

  • 333.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Gustafsson, Oskar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Steady-state cycles in digital oscillators2014Manuscript (preprint) (Other academic)
    Abstract [en]

    Digital recursive oscillators locked in steady-state can be used to generate sinusoids with high spectral purity. The locking occurs when the oscillator returns to a previously visited state and repeats its sequence. In this work we propose a new search algorithm and two new search strategies to find all steady-states for a given oscillator configuration. The improvement in spurious-free dynamic range is between 7 and 40 dB compared to previously reported results. The algorithm is also able to find oscillator sequences for more frequencies than previously reported work. A key part of the method is the reduction of the search space made possible by a proposed extension of existing theory on recursive oscillators. Specific properties of digital oscillators in a steady-state are also discussed. It is shown that the initial states can be used to individually control the phase, amplitude, spectral purity, and also cycle length of the oscillator output.

  • 334.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System.
    Rudberg, Mikael
    Linköping University, Department of Electrical Engineering, Electronics System.
    Improvement of segmented DACs (Swedish pat. 0001917-4)2000Patent (Other (popular science, discussion, etc.))
  • 335.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A comparison of dynamic element matching in DACs1999In: Proceedings '99 : Oslo, Norway, 8-9 November 1999 / [ed] Trond Sæther, 1999, p. 385-390Conference paper (Other academic)
    Abstract [en]

    In the field of dynamic element matching, DEM, techniques, some "new" important theoretical results have been presented during the last decade. However, no comparison between these different DEM techniques (FRDEM, PRDEM, NSDEM) used in wideband digital-to-analog converters, DACs, has been reported. A brief review of different DEM techniques and a comparison between their properties in terms of complexity, etc., are presented in this paper together with simulation results showing the impact of using different DEM techniques.

  • 336.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A strategy for implementing dynamic element matching in current-steering DACs2000In: Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on, IEEE , 2000, p. 51-56Conference paper (Other academic)
    Abstract [en]

    Interesting comparisons of dynamic element matching (DEM) techniques, have been presented during the last decade. However, not many chip implementations of these DEM techniques have been presented so far. A brief review of different DEM techniques are presented in this paper together with a strategy for implementing the partial randomization DEM, PRDEM, technique in a 3.3 V supply, 14 bit CMOS current-steering wideband digital-to-analog converter (DAC)

  • 337.
    Andersson, Niklas
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Comparison of Different Dynamic Element Matching Techniques for Wideband CMOS DACs1999In: Proceedings of the 17th Norchip Conference, 1999Conference paper (Other academic)
    Abstract [en]

    In the field of dynamic element matching, DEM, techniques, some ”new” important theoretical results have been presented during the last decade. However, no comparison between these different DEM techniques (FRDEM, PRDEM, NSDEM) used in wideband digital-to-analog converters, DACs, has been reported. A brief review of different DEM techniques and a comparison between their properties in terms of complexity, etc., are presented in this paper together with simulation results showing the impact of using different DEM techniques.

  • 338.
    Andersson, Ola
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Modeling and Implementation of Current-Steering Digital-to-Analog Converters2005Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Data converters, i.e., analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), are interface circuits between the analog and digital domains. They are used in, e.g., digital audio applications, data communication applications, and other types of applications where conversion between analog and digital signal representation is required. This work covers different aspects related to modeling, error correction, and implementation of DACs for communication applications where the requirements on the circuits in terms of speed and linearity are hard. The DAC architecture considered in this work is the current-steering DAC, which is the most commonly used architecture for high-speed applications.

    Transistor-level simulation of complex circuits using accurate transistor models require long simulation times. A transistor-level model of a DAC used in a system simulation is likely to be a severe bottleneck limiting the overall system simulation speed. Moreover, investigations of stochastic parameter variations require multiple simulation runs with different parameter values making transistor-level models unsuitable. Therefore, there is a need for behavioral-level models with reasonably short simulation times. Behavioral-level models can also be used to find the requirements on different building blocks on high abstraction levels, enabling the use of efficient topdown design methodologies. Models of different nonideal properties in current-steering DACs are used and developed in this work.

    Static errors typically dominates the low-frequency behavior of the DAC. One of the limiting factors for the static linearity of a current-steering DAC is mismatch between current sources. A well-known model of this problem is used extensively in this work for evaluation of different ideas and techniques for linearity enhancement. The highfrequency behavior of the DAC is typically dominated by dynamic errors. Models oftwo types of dynamic errors are developed in this work. These are the dynamic errors caused by parasitic capacitance in wires and transistors and glitches caused by asymmetry in the settling behavior of a current source.

    The encoding used for the digital control word in a current steering DAC has a large influence on the circuit performance, e.g., in terms static linearity and glitches. In this work, two DAC architectures are developed. These are denoted the decomposed and partially decomposed architectures and utilize encoding strategies aiming at a high circuit performance by avoiding unnecessary switching of current sources. The developed architectures are compared with the well-known binary-weighted and segmented architectures using behavioral-level simulations.

    It can be hard to meet a DAC design specification using a straightforward implementation. Techniques for compensation of errors that can be applied to improve the DAC linearity are studied. The well-known dynamic element matching (DEM) techniques are used for transforming spurious tones caused by matching errors into white or shaped noise. An overview of these techniques are given in this work and a DEM technique for the decomposed DAC architecture is developed. In DS modulation, feedback of the quantization error is utilized to spectrally shape the quantization noise to reduce its power within the signal band. A technique based on this principle is developed for spectral shaping of DAC nonlinearity errors utilizing a DAC model in a feedback loop. Two examples of utilization of the technique are given.

    Four different current-steering DACs implemented in CMOS technology are developed to enable comparison between behavioral-level simulations and measurements on actual implementations and to provide platforms for evaluation of different techniques for linearity improvement. For example, a 14-bit DEM DAC is implemented and measurement results are compared with simulation results. A good agreement between measured and simulated results is obtained. Moreover, a configurable 12-bit DAC capable of operating with different degrees of segmentation and decomposition is implemented to evaluate the proposed decomposed architecture. Measurement results agree with results from behavioral-level simulations and indicate that the decomposed architecture is a viable alternative to the commonly used segmented architecture.

  • 339.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A 14-Bit dual current-steering DAC2003In: Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003Conference paper (Other academic)
    Abstract [en]

    A 14-bit dual current-steering digital-to-analog converter implemented in a 0.25 µm CMOS process is presented in this work. Both implementation issues and measurement results are presented. The measured spurious-free dynamic range is higher than 73 dB for signal frequencies up to 3 MHz, and a measured multi-tone power ratio of approximately 71 dB is reported for an ADSL-like input.

  • 340.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A differential DAC architecture with variable common-mode level2002In: Proc. 2002 IEEE Int. Symp. on Circuits and Systems, ISCAS'02, 2002, p. I-113-I-116Conference paper (Refereed)
    Abstract [en]

    A differential current-steering digital-to-analog converter (DAC) architecture allowing the common-mode level of the input signal to be varied is presented. Simulation results with models of different DAC nonlinearities indicate that the proposed architecture has a potential of improving the linearity of the converters.

  • 341.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    A method of segmenting digital-to-analog converters2003In: Proc. IEEE Southwest Symposium on Mixed-Signal Design, SSMSD'03, 2003, p. 32-37Conference paper (Refereed)
    Abstract [en]

    Segmented architectures are often used in digital-to-analog converters (DACs). Here we propose a DAC structure based on recursive decomposition of an N-bit binary DAC into two (N-1) bit DACs and one 1 bit DAC. A DAC model that includes matching errors has been simulated. The simulation results indicate that by using four layers of decomposition it is possible to achieve similar performance as when using seven bits of traditional segmentation.

  • 342.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    n/a.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Combining DACs for improved performance2002In: Proc. 4th IEE Int. Conf. on Advanced A/D and D/A Conversion Techniques and their Applications, ADDA'02, 2002Conference paper (Refereed)
    Abstract [en]

    This work is an overview of recently proposed methods on combining DACs in order to improve performance. Some further development of these techniques are also presented. The techniques aim at reducing glitches and sensitivity towards limited output impedance in current sources.

  • 343.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Andersson, Niklas
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Spectral shaping of DAC nonlinearity errors through modulation of expected errors2001In: Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, IEEE , 2001, Vol. 3, p. 417-420Conference paper (Refereed)
    Abstract [en]

    Traditionally, delta-sigma modulation has been used for shaping of quantization noise. We present a modified version of delta-sigma modulation which also takes into account unwanted nonlinearities by feeding back not only the quantization error, but also the expected physical error. Behavioral-level simulations of a 5th-order structure showing an improvement of up to 4 effective bits are included

  • 344.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering. Linköping University, Department of Electrical Engineering, Electronics System.
    A parameterized cell-based design approach for digital-to-analog converters2004In: Proc. IEEE Int. Workshop on System-on-Chip for Real-Time Applications, IWSOC'04, 2004, p. 225-228Conference paper (Refereed)
    Abstract [en]

    Due to the lack of proper design automation tools, designers are often forced to use full-custom design methodologies when designing analog and mixed-signal circuits. In this work, we discuss a design methodology based on parameterized cells intended for efficient design. The methodology is illustrated with the design of a 12-bit configurable current-steering DAC. Because the cells are parameterized, their layout must be described in a generalized way, resulting in a longer design time compared with a manual layout of a fixed circuit. However, the parameterized approach simplifies iteration of the layout process and block reuse.

  • 345.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering.
    A testbed for different codes in digital-to-analog converters2004In: Proc. Swedish System-on-Chip Conf. 2004, SSoCC'04, 2004Conference paper (Other academic)
  • 346.
    Andersson, Ola
    et al.
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    Vesterbacka, Mark
    Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
    A yield-enhancement strategy for binary-weighted DACs2005In: Proc. European Conf. Circuit Theory and Design 2005, ECCTD'05, 2005, , p. 55-58p. 55-58Conference paper (Refereed)
    Abstract [en]

    One of the major contributors to the static nonlinearity of a current-steering digital-to-analog converter (DAC) is mismatch between current sources. A technique for enhancing the yield of binary-weighted current-steering DACs is proposed. The technique utilizes a special case of a general technique for spectral shaping of DAC nonlinearity errors presented earlier and requires oversampling. The technique relies on two DAC models with low computational complexity that can be integrated with the DAC at a negligible cost in terms of area and power consumption. Behavioral-level simulation results indicate that the proposed method has a good potential of enhancing the yield of binary-weighted DACs for situations where the matching errors constitute the dominating source of nonlinearity.

  • 347.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering. Linköping University, Department of Electrical Engineering, Electronics System.
    Dynamic element matching in decomposed digital-to-analog converters2004In: Proc. IEEE NORCHIP'04, Denmark: TechnoData A/S , 2004, , p. 187-190p. 187-190Conference paper (Refereed)
    Abstract [en]

    A dynamic element matching (DEM) technique is proposed that aims at improving the spurious-free dynamic range (SFDR) of current-steering digital-to-analog converters (DACs) implemented with a decomposed architecture. The architecture consists of a number of small binary-weighted DACs that are controlled such that only a minimum number of unit current sources are switching for the most critical code transitions. The DEM is obtained by scrambling bit pairs with equal weight. In contrast to most other DEM techniques, the scrambling is performed conditionally so that the number of switching current sources does not increase compared with the unscrambled case. Hence, the good glitch properties of the decomposed converter architecture are maintained. Simulations on a behavioral level of some decomposed DACs have been performed. Assuming random uncorrelated matching errors with Gaussian distribution and a 5% standard deviation, the SFDR value giving 90% yield is increased with 5.6 dB for a 14-bit DAC using scrambling of the two bit pairs with the largest weights. The hardware cost for the required scrambling circuits should be low since only two pairs of bits are scrambled.

  • 348. Andersson, Ola
    et al.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters2005In: IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, Vol. 52, no 11, p. 2265-2275Article in journal (Refereed)
    Abstract [en]

    The current-steering digital-to-analog converter (DAC) is the most common type of DAC for high-speed applications. Glitches present in the DAC output contribute to nonlinear distortion in the DAC transfer characteristics degrading the circuit performance. One source of glitches is asymmetry in the settling behavior when switching on and off a current source. A behavioral-level model of this nonideal behavior is derived in this work. Further, a method with low computational complexity for estimating the influence of the modeled errors in the frequency domain is developed. This method can be utilized by circuit designers to derive circuit requirements for fulfilling a given frequency-domain specification, potentially relaxing the requirements compared with a worst-case analysis. Examples of model utilization are given in terms of an analytical examination and MATLAB simulations. A good agreement between simulated and analytical results is obtained.

  • 349.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering.
    Vesterbacka, Mark
    Linköping University, Department of Electrical Engineering. Linköping University, Department of Electrical Engineering, Electronics System.
    Partial decomposition of digital-to-analog converters2004In: Proc. 12th IEEE Mediterranean Electrotechnical Conf., MELECON'04, 2004, p. 193-196Conference paper (Refereed)
    Abstract [en]

    The decomposed DAC architecture was recently proposed as an alternative to the traditional segmented architecture. In this work, we present a modified version of the decomposed architecture with reduced hardware complexity denoted the partially decomposed architecture. Behavioral-level simulations indicate that the partially decomposed architecture is a good alternative for signals with Gaussian distribution, whereas the original decomposed or segmented architectures are preferred for sinusoidal signals.

  • 350.
    Andersson, Ola
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Wikner, Jacob
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Characterization of a CMOS current-steering DAC using state-space models2000In: Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on, IEEE , 2000, Vol. 2, p. 668-671 vol.2Conference paper (Refereed)
    Abstract [en]

    Performance limitations on current-steering digital-to-analog converters (DACs) are due to finite output impedances, nonideal switches, parasitic capacitances, matching, etc. In this work we present a dynamic state-space model of a 14-bit current-steering DAC which includes dynamic nonidealities. Simulation results are presented and compared to measurement results. The model can be used for fast performance estimation of D/A converters

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