Power transistor selection and gate circuit design for a three-phase motor drive is
investigated. The objective is to minimize total power loss of the switching device
in an inverter leg designed for a (180 V, 9.9 Arms) permanent magnet synchronous
motor, while retaining robustness against parasitic turn-on, voltage and current
overshoot, and oscillation. The work combines circuit-level simulation in LTspice
with experimental double pulse tests on both an existing and a redesigned pro-
totype. Parametric sweeps of gate resistance and parasitic inductance and capac-
itances were performed to quantify their individual contributions to switching
behavior and to guide the design of a new motor drive. In the redesigned proto-
type four transistor candidates with contrasting QG and RDS(on) were evaluated:
two Si-MOSFETs and two SiC-MOSFETs. The experiment showed that the SiC
devices, with an increased breakdown voltage to 650 V, reduced the total losses
by approximately 50 % at 10 kHz switching frequency compared to the original
design. The SiC device had a (QG , RDS(on)) trade-off that balanced the switch-
ing losses and conduction losses. The gate resistance combination RG(on) = 15 Ω,
RG(off) = 5 Ω was identified as optimal combination for the redesign, maintain-
ing a 1 V margin below the minimum gate threshold voltage to prevent parasitic
turn-on while minimizing switching losses.