liu.seSearch for publications in DiVA
Change search
Link to record
Permanent link

Direct link
Alternative names
Publications (2 of 2) Show all publications
Gannedahl, R., Bagheri Asli, J., Sjöland, H. & Alvandpour, A. (2023). A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity. In: NEWCAS 2023 CONFERENCE PROCEEDINGS: . Paper presented at 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, 26 - 28 June, 2023. IEEE
Open this publication in new window or tab >>A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity
2023 (English)In: NEWCAS 2023 CONFERENCE PROCEEDINGS, IEEE, 2023Conference paper, Published paper (Refereed)
Abstract [en]

Sub-THz frequencies are tomorrow’s hot research area in mobile communication. However, in this range of frequencies the systems are complex, and it is hard to explore various system architectures and correlate the system-level solutions with circuit-level performances and requirements. This paper presents a scalable testbench in MATLAB/Simulink for sub-THz hybrid beamforming receivers. The testbench models analog and mixed signal blocks with high fidelity, enabling system level simulations with circuit-level imperfections. A receiver with multiple 4-element subarrays is simulated in the testbench, and the impact of phase noise, beam squint, phase shifter inaccuracies, ADC resolution, and more are investigated. Additionally, a Mueller-Müller symbol synchronizer is implemented to achieve symbol-rate sampling. 

Place, publisher, year, edition, pages
IEEE, 2023
Series
IEEE International New Circuits and Systems Conference, ISSN 2472-467X, E-ISSN 2474-9672
Keywords
Analog to digital conversion; MATLAB; Timing circuits; 6g; Circuit levels; Mobile communications; Modular system; Research areas; Sub-THz; System levels; System-level testbench.; Test-bench; THz frequencies; Beamforming
National Category
Telecommunications
Identifiers
urn:nbn:se:liu:diva-197694 (URN)10.1109/NEWCAS57931.2023.10198117 (DOI)001050763800087 ()2-s2.0-85168554493 (Scopus ID)9798350300246 (ISBN)9798350300253 (ISBN)
Conference
21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, 26 - 28 June, 2023
Note

Cited by: 0; Conference name: 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023; Conference date: 26 June 2023 through 28 June 2023; Conference code: 191480

Funding: Excellence Center at Linkoping-Lund in Information Technology (ELLIIT)

Available from: 2023-09-07 Created: 2023-09-07 Last updated: 2024-10-02
Bagheri Asli, J., Saberkari, A. & Alvandpour, A. (2023). A Parallel-Path Amplifier for Fast Output Settling. In: NEWCAS 2023 CONFERENCE PROCEEDINGS: . Paper presented at 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, 26 - 28 June, 2023. IEEE
Open this publication in new window or tab >>A Parallel-Path Amplifier for Fast Output Settling
2023 (English)In: NEWCAS 2023 CONFERENCE PROCEEDINGS, IEEE, 2023Conference paper, Published paper (Refereed)
Abstract [en]

Pushing CMOS technology to the nanometer range is detrimental to analog circuits’ performance due to the reduction of gain and slew rate of amplifiers, so the classical approaches need to be revisited for adjustment in advanced nodes. This paper presents a parallel-path amplifier used as a switched-capacitor (SC) amplifier. The proposed amplifier includes a high bandwidth and slewing path parallel to a high gain path. The high bandwidth and slewing path, named the feedforward path, provides high charging/discharging currents to decrease the slewing time of the amplification phase, significantly (60%). In parallel, the high gain path provides sufficient open-loop DC gain for final settling (59 dB). The feedforward path is enabled/disabled by control signals provided through a hysteresis detector and by considering the status of the feedback voltage. The proposed amplifier is designed and fabricated in 65nm CMOS technology as a multiplying digital-to-analog converter (MDAC) in a pipeline ADC. The chip is under fabrication, and this paper covers post-layout performance of the proposed amplifier. The results reveal that enabling the feedforward path guarantees the amplifier to have a constant error (\lt2 mV) for an extensive range of input voltages (300 mV Vin 900 mV) compared to its standalone high gain path. At the same time, the static current of the feedforward path is minimal (\lt 100 µ A), and it can drive large load capacitors. © 2023 IEEE.

Place, publisher, year, edition, pages
IEEE, 2023
Series
IEEE International New Circuits and Systems Conference, ISSN 2472-467X, E-ISSN 2474-9672
Keywords
Bandwidth; CMOS integrated circuits; Feedback; CMOS technology; Digital-to-analog converters; Feedforward paths; High bandwidth; High gain; High-slewing path; Multiplying digital-to-analog converter; Nano meter range; Parallel path; Switched-capacitor amplifiers; Digital to analog conversion
National Category
Telecommunications
Identifiers
urn:nbn:se:liu:diva-197695 (URN)10.1109/NEWCAS57931.2023.10198175 (DOI)001050763800142 ()2-s2.0-85168548645 (Scopus ID)9798350300246 (ISBN)9798350300253 (ISBN)
Conference
21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, 26 - 28 June, 2023
Note

Funding: Excellence Center at Linkoping-Lund in Information Technology (ELLIIT)

Available from: 2023-09-07 Created: 2023-09-07 Last updated: 2024-10-02
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0001-7474-6428

Search in DiVA

Show all publications