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Linares, D. R., Moryakova, O. & Johansson, H. (2026). Efficient Computation of Time-Index Powered Weighted Sums Using Cascaded Accumulators. IEEE Signal Processing Letters, 33, 893-897
Open this publication in new window or tab >>Efficient Computation of Time-Index Powered Weighted Sums Using Cascaded Accumulators
2026 (English)In: IEEE Signal Processing Letters, ISSN 1070-9908, E-ISSN 1558-2361, Vol. 33, p. 893-897Article in journal (Refereed) Published
Abstract [en]

This letter presents a novel approach for \mbox{efficiently} computing time-index powered weighted sums of the form $\sum_{n=0}^{N-1} n^{K} v[n]$ using cascaded accumulators. Traditional direct computation requires $K{\times}N$ general multiplications, which become prohibitive for large $N$, while alternative strategies based on lookup tables or signal reversal require storing entire data blocks. By exploiting accumulator properties, the proposed method eliminates the need for such storage and reduces the multiplicative cost to only $K{+}1$ constant multiplications, enabling efficient real-time implementation. The approach is particularly useful when such sums need to be efficiently computed in sample-by-sample processing systems.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2026
Keywords
Polynomials;Real-time systems;Costs;Computational efficiency;Transfer functions;Table lookup;Registers;Convolution;Artificial intelligence;Time-frequency analysis;Accumulators;addition-chain exponentiation;binomial coefficients;Stirling numbers;time-index powered weighted sums
National Category
Communication Systems
Identifiers
urn:nbn:se:liu:diva-221366 (URN)10.1109/lsp.2026.3661843 (DOI)001696573400005 ()2-s2.0-105029958842 (Scopus ID)
Projects
ELLIIT, VINNOVA
Note

Funding: ELLIIT; Sweden's Innovation Agency

Available from: 2026-02-18 Created: 2026-02-18 Last updated: 2026-03-13
Moryakova, O. (2024). Contributions to Efficient Design and Implementation of Variable Digital Filters. (Licentiate dissertation). Linköping: Linköping University Electronic Press
Open this publication in new window or tab >>Contributions to Efficient Design and Implementation of Variable Digital Filters
2024 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

Complexity reduction is one of the main issues of digital signal processing (DSP) algorithms, especially in communication systems where each new generation brings new requirements towards increasing data rates and improved accuracy positioning, leading to the growth of power consumption and chip area. To meet these requirements and at the same time find a trade-off between high performance and low implementation cost, more sophisticated DSP algorithms need to be developed. Recent communication standards require flexible, adaptive systems capable of real-time frequency-domain tuning. Variable digital filters (VDFs) address these needs by enabling "on-the-fly" frequency response adjustments without the need for online filter design. The key feature of VDFs is that they require only an adjustment of one or a few parameters to change their characteristics, without the need for extensive additional computations. Most VDF coefficients remain fixed after the initial design, allowing for efficient hardware implementation. This makes VDFs essential for modern adaptive communication technologies.

This thesis primarily focuses on the design and low-complexity implementation techniques of VDFs and presents three main contributions. Firstly, it proposes three VDF realizations for simultaneous lowpass filtering and equalization using polynomial channel models, with systematic design procedures based on minimax optimization for all the proposed structures. In addition, a fast design method for the VDFs with several variable parameters, which can substantially decrease the design time, is presented. Secondly, it introduces frequency-domain implementations of VDFs using the overlap-save technique. Based on the assumption that these filters have been designed using a common design approach based on optimizing the impulse response coefficients, the filter DFT coefficients are proposed to be implemented as fixed, hybrid, or variable weights. Lastly, the thesis presents an efficient design approach for a variable-bandwidth digital filter implemented in the frequency domain using the overlap-save method. The proposed approach is based on a hybrid of frequency sampling and optimization, allowing for direct optimization of the DFT coefficients considering the filter frequency-domain implementation and thereby noticeably reducing the cost of implementation and an online update of the DFT filter coefficients when the bandwidth is varied.

Abstract [sv]

Reduktion av komplexitet är en av huvudfrågorna för digital signalbehandling (DSP) algoritmer, särskilt i kommunikationssystem där varje ny generation ställer nya krav på att öka datahastigheter och förbättrad noggrannhet positionering, vilket leder till en ökning av strömförbrukningen och kretsytan. För att möta dessa krav och samtidigt hitta en avvägning mellan hög prestanda och låg implementeringskostnad behöver mer sofistikerade DSP-algoritmer utvecklas. Senaste kommunikationsstandarder kräver flexibla, adaptiva system som kan frekvensdomäninställning i realtid. Variabla digitala filter (VDF) tillgodoser dessa behov genom att möjliggöra "on-the-fly" frekvenssvarsjusteringar utan behov av onlinefilterdesign. Nyckelegenskapen hos VDF:er är att de bara kräver en justering av en eller ett fåtal parametrar för att ändra deras egenskaper, utan behov av omfattande ytterligare beräkningar. De flesta VDF-koefficienter förblir fixerade efter den ursprungliga designen, vilket möjliggör effektiv hårdvaruimplementering. Detta gör VDF:er väsentliga för modern adaptiv kommunikationsteknik.

Den här avhandlingen fokuserar främst på design och implementeringstekniker med låg komplexitet för VDF:er och presenterar tre huvudsakliga bidrag. För det första föreslår den tre VDF-realiseringar för samtidig lågpassfiltrering och utjämning med användning av polynomkanalmodeller, med systematiska designprocedurer baserade på minimax optimering för alla föreslagna strukturer. Dessutom presenteras en snabb designmetod för VDF:erna med flera variabla parametrar, som avsevärt kan minska designtiden. För det andra introducerar den frekvensdomänimplementationer av VDF:er med överlappningssparateknik. Baserat på antagandet att dessa filter har utformats med användning av en gemensam designmetod baserad på optimering av impulssvarskoefficienterna, föreslås filtrets DFT-koefficienter implementeras som fasta, hybrida eller variabla vikter. Slutligen presenterar avhandlingen en effektiv designansats för ett digitalt filter med variabel bandbredd implementerat i frekvensdomänen med användning av överlappningssparametoden. Det föreslagna tillvägagångssättet är baserat på en hybrid av frekvenssampling och optimering, vilket möjliggör direkt optimering av DFT-koefficienterna med tanke på implementeringen av filterfrekvensdomänen och därigenom märkbart minska kostnaden för implementering och en onlineuppdatering av DFT-filterkoefficienterna när bandbredden är varierande.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press, 2024. p. 54
Series
Linköping Studies in Science and Technology. Licentiate Thesis, ISSN 0280-7971 ; 2002
National Category
Signal Processing
Identifiers
urn:nbn:se:liu:diva-207018 (URN)10.3384/9789180757713 (DOI)9789180757706 (ISBN)9789180757713 (ISBN)
Presentation
2024-09-27, Planck, F Building, Campus Valla, Linköping, 10:15 (English)
Opponent
Supervisors
Available from: 2024-08-29 Created: 2024-08-29 Last updated: 2024-08-29Bibliographically approved
Moryakova, O. & Johansson, H. (2024). Efficient Design and Implementation of Fast-Convolution-Based Variable-Bandwidth Filters. In: Proceeeing of 32nd European Signal Processing Conference EUSIPCO 2024: . Paper presented at EUSIPCO 2024, 32nd European Signal Processing Conference, August 26-30 2024, Lyon, France (pp. 2557-2561). IEEE
Open this publication in new window or tab >>Efficient Design and Implementation of Fast-Convolution-Based Variable-Bandwidth Filters
2024 (English)In: Proceeeing of 32nd European Signal Processing Conference EUSIPCO 2024, IEEE , 2024, p. 2557-2561Conference paper, Poster (with or without abstract) (Refereed)
Abstract [en]

This paper introduces an efficient design approach for a fast-convolution-based variable-bandwidth (VBW) filter. The proposed approach is based on a hybrid of frequency sampling and optimization (HFSO), that offers significant computational complexity reduction compared to existing solutions for a given performance. The paper provides a design procedure based on minimax optimization to obtain the minimum complexity of the overall filter. A design example includes a comparison of the proposed design-based VBW filter and time-domain designed VBW filters implemented in the time domain and in the frequency domain. It is shown that not only the implementation complexity can be reduced but also the design complexity by excluding any computations when the bandwidth of the filter is adjusted. Moreover, memory requirements are also decreased compared to the existing frequency-domain implementations. Index Terms—Variable bandwidth filter, fast convolution, frequency-domain design, time-varying systems, overlap-save, multirate filter banks.

Place, publisher, year, edition, pages
IEEE, 2024
Series
European Signal Processing Conference, ISSN 2076-1465
National Category
Signal Processing
Identifiers
urn:nbn:se:liu:diva-207039 (URN)001349787000511 ()9789464593617 (ISBN)
Conference
EUSIPCO 2024, 32nd European Signal Processing Conference, August 26-30 2024, Lyon, France
Available from: 2024-08-28 Created: 2024-08-28 Last updated: 2025-01-14Bibliographically approved
Moryakova, O. & Johansson, H. (2023). Frequency-Domain Implementations of Variable Digital FIR Filters Using the Overlap-Save Technique. In: 2023 24th International Conference on Digital Signal Processing (DSP): . Paper presented at 24th International Conference on Digital Signal Processing (DSP), Rhodes, Greece, June 11-13, 2023. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Frequency-Domain Implementations of Variable Digital FIR Filters Using the Overlap-Save Technique
2023 (English)In: 2023 24th International Conference on Digital Signal Processing (DSP), Institute of Electrical and Electronics Engineers (IEEE), 2023Conference paper, Published paper (Refereed)
Abstract [en]

The paper introduces frequency-domain implementations of variable digital filters using the overlap-save method. Expressions for implementation and design complexities are derived for real-valued impulse responses. Design examples include implementations of a variable bandwidth (VBW) filter alone as well as a cascade of a VBW filter and a variable fractional delay(VFD) filter. Compared to a time-domain implementation and a filter bank approach, the proposed structures can reduce the implementation complexity significantly and achieve savings up to 95% in the multiplication rate and up to 89% in the addition rate.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2023
Series
International Conference on Digital Signal Processing (DSP), ISSN 1546-1874, E-ISSN 2165-3577
Keywords
Variable digital filter, frequency-domain implementations, implementation complexity, overlap-save
National Category
Signal Processing
Identifiers
urn:nbn:se:liu:diva-201232 (URN)10.1109/DSP58604.2023.10167923 (DOI)2-s2.0-85165482542 (Scopus ID)9798350339598 (ISBN)9798350339604 (ISBN)
Conference
24th International Conference on Digital Signal Processing (DSP), Rhodes, Greece, June 11-13, 2023
Available from: 2024-02-28 Created: 2024-02-28 Last updated: 2025-08-18Bibliographically approved
Moryakova, O., Wang, Y. & Johansson, H. (2022). Reconfigurable FIR Lowpass Equalizers. In: 2022 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS): . Paper presented at 36th IEEE Workshop on Signal Processing Systems (SiPS), Rennes, FRANCE, nov 02-04, 2022 (pp. 114-119). IEEE
Open this publication in new window or tab >>Reconfigurable FIR Lowpass Equalizers
2022 (English)In: 2022 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS), IEEE , 2022, p. 114-119Conference paper, Published paper (Refereed)
Abstract [en]

This paper introduces realizations of a reconfigurable finite-impulse-response (FIR) filter for simultaneous equalization and lowpass filtering. The proposed structures employ properties of both a variable bandwidth (VBW) filter and a variable equalizer (VE) with an adjustable coefficient using the Farrow structure, therefore they consist of weighted combinations of fixed subfilters. Design procedures using minimax optimization technique are provided. The paper includes a design example and complexity comparisons between the proposed structures of the reconfigurable lowpass equalizer (RLPE) and a common approach of using a regular FIR equalization filter requiring online redesign.

Place, publisher, year, edition, pages
IEEE, 2022
Series
IEEE Workshop on Signal Processing Systems, ISSN 1520-6130, E-ISSN 2374-7390
Keywords
Variable equalizer; variable bandwidth lowpass filter; Farrow structure; minimax optimization
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:liu:diva-198996 (URN)10.1109/SIPS55645.2022.9919214 (DOI)001081960800020 ()9781665485241 (ISBN)9781665485258 (ISBN)
Conference
36th IEEE Workshop on Signal Processing Systems (SiPS), Rennes, FRANCE, nov 02-04, 2022
Available from: 2023-11-07 Created: 2023-11-07 Last updated: 2024-12-03
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0009-0001-6464-5452

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