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Monolayer dual gate transistors with a single charge transport layer
Philips Research Labs, Netherlands; University of Groningen, Netherlands.
Philips Research Labs, Netherlands; Eindhoven University of Technology, Netherlands.
TNO, Netherlands.
[Spijkman, Netherlands.ORCID-id: 0000-0002-7104-7127
Vise andre og tillknytning
2010 (engelsk)Inngår i: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 96, nr 14, artikkel-id 143304Artikkel i tidsskrift (Fagfellevurdert) Published
Abstract [en]

A dual gate transistor was fabricated using a self-assembled monolayer as the semiconductor. We show the possibility of processing a dielectric on top of the self-assembled monolayer without deteriorating the device performance. The two gates of the transistor accumulate charges in the monomolecular transport layer and artifacts caused by the semiconductor thickness are negated. We investigate the electrical transport in a dual gate self-assembled monolayer field-effect transistor and present a detailed analysis of the importance of the contact geometry in monolayer field-effect transistors.

sted, utgiver, år, opplag, sider
American Institute of Physics (AIP) , 2010. Vol. 96, nr 14, artikkel-id 143304
Emneord [en]
field effect transistors; monolayers
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-141477DOI: 10.1063/1.3379026ISI: 000276554600091OAI: oai:DiVA.org:liu-141477DiVA, id: diva2:1145708
Merknad

Funding Agencies|Dutch Polymer Institute [624]; Dutch Technology Foundation STW

Tilgjengelig fra: 2017-09-29 Laget: 2017-09-29 Sist oppdatert: 2017-10-06

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Kemerink, M.
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