liu.seSearch for publications in DiVA
Change search
Refine search result
22232425 1201 - 1217 of 1217
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Rows per page
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sort
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
Select
The maximal number of hits you can export is 250. When you want to export more records please use the Create feeds function.
  • 1201.
    Zilic, Edmin
    Linköping University, Department of Electrical Engineering.
    Implementering av 1D-DCT2006Independent thesis Advanced level (degree of Magister), 20 points / 30 hpStudent thesis
    Abstract [en]

    IDCT (Inverse Discrete Cosine Transform) is a common algorithm being used with image and sound decompression. The algorithm is a Fourier related transform which can occur in many different types like, one-dimensional, two-dimensional, three-dimensional and many more.

    The goal with this thesis is to create a fast and low effect version of two-dimensional IDCT algorithm, where techniques as multiple-constant multiplication and subexpression sharing plus bit-serial and bit-parallel arithmetic are used.

    The result is a hardware implementation with power consumption at 19,56 mW.

    Download full text (pdf)
    FULLTEXT01
  • 1202.
    Ziske, Sophie
    Linköping University, Department of Science and Technology.
    Glucose Sensing and Differentiating Systems with Organic Electrochemical Neurons: A Future Outlook for Type 2 Diabetes2024Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    In recent years great advances in the field of biomedical engineering and organic electronics have been achieved. One promising application would be the regulation of blood glucose concentration in type 2 diabetes patients. This application would eliminate medication and would improve the standard of life. To achieve this goal a system is needed which receives information about the glucose concentration and reacts upon it. This output reaction could then be used to stimulate the body's own glucose regulation mechanisms. This thesis combined a glucose sensor with an artificial neuron to take the first step towards such a system. Two different artificial neurons, the Axon-Hillock neuron and the astable multivibrator, were characterized and examined upon their usability. The Axon-Hillock, build with organic electrochemical transistors, revealed that it could be applied for both regulating high and low blood glucose concentrations. The astable multivibrator, build with silicon-based transistors, was not as functional as the Axon-Hillock neuron but with more development it could become as good. The placement of the glucose sensor in the astable multivibrator circuit is essential parameter to consider. The results demonstrate that the examined system is functional and could become a part of a larger closed-loop system. Future tests on an animal model may demonstrate its viability as a treatment for type 2 diabetes.

    Download full text (pdf)
    fulltext
  • 1203.
    Zografos, Vasileios
    et al.
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Lenz, Reiner
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, Department of Science and Technology, Media and Information Technology. Linköping University, The Institute of Technology.
    Spatio-chromatic image content descriptors and their analysis using Extreme Value Theory2011In: Image analysis: 17th Scandinavian Conference, SCIA 2011, Ystad, Sweden, May 2011. Proceedings, Springer Berlin/Heidelberg, 2011, p. 579-591Conference paper (Refereed)
    Abstract [en]

    We use the theory of group representations to construct very fast image descriptors that split the vector space of local RGB distributions into small group-invariant subspaces. These descriptors are group theoretical generalizations of the Fourier Transform and can be computed with algorithms similar to the FFT. Because of their computational efficiency they are especially suitable for retrieval, recognition and classification in very large image datasets. We also show that the statistical properties of these descriptors are governed by the principles of the Extreme Value Theory (EVT). This enables us to work directly with parametric probability distribution models, which offer a much lower dimensionality and higher resolution and flexibility than explore the connection to EVT and analyse the characteristics of these descriptors from a probabilistic viewpoint with the help of large image databases.

    Download full text (pdf)
    scia2011
  • 1204.
    Zulkifl, Saad
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Frame rate limiter for export restricted cameras2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This master thesis describes the design of a low power and low noise CMOS circuit capable of limiting 9 frames per second. This is a part of a larger ongoing project for development and design of a low-cost IR night-vision network camera. This circuit is implemented in 0.35μm process. An RC-oscillator with voltage averaging feedback concept is used as timing reference which is capable of overcoming ± 20% of frequency variations.

    The circuit consumes 85 μW power when enabled and 1.853 μW power when disabled. This circuit design allows 9 frames per second. The variation in frequency due to a temperature range of -40°C to 100°C is within ±2.5% and for voltage range of 3.2V to 3.6V is within ±1%.

    Download full text (pdf)
    fulltext
  • 1205.
    Åberg, Anders
    Linköping University, Department of Electrical Engineering.
    Visualisering av Flight Recorder-data i Saab 2000 avionikrigg2006Independent thesis Basic level (degree of Bachelor), 10 points / 15 hpStudent thesis
    Abstract [en]

    The main purpose of a Flight Data Recorder (FDR) is to facilitate the investigation of incidents. In order to interpret the data that has been recorded in the FDR the data has to be visualized in some way. This can be done with software on a computer or with hardware that is specific for the model of aircraft that the data originates from.

    The aim of this project is to visualize data for six parameters from the FDR of Saab 2000 in an avionics rig. The avionics rig resembles the cockpit of Saab 2000 and the displays in it are identical to the ones found in the plane. All six parameters are shown on the same display.

    Due to safety regulation vital systems in aircraft are doubled, with one system on the left side and one on the right. Because of the architecture of the rig it was decided that data from the right-hand side systems were to be visualized on the right-hand side display. It is not possible to guarantee that no incorrect values are shown for the parameter altitude when values are taken from the right-hand side, but it can be done for values from the left side. This is the reason why values are taken from the left-hand side for altitude. In the rig a computer with an ARINC429-card and the software Data Bus Analyzer was accessible to transmit data to the displays. DBA can save received data in ASCII-files and also open and transmit the data in such files. Data that has been extracted from an FDR can be converted to the format which DBA can read with macros that have been written in the project. After conversion the data can be transmitted to the display on which it is supposed to be visualized.

    Download full text (pdf)
    FULLTEXT01
  • 1206.
    Åkerman, Markus
    Linköping University, Department of Electrical Engineering.
    Implementation of a Zero Aware SRAM Cell for a Low Power RAM Generator2005Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    In this work, an existing generator for layout of Static Random Access Memory (SRAM) is improved. The tool is completed with a block decoder, which was missing when the thesis started. A feature of generating schematic files is also added. The schematics are important to get a better overview, to test parts properly, and enable Layout versus Schematics (LVS) checks.

    The main focus of this thesis work is to implement and evaluate a new SRAM cell, called Zero Aware Asymmetric SRAM cell. This cell saves major power when zeros are stored. Furthermore the pull-up circuit is modified to be less power consuming. Other parts are also modified to fit the new memory cell.

    Several minor flaws are corrected in the layout generator. It does still not produce a complete memory without manual interventions, but it does at least create all parts with one command. Several tests, including Design Rule Checks (DRC) and LVS checks, are carried out both on minor and larger parts. Development of documentation that makes it easier for users and developers to use and understand the tool is initiated.

    Download full text (pdf)
    FULLTEXT01
  • 1207.
    Åslund, Anders
    Linköping University, Department of Electrical Engineering.
    Power Estimation of High Speed Bit-Parallel Adders2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared.

    Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughput does not reach as high as the maximal throughput of the Kogge-Stone parallel prefix adder.

    Download full text (pdf)
    FULLTEXT01
  • 1208.
    Ívarsson, Ottó Már
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Comparator Kickback Reduction Techniques for High-Speed ADCs2024Independent thesis Advanced level (degree of Master (Two Years)), 28 HE creditsStudent thesis
    Download full text (pdf)
    fulltext
  • 1209.
    Öberg, Anders
    Linköping University, Department of Electrical Engineering.
    Implementering av ISOBUS Virtual Terminal på fordonsdatorn CCP XS2005Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    Modern agriculture equipment are more computer based today, and many equipments use a terminal in the tractor where the driver have the opportunity to make adjustments to the equipment. This is the reason why ISO developed a new standard called ISOBUS. It is a communication standard based on CAN specially adapted for griculture equipments. The purpose of the standard is that it should be ossible to equip a tractor with a standard terminal called Virtual Terminal that can be used to control the equipment. The use of the terminal should be independent of the manufacturer of the tractor as well as of the equipment.

    The purpose of this report is to find a solution of how to use CC Systems on-board computer, CCP XS, as a Virtual Terminal. In the report both Hardware and Software requirements have been examined, but mainly the software requirements. Only one suitable software vendor, Vector Informatik, was found after contacts with different software suppliers. It have not been possible to test this package because of the high price for the evaluation license.

    A demonstration solution has also been developed in the project. It consists of a simulator program, that runs on a PC, connected to a CPP XS that executes a Virtual Terminal program. An ISOBUS compatible J1939 protocol stack from Ixxat Automation has been integrated in the Virtual Terminal program. It gives the opportunity to test the protocol stack on a CPP XS. In order to limit the size of the project, not all functions in the ISOBUS standard is implemented in the demonstration solution.

    Download full text (pdf)
    FULLTEXT01
  • 1210.
    Öberg, Eric
    et al.
    Linköping University, Faculty of Science & Engineering. Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Kindeskog, Gustav
    Linköping University, Faculty of Science & Engineering. Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    16 GS/s Continuous-Time ΣΔ Modulator in a 22 nm SOI Process: a Simulation and Feasibility Study2018Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    With a reference specification model in terms of 8 GS/s Sigma Delta Modulator in a 28 nm CMOS process consuming 890 mW, the purpose with this thesis is to construct a similar and simpler model but with higher specification demands. In a 22 nm SOI process with an input signal bandwidth of 500 MHz sampled at 16 GS/s with a power consumption below 2 W, the objective is to design a Continuous-Time Sigma Delta Modulator with verified simulated functionality on a transistor level basis. This specification is accomplished - with a power consumption in total of 75 mW.

    The design methodology is divided into an integrator part along with a quantizer and feedback DAC part. A top-down strategy is carried out starting with an ideal high level Verilog-A model for the complete system, followed by a hardware implementation on transistor level.

    Download full text (pdf)
    16GSs_CT_SDM
  • 1211.
    Öberg, Eric
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Stapar, Stefan
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Termistor för väderforskning2016Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [sv]

    Genom att fästa elektronik i en heliumballong som stiger och kommunicerar med en mottagare på marknivå är det möjligt att utföra mätningar högre upp i höjd på temperatur, luftfuktighet och vindar. På detta sätt kan det förutses väderprognoser som kan användas i flygbranschen eller vid känsliga världsdelar för att varna inför miljökatastrofer. Utveckling av en produkt som mäter på temperaturer och som kan användas professionellt i olika arbetsområden och sammanhang kräver en temperatursensor med hög noggrannhet och känslighet samt låg effektkonsumtion. För det här syftet är en termistor en lämplig sensor med högkänsliga egenskaper. Optimering av produkten kräver en integrering av termistorn med elektronik på ett kretskort där fokus ligger på noggrannhet, snabb responstid, lågt pris, minimal storlek och vikt.

    En termistor fungerar på så sätt att den ändrar resistans beroende på vilken yttre/inre temperatur den utsätts för. Vid låga temperaturer är resistansen hög och vid höga temperaturer blir resistansen låg. Kretskort som designas på olika sätt med termistorer och tillhörande nödvändig elektronik behöver utvärderas för att avgöra vilken prototyp som är bäst lämpad för temperaturmätningar i atmosfären. Problem som uppstår med termistorn som sådan är självuppvärmning, och sker när för stor ström går igenom termistorn vilket resulterar i intern uppvärmning hos komponenten som i sin tur påverkar mätningar på temperaturer. Förebyggning av denna felfaktor kräver att termistorn kombineras med komponenter för att få en linjär kalibrerad utspänning för vidare signalbehandling.

    Processen vid framställning av kretskort består av utvärdering för val av komponenter, simuleringar, beräkningar och slutligen hårdvarulayouts. Med färdiga designer kan tester utföras på kretskortsmodeller med hjälp av en spänningskälla som matar kortet med spänning och en multimeter som mäter utsignalen. För att utsätta termistorn för temperaturer används en apparat som värmer upp den, alternativt t.ex. is som kyler ner den. För referensvärden på temperaturmätningar används en värmekamera pekandes mot komponenten. Utsignalen från mätningarna består av analoga spänningsvärden, och de skickas vidare till en mikrokontroller som är synkroniserad med en dator. I mikrokontrollern kan signalen digitaliseras och sedan läsas av på en dataskärm.

    Download full text (pdf)
    fulltext
  • 1212. Order onlineBuy this publication >>
    Öberg, Lasse
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Efficient Flooding Protocols and Energy Models for Wireless Sensor Networks2007Licentiate thesis, monograph (Other academic)
    Abstract [en]

    Wireless sensor networks are emerging from the mobile ad hoc network concept and as such they share many similarities. However, it is not the similarities that differentiates sensor networks from their ad hoc counterparts, it is the differences. One of the most important difference is that they should operate unattended for long periods of time. This is especially important since they usually rely on a finite energy source to function. To get this into a perspective, a sensor network constitutes of a sensor field where a number of sensor nodes are deployed. The sensor nodes relay the gathered information to a base station from which the data are forwarded either through a network or directly to the enduser. The communication between sensor nodes are conducted in an ad hoc manner, which means that paths toward the base station are dynamically constructed based on current network conditions. The network conditions changes and examples of this includes node failure, deactivated nodes, variations in the radio channel characteristics, etc.

    As mentioned above, the sensor nodes are energy constrained and one of the more important design criteria is the life time of a sensor node or network. To be able to evaluate this criteria an energy dissipation model is needed. Most of the energy dissipation models developed for wireless sensor networks are not based on the basic sensor node architecture and as such they where not accurate enough for our needs. Thus, an energy dissipation model was developed. This model utilises the basic sensor node architecture to obtain the operation states available and their corresponding state transitions.

    Communication is the most energy consuming task a sensor node can undertake. As such, the contributed energy dissipation model is used to evaluate this aspect of the proposed controlled flooding protocols. Generally, the controlled flooding protocols tries to minimise the number of forwarding nodes and by doing this they lower the energy consumed in the network. Along with this, the communication overhead of a protocol also needs to be taken into account. Our idea is to utilise the received signal strength directly to make forwarding decisions based on a cost function. This idea has a number of key features, which are: no additional overhead in the message, no neighbour knowledge and no location information are needed. The results from the proposed flooding protocols are promising as they have a lower number of forwarding nodes and a longer lifetime than the

    others.

    Download full text (pdf)
    FULLTEXT01
    Download (pdf)
    COVER01
  • 1213.
    Öhman, Andreas
    et al.
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Jonsson, Oskar
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Simulering och implementering av ett elektriskt motorsystem för minimering av hastighetvariationer2018Independent thesis Basic level (university diploma), 10 credits / 15 HE creditsStudent thesis
    Abstract [sv]

    Syftet med examensarbetet är att utse en lämplig ersättare för en motor i en av Saab Dynamics produkter. Den tidigare motorn är en synkronmotor av typen hysteresmotor och nu söks en billigare lösning med liknande prestanda. Applikationen kräver att motorn från stillastående ska kunna accelereras till 600 varv per minut på maximalt 0,5 sekunder. Efter 0,5 sekunder ska medelhastigheten per varv maximalt avvika med 0,2 promille. I utveckling av en ny lösning ingår val av motortyp, styrelektronik och givare samt design av regleralgoritmer. I rapporten beskrivs ett antal motorer som kan vara lämpliga ersättare till den tidigare motorn samt deras styrkor och svagheter. Sedan följer en undersökning och implementation av en av de lämpliga kandidaterna, en borstlös likströmsmotor. Val av givare och styrteknik för den motortypen beskrivs och motorns lämplighet undersöks i en modell skapad i Mathworks Simulinkmiljö där ett reglersystem implementeras. Simuleringar visa att den valda motorn är lämplig för en praktisk implementation. Slutligen beskrivs konstruktionen av en testuppställning som innefattar motor, givare och styrteknik implementerad i en processor som ställer ut strömmen till motorn för att uppnå önskad hastighet. Uppställningen uppfyller kravet i testkörningar och i den bästa körningen är hastighetsvariationerna 7,4 gånger mindre än det specificerade kravet.

    Download full text (pdf)
    fulltext
  • 1214.
    Öhman, Fredrik
    Linköping University, Department of Electrical Engineering.
    Modulgenerator för Matchade Transistorpar2005Independent thesis Basic level (professional degree)Student thesis
    Abstract [sv]

    Detta examensarbete syftar till att implementera en modulgenerator som automatiskt genererar ett matchat differentialpar. Detta för att enkelt kunna generera detta vanlig förekommande byggblock utan att behöva rita om allt från grunden.

    Modulgeneratorn som konstruerats klarar att skapa upp till 2x2 transistor block matchad layout med eller utan sköld. Programmet skapar med hjälp av indata från konstruktören en skräddarsydd layout som kan användas som byggblock i integrerade kretsar.

    Examensarbetet är slutfört och har genomgått omfattande testning

    The aim of this thesis is to implement a module generator that automatically generates a matched differential pair. That is, to easily create new pairs without having to draw everything from scratch.

    The module generator is able to create matched layouts with up to 2x2 transistor blocks with or without a guard-ring. The program uses a number of input parameters from the user to customize the layout. Hence, the generated blocks can be used in a large range of analog integrated circuits.

    Download full text (pdf)
    FULLTEXT01
  • 1215.
    Öresjö, Per
    Linköping University, Department of Electrical Engineering.
    A High Speed Sigma Delta A/D-Converter for a General Purpose RF Front End in 90nm-Technology2007Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    In this report a transistor-level design of a GHz Sigma-Delta analog-to-digital converter for an RF front end is proposed. The design is current driven, where the integration is done directly over two capacitances and it contains no operational amplifiers.

    The clock frequency used for verification was 2.5 GHz and the output band-width was 10 MHz. The system is flexible in that the number of internal bits can be scaled easily and in this report a three-bit system yielding an SNR of 76.5 dB as well as a four-bit system yielding an SNR of 82.5 dB are analyzed.

    Download full text (pdf)
    FULLTEXT01
  • 1216.
    Östberg, Gustav
    Linköping University, Department of Electrical Engineering.
    A Comparative Study of Efficient Power Amplifiers in CMOS2008Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    During later years communication schemes for handheld devices have increased in complexity due to the desire to increase the throughput, i.e. the amount of information sent over a medium simultaneously. Increasing throughput can be accomplished, not only by modulating the phase or frequency, but also the amplitude. This leads to tougher requirements on the power amplifier. The conventional power amplifiers, which have the ability to follow the envelope of the carrier, are inefficient. This thesis aims to compare two old but revived architectures which exploit high-efficiency amplifiers and still have a linear relationship between the input and output. The architectures; the Polar Linearization Technique and Outphasing share the same foundation. Based on literature, the polar technique have been more successful of employing examples fufilling communication standards. The polar technique is also more versatile regarding power combiners, distortion correction and alternative implementations. The simulations performed in this thesis results show that the polar amplifier is less sensitive to process variations and has higher maximum efficiency. On the other hand, the outphasing topology have the highest linearity figures.

    Download full text (pdf)
    FULLTEXT01
  • 1217.
    Östman, Christian
    et al.
    Linköping University. Linköping University, Department of Electrical Engineering.
    Forsberg, Anna
    Linköping University. Linköping University, Department of Electrical Engineering.
    Support System for Landing with an Autonomous Unmanned Aerial Vehicle2009Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    There are a number of ongoing projects developing autonomous vehicles, both helicopters and airplanes. The purpose of this thesis is to study a concept for calculating the height and attitude of a helicopter. The system will be active during landing. This thesis includes building an experimental setup and to develop algorithms and software.

    The basic idea is to illuminate the ground with a certain pattern and in our case we used laser pointers to create this pattern. The ground is then filmed and the images are processed to extract the pattern. This provides us with information about the height and attitude of the helicopter. Furthermore, the concept implies that no equipment on the ground is needed. With further development the sensor should be able to calculate the movement of the underlying surface relative to the helicopter. This is very important when landing on a moving surface, e.g. a ship at sea.

    To study the concept empirically an experimental setup was constructed. The setup provides us with the necessary information to evaluate how well the system could perform in reality. The setup is built with simple and cheap materials. In the setup an ordinary web camera and laser pointers that are avaliable for everyone have been used.

    Download full text (pdf)
    FULLTEXT01
22232425 1201 - 1217 of 1217
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf