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  • 251.
    Dacheng, Chen
    Linköping University, Department of Electrical Engineering.
    VHDL Implementation of a Fast Adder Tree2005Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    This thesis discusses the design and implementation of a VHDL generator for Wallace tree with (3:2) counter modules and (2:2) counter modules to solve fast addition problem.

    The basic research has been carried out by MATLAB programming environment and automatic generation of VHDL file based on the result obtained from MATLAB simulation. MODELSIM has been used for compilation and simulation of the VHDL file.

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  • 252.
    Dagne, Carl
    Linköping University, Department of Electrical Engineering.
    Implementering av tillståndsmaskiner med PRBS2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Finite state machines are common components in digital designs. A common type of finite state machine is a counter. Counters are often quite expensive to implement, with respect to the number of gates. To reduce this cost, a PRBS (Pseudo Random Binary Sequence) can be used. It is constructed of a register where a xor - operation is performed between two positions, which depend on the length of the register. The result from this operation is then shifted back into the register yielding a random-like sequence. The numbers are not random, but can always be predicted. In this thesis work finite state machine using PRBS are designed in MatLab. Three different programs have been written to calculate the costs for implementation of a PRBS.

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  • 253.
    Dahl, Emil
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    MOSFET Packaging for Low Voltage DC/DC Converter: Comparing embedded PCB packaging to newly developed packaging2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis studies the options of using PCB embedding bare die power MOSFET and new packaging of MOSFET to increase the power density in a PCB. This is to decrease the winding losses in an isolated DC/DC converter which, according to "Flex Power Modules", can be done by improving the interleaving between the layers of the transformer and/or decreasing the AC loop. To test the MOSFET packaging two layout are made from a reference PCB, one using embedded MOSFET and the other using the new packaging. The leakage induction and winding losses are simulated and if they are lower compared to the reference PCB prototypes are manufactured. The simulated result is that PCB embedded MOSFET decrease the leakage induction but the winding loss is higher. With the new packaging the leakage induction is higher and the winding loss has linear characteristics. Only the PCB with the new MOSFET packaging is made because the MOSFET die gate pad is too small for the PCB manufacturer to make a via connection to it. The PCB is tested that it operates as a DC/DC converter with a 40-60 V input and a 12 V output. The PCB is put on a test board in a wind-tunnel to test its characteristics under different wind speeds, input voltage and loads. The result is that the PCB has a higher efficiency than the reference PCB but it has worse thermal resistance. Further development of the design needs to be made to improve the thermal resistance. Using new packaging is a way to continue the development of power converter with lower efficiency but embedding MOSFET needs a less complicated manufacturing process before there is any widespread usage.

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  • 254.
    Dahl, Ken
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Thermal Modelling of Permanent Magnet Synchronous Motor Windings in Heavy-Duty Electric Vehicles2023Independent thesis Advanced level (degree of Master (Two Years)), 28 HE creditsStudent thesis
    Abstract [en]

    A significant challenge with permanent magnet synchronous motors (PMSMs) is thermal management. Thermal stress can lead to irreversible damage to components, and to enable efficient cooling, a thermal model is needed. In this thesis paper, methods for estimating the hot spot temperature of the windings in PMSMs used in heavy-duty EVs are investigated. The methods include black-box models and lumped parameter thermal network-based models. The results reveal that the implemented models are not sufficient for achieving the desired accuracy, and indicate that more parts of the windings need to be considered.

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  • 255.
    Dahlbäck, Magnus
    Linköping University, Department of Electrical Engineering.
    Implementation and Evaluation of a RF Receiver Architecture Using an Undersampling Track-and-Hold Circuit2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Today's radio frequency receivers for digital wireless communication are getting more and more complex. A single receiver unit should support multiple bands, have a wide bandwidth, be flexible and show good performance. To fulfil these requirements, new receiver architectures have to be developed and used. One possible alternative is the RF undersampling architecture.

    This thesis evaluates the RF undersampling architecture, which make use of an undersampling track-and-hold circuit with very wide bandwidth to perform direct sampling of the RF carrier before the analogue-to-digital converter. The architecture’s main advantages and drawbacks are identified and analyzed. Also, techniques and improvements to solve or reduce the main problems of the RF undersampling receiver are proposed.

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  • 256.
    Dahlqvist, Michael
    et al.
    Linköping University, Department of Electrical Engineering.
    Röst, Andreas
    Linköping University, Department of Electrical Engineering.
    Modulgenerator för generering av Brent Kung-adderare2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    To speed up the addition of numbers, which is a vital part of signal processing there are different types of algorithms. One of those algorithms is the Brent Kung-adder, which has a time delay proportional to log2(N).

    In the report comparison of different adders has been done, taking into account grind-depth which is proportional to the propagation time. A module generator for the Brent Kung adder is implemented with skill-code in the program Cadence. The module generator can generate adders of infinite word length and is independent of the technology used. The physical limitations of Brent Kung adders are being studied and proposals for improvements are given in the report.

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  • 257.
    Dahlström, Patrik
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Geo-based Mobility Control for Mobile Traffic Simulators2013Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Most mobile traffic simulators of today depend on the user to supply the mobility behavior of the simulated UEs. This becomes a problem when certain wanted mobility characteristics are to be tested, since the user have to go trough a trial-and-error procedure to come up with the proper mobility behavior. This thesis presents two approaches to mobility control, where the aim is to control UE mobility based on certain mobility characteristics supplied by the end user.

    The first approach introduces the concept of assigning tasks to UEs, e.g. “cross cell border” or “move to a certain cell”. Furthermore, concepts from control theory are borrowed to control the task assignment process, making it more dynamic and robust.

    The second approach iteratively calculate movement patterns for the UEs in an area until it finds a movement pattern that has a high probability of satisfying the user’s requested mobility characteristics.

    In order to properly evaluate these two approaches a prototype simulator was developed, as well as a virtual network controller to be tested. This test environment simulate a simplified tree network topology.

    Both approaches was tested to control the total number of handovers per second in a simulated area. They both show high accuracy and acceptable precision. Additionally, the task based approach was used to control the cell utilization in a target cell. However, the cell utilization tests showed a lower accuracy and precision than the handover rate control tests.

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  • 258.
    Dahm, Rickard
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Autotuning of RPM controller2013Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Under detta projekt som utfördes på Scania CV AB undersöktes möjligheten att använda sig av en adaptiv regulator för att reglera motorvarvtalet på en lastbilsmotor som driver utrustning via ett kraftuttag. Fördelen med att använda sig av adaptiv reglering istället för den parameterstyrda PID reglering som används idag är att regulatorn kan klara av fler utrustningstyper. Dagens regulator kan få problem vid stora belastningsmoment eller tröghetsmoment. Detta kan lösas med adaptiv reglering.

    I rapporten presenteras en modellbaserad regulator som använder systemets tröghetsmoment. Då systemets tröghetsmoment är okänt ges även förslag på hur detta skulle kunna estimeras. Den modellbaserade regulatorn visar sig vara mycket effektiv då skattningen av tröghetsmomentet lyckas. Det Kalmanfilter som designats för att estimera systemet fungerar dock ej för alla önskvärda fall och en fortsatt studie på hur denna design ska se ut krävs innan regulatorn testas på ett verkligt system.

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  • 259.
    Dai, Jianxing
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Analysis and Design of a High-Frequency RC Oscillator Suitable for Mass Production2017Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Oscillators are components providing clock signals. They are widely required by low-cost on-chip applications, such as biometric sensors and SoCs. As part of a sensor, a relaxation oscillator is implemented to provide a clock reference. Limited by the sensor application, a clock reference outside the sensor is not desired. An RC implementation of the oscillator has a balanced accuracy performance with low-cost advantage. Hence an RC relaxation oscillator is chosen to provide the clock inside the sensor.

    This thesis proposes a current mode relaxation oscillator to achieve low frequency standard deviation across different supplies, temperatures and process corners. A comparison between a given relaxation oscillator and the proposed design is made as well. All oscillators in this thesis use 0.18 μm technology and 1.8 V nominal supply. The proposed oscillator manages to achieve a frequency standard deviation across all PVT variations less than ±6.5% at 78.4 MHz output frequency with a power dissipation of 461.2 μW. The layout of the oscillator's core area takes up 0.003 mm2.

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  • 260.
    Danielsson, M.
    et al.
    Royal Institute of Technology, AlbaNova University Center.
    Bornefalk, H.
    Royal Institute of Technology, AlbaNova University Center.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices.
    Improving image quality in photon counting-mode detector systems2012Patent (Other (popular science, discussion, etc.))
  • 261.
    Danielsson, Per-Erik
    Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
    Implementations of the Convolution Operation1982Report (Other academic)
    Abstract [en]

    The first part of this article surveys a large number of implementations of the convolution operation (which is also known as the sum-of-products, the inner product) based on a systematic exploration of index permutations. First we assume a limited amount of parallelism in the form of an adder. Next, multipliers and RAM:s are utilized. The so called distributed arithmetic follows naturally from this approach.

    The second part brings in the concept of pipelining on the bitlevel to obtain high throughput convolvers adapted for VLSI-design (systolic arrays). The serial/parallel multiplier is analyzed in a way that unravels a vast amount new variations. Even more interesting, all these new variations can be carried over to serial/parallel convolvers. These novel devices can be implemented as linear structures of identical cells where the multipliers are embedded at equidistant intervals.

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    Implementations of the Convolution Operation
  • 262.
    Daqaq, Fatima
    et al.
    Mohammed V Univ Rabat, Morocco.
    Hassan, Mohamed H.
    Minist Elect & Renewable Energy, Egypt.
    Kamel, Salah
    Aswan Univ, Egypt.
    Hussien, Abdelazim
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering. Fayoum Univ, Egypt; Middle East Univ, Jordan.
    A leader supply-demand-based optimization for large scale optimal power flow problem considering renewable energy generations2023In: Scientific Reports, E-ISSN 2045-2322, Vol. 13, no 1, article id 14591Article in journal (Refereed)
    Abstract [en]

    The supply-demand-based optimization (SDO) is among the recent stochastic approaches that have proven its capability in solving challenging engineering tasks. Owing to the non-linearity and complexity of the real-world IEEE optimal power flow (OPF) in modern power system issues and like the existing algorithms, the SDO optimizer necessitates some enhancement to satisfy the required OPF characteristics integrating hybrid wind and solar powers. Thus, a SDO variant namely leader supply-demand-based optimization (LSDO) is proposed in this research. The LSDO is suggested to improve the exploration based on the simultaneous crossover and mutation mechanisms and thereby reduce the probability of trapping in local optima. The LSDO effectiveness has been first tested on 23 benchmark functions and has been assessed through a comparison with well-regarded state-of-the-art competitors. Afterward, Three well-known constrained IEEE 30, 57, and 118-bus test systems incorporating both wind and solar power sources were investigated in order to authenticate the performance of the LSDO considering a constraint handling technique called superiority of feasible solutions (SF). The statistical outcomes reveal that the LSDO offers promising competitive results not only for its first version but also for the other competitors.

  • 263.
    Debela, Ahmed M.
    et al.
    UPMC Univ Paris 06, France.
    Ortiz, Mayreli
    Univ Rovira and Virgili, Spain.
    Beni, Valerio
    Linköping University, Department of Science and Technology. Linköping University, Faculty of Science & Engineering. Res Inst Sweden, Sweden.
    Lesage, Denis
    UPMC Univ Paris 06, France.
    Cole, Richard
    UPMC Univ Paris 06, France.
    OSullivan, Ciara K.
    Univ Rovira and Virgili, Spain; Inst Catalana Recerca and Estudis Avancats, Spain.
    Thorimbert, Serge
    UPMC Univ Paris 06, France.
    Hasenknopf, Bernold
    UPMC Univ Paris 06, France.
    Functionalized Deoxynucleotides and DNA Primers for Electrochemical Diagnostics of Disease Predispostions2017In: SELECTED PROCEEDINGS FROM THE 231ST ECS MEETING, ELECTROCHEMICAL SOC INC , 2017, Vol. 77, no 11, p. 1873-1883Conference paper (Refereed)
    Abstract [en]

    Redox labeled DNAs are of increasing interest for the fabrication of next generation molecular tools. In the present work we are investigating the use of various redox labeled dNTPs, ddNTPs and DNA primers for use in detection of diseases. We have reported the use of Polyoxometalate (POM) labeled DNA primers and dNTPs for use in PCR and subsequently used for direct electrochemical detection of PCR products. The use of POM labeled DNAs in PCR enabled us to check the compatibility with polymerases and PCR incorporability of the modified DNAs. Furthermore we have investigated the solid-phase array based primer extension (e-PEX) with redox labelled ddNTPs (ferrocene (Fc), anthraquinone (AQ) phenothiazine (PTZ) and methylene blue (MB)) to prove the strategy of detection of single nucleotide polymorphisms using the labeled ddNTPs. This strategy will allow the development of cost-effective, rapid and user-friendly platform for the screening of known and unknown genetic mutations.

  • 264.
    Delavari, Najmeh
    et al.
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Tybrandt, Klas
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Berggren, Magnus
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Piro, Benoit
    Univ Paris, France.
    Noel, Vincent
    Univ Paris, France.
    Mattana, Giorgio
    Univ Paris, France.
    Zozoulenko, Igor
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Nernst-Planck-Poisson analysis of electrolyte-gated organic field-effect transistors2021In: Journal of Physics D: Applied Physics, ISSN 0022-3727, E-ISSN 1361-6463, Vol. 54, no 41, article id 415101Article in journal (Refereed)
    Abstract [en]

    Electrolyte-gated organic field-effect transistors (EGOFETs) represent a class of organic thin-film transistors suited for sensing and biosensing in aqueous media, often at physiological conditions. The EGOFET device includes electrodes and an organic semiconductor channel in direct contact with an electrolyte. Upon operation, electric double layers are formed along the gate-electrolyte and the channel-electrolyte interfaces, but ions do not penetrate the channel. This mode of operation allows the EGOFET devices to run at low voltages and at a speed corresponding to the rate of forming electric double layers. Currently, there is a lack of a detailed quantitative model of the EGOFETs that can predict device performance based on geometry and material parameters. In the present paper, for the first time, an EGOFET model is proposed utilizing the Nernst-Planck-Poisson equations to describe, on equal footing, both the polymer and the electrolyte regions of the device configuration. The generated calculations exhibit semi-qualitative agreement with experimentally measured output and transfer curves.

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  • 265.
    Dell'Amico, Alessandro
    et al.
    Linköping University, Department of Management and Engineering, Fluid and Mechatronic Systems. Linköping University, The Institute of Technology.
    Krus, Petter
    Linköping University, Department of Management and Engineering, Fluid and Mechatronic Systems. Linköping University, The Institute of Technology.
    Modeling, Simulation, and Experimental Investigation of an Electrohydraulic Closed-Center Power Steering System2015In: IEEE/ASME transactions on mechatronics, ISSN 1083-4435, E-ISSN 1941-014X, Vol. 20, no 5, p. 2452-2462Article in journal (Refereed)
    Abstract [en]

    In steering-related active safety systems, active steering is a key component. Active steering refers to the possibility to control the road wheel angle or the required torque to turn the wheels by means of an electronic signal. Due to the high axle loads in heavy vehicles, hydraulic power is needed to assist the driver in turning the wheels. One solution to realize active steering is, then, to use electronically controlled valves that are of closed-center type. This means that the assistance pressure, or force, can  be set to any feasible value and still benefit from the high power density of fluid power systems. A closed-center solution also implies that a significant reduction in fuel consumption is possible. This paper investigates such an electrohydraulic power steering system, and a comparison with the original system is also made. The findings have shown that while a high response of the pressure control loop is desired for a good steering feel, instability might occur at higher steering wheel torque levels. This has effectively been shown and explained by simulation and hardware-in-the-loop simulation, together with linear analysis. For any desired boost curve, the response of the pressure control loop must be designed to preserve stability over the entire working range.

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  • 266.
    Dheilly, Nicolas
    et al.
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Planson, Dominique
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Brosselard, Pierre
    Centro Nacional de Microelectrónica, Campus UAB, Bellaterra, Spain.
    Hassan, Jawad
    Linköping University, Department of Physics, Chemistry and Biology, Semiconductor Materials. Linköping University, Faculty of Science & Engineering.
    Bevilacqua, Pascal
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Tournier, Dominique
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Montserrat, Josep
    Centro Nacional de Microelectrónica, Campus UAB, Bellaterra, Spain.
    Raynaud, Christophe
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Morel, Hervé
    Université de Lyon, INSA-Lyon, Ampere UMR5005, Villeurbanne, France.
    Measurement of Carrier Lifetime Temperature Dependence in 3.3kV 4H-SiC PiN Diodes Using OCVD Technique2009In: Silicon Carbide and Related Materials 2008, Trans Tech Publications Ltd , 2009, Vol. 615, p. 703-706Conference paper (Refereed)
    Abstract [en]

    This paper reports on the influence of temperature on the electrical carrier lifetime of a 3.3 kV 4H-SiC PiN diode processed with a new generation of SiC material. The Open Circuit Voltage Decay (OCVD) is used to evaluate ambipolar lifetime evolution versus temperature. The paper presents a description of the setup, electrical measurements and extraction fittings. The ambipolar lifetime is found to rise from 600 ns at 30 °C to 3.5 μs at 150 °C.

  • 267.
    Di Orio, Giovanni
    et al.
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Rocha, Andre
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Ribeiro, Luis
    Linköping University, Department of Management and Engineering, Manufacturing Engineering. Linköping University, Faculty of Science & Engineering.
    Barata, Jose
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    The PRIME Semantic Language: Plug and Produce in Standard- based Manufacturing Production Systems2015In: Proceedings of the Flexible Automation and Intelligent Manufacturing Conference, 2015Conference paper (Other academic)
    Abstract [en]

    Nowadays manufacturing production systems are becoming more and more responsive in order to succeed in ahighly unstable environment. The capability of a production system to effectively and efficiently adapt and evolveto face the changing requirements – imposed by volatile and dynamic global markets – is a necessary conditionto enable manufacturing enterprises to be agile. Since the agility of a manufacturing enterprise is always limitedby the agility of its own building blocks than it needs to be spread over the whole enterprise including the operationand information technologies (OT/IT). Turning to production systems, one of the significant challenges isrepresented by the possibility to provide easy and rapid (re-)configuration of their internal components and/orprocesses. Innovative technologies and paradigms have been explored during the years that combined with theincreasing advancement in manufacturing technologies enable the implementation of the “plug and produce”paradigm. The “plug and produce” paradigm is the foundation of any agile production system, since to be agile itis inevitably required to reduce the installation and (re-)engineering activities time – changing/adapting the systemto new requirements – while promoting configuration rather than programming. Therefore, the “plug andproduce” paradigm is a necessary but not sufficient condition for implementing agile production systems. Modernproduction systems are typically known for their plethora of heterogeneous component/equipment. In this complexscenario, the implementation of the “plug and produce” paradigm implies the existence of a well-definedontological model to support components/equipment abstraction with the objective to allow interactions,collaboration and knowledge sharing between them. The PRIME semantic language specifies the semanticstructure for the knowledge models and overall system communication language.

  • 268.
    Diacci, Chiara
    et al.
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering. Univ Modena & Reggio Emilia, Italy.
    Abedi, Tayebeh
    Swedish Univ Agr Sci, Sweden.
    Lee, Jee Woong
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Gabrielsson, Erik
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Berggren, Magnus
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Simon, Daniel
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Niittyla, Totte
    Swedish Univ Agr Sci, Sweden.
    Stavrinidou, Eleni
    Linköping University, Department of Science and Technology, Laboratory of Organic Electronics. Linköping University, Faculty of Science & Engineering.
    Diurnal in vivo xylem sap glucose and sucrose monitoring using implantable organic electrochemical transistor sensors2021In: iScience, E-ISSN 2589-0042 , Vol. 24, no 1, article id 101966Article in journal (Refereed)
    Abstract [en]

    Bioelectronic devices that convert biochemical signals to electronic readout enable biosensing with high spatiotemporal resolution. These technologies have been primarily applied in biomedicine while in plants sensing is mainly based on invasive methods that require tissue sampling, hindering in-vivo detection and having poor spatiotemporal resolution. Here, we developed enzymatic biosensors based on organic electrochemical transistors (OECTs) for in-vivo and real-time monitoring of sugar fluctuations in the vascular tissue of trees. The glucose and sucrose OECT-biosensors were implanted into the vascular tissue of trees and were operated through a low-cost portable unit for 48hr. Our work consists a proof-of-concept study where implantable OECT-biosensors not only allow real-time monitoring of metabolites in plants but also reveal new insights into diurnal sugar homeostasis. We anticipate that this work will contribute to establishing bioelectronic technologies as powerful minimally invasive tools in plant science, agriculture and forestry.

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  • 269.
    Dida, Bashkim
    Linköping University, Department of Electrical Engineering.
    Automatiserad konstruktion av analoga förstärkare2005Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The last few decades the development in the field of electronics has been huge. The components performance gets better at the same time as the manufacturing cost decreases. Many of the design moments that have to be done, are done automatically today, but it can get better. Especially for analog circuit design.

    At Electronic System in Linköpings universitet, research is in progress to develop a tool that can design analog circuits in reasonable time. It means that it has to size the components (transistors, resistances, capacitances etc), so that the circuit can fulfill the performance requirements. An optimization method in conjunction with derived equations for the circuit performance is used to solve this task. The tool is created to design e.g. analog amplifiers. The goal is to decrease the design time and at the same time achieve better circuit performance.

    This tool has been tested on three different circuits, a power-amplifier, a Nested Miller Compensated amplifier with an active feedback (Active Nested Miller Compensation) and a Nested Miller Compensated amplifier without an active feedback (Nested Miller Compensation). In this report the results from the designing tests are presented.

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  • 270.
    Ding, Yang
    et al.
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Chen, Jingjie
    Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Wu, Qiong
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China.
    Fang, Bin
    Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Ji, Wenhui
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China.
    Li, Xin
    Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Yu, Changmin
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China.
    Wang, Xuchun
    Univ Sci & Technol Anhui, Peoples R China.
    Cheng, Xiamin
    Nanjing Tech Univ NanjingTech, Peoples R China.
    Yu, Hai-Dong
    Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Hu, Zhang-Jun
    Linköping University, Department of Physics, Chemistry and Biology, Molecular Surface Physics and Nano Science. Linköping University, Faculty of Science & Engineering.
    Uvdal, Kajsa
    Linköping University, Department of Physics, Chemistry and Biology, Molecular Surface Physics and Nano Science. Linköping University, Faculty of Science & Engineering.
    Li, Peng
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Li, Lin
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Xiamen Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Huang, Wei
    Nanjing Tech Univ NanjingTech, Peoples R China; Nanjing Tech Univ NanjingTech, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Xiamen Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China; Northwestern Polytech Univ, Peoples R China.
    Artificial intelligence-assisted point-of-care testing system for ultrafast and quantitative detection of drug-resistant bacteria2023In: SMARTMAT, ISSN 2766-8525Article in journal (Refereed)
    Abstract [en]

    As one of the major causes of antimicrobial resistance, beta-lactamase develops rapidly among bacteria. Detection of beta-lactamase in an efficient and low-cost point-of-care testing (POCT) way is urgently needed. However, due to the volatile environmental factors, the quantitative measurement of current POCT is often inaccurate. Herein, we demonstrate an artificial intelligence (AI)-assisted mobile health system that consists of a paper-based beta-lactamase fluorogenic probe analytical device and a smartphone-based AI cloud. An ultrafast broad-spectrum fluorogenic probe (B1) that could respond to beta-lactamase within 20 s was first synthesized, and the detection limit was determined to be 0.13 nmol/L. Meanwhile, a three-dimensional microfluidic paper-based analytical device was fabricated for integration of B1. Also, a smartphone-based AI cloud was developed to correct errors automatically and output results intelligently. This smart system could calibrate the temperature and pH in the beta-lactamase level detection in complex samples and mice infected with various bacteria, which shows the problem-solving ability in interdisciplinary research, and demonstrates potential clinical benefits.

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  • 271.
    Disqah, Arash
    et al.
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Maheri, Alireza
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Busawon, Krishna
    Faculty of Engineering and Environment, Northumbria University, Newcastle, UK.
    Fritzson, Peter
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, The Institute of Technology.
    Standalone DC Microgrids as Complementarity Dynamical Systems: Modeling and Applications.2015In: Control Engineering Practice, ISSN 0967-0661, Vol. 35, no 10, p. 102-112Article in journal (Refereed)
    Abstract [en]

    It is well known that, due to bimodal operation as well as existent discontinuous differential states of batteries, standalone microgrids belong to the class of hybrid dynamical systems of non-Filippov type. In this work, however, standalone microgrids are presented as complementarity systems (CSs) of the Filippov type which is then used to develop a multivariable nonlinear model predictive control (NMPC)-based load tracking strategy as well as Modelica models for long-term simulation purposes. The developed load tracker strategy is a multi-source maximum power point tracker (MPPT) that also regulates the DC bus voltage at its nominal value with the maximum of ±2.0% error despite substantial demand and supply variations.

  • 272.
    Diwakara, Vinod
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    EMC Pre-Compliance Testing and Development in PCB Design2021Independent thesis Advanced level (degree of Master (Two Years)), 80 credits / 120 HE creditsStudent thesis
    Abstract [en]

    Every electronics product should be electromagnetic compatible and adherence to appropriate standards for commercial success. Solar Bora, situated in Linköping, manufactures off-grid power systems with solar cell systems that deliver a high-power output of 230 VACclean and stable electricity. The energy stored in the batteries must be effectively transferred from DC to AC with the help of an inverter module. The current master’s thesis is about radiated emission testing on the controller printed circuit board which contributes to overall emissions in the inverter. EN-61000-6-3: Generic standards - Emission standards for residential, commercial, and light-industrial environments guide the testing procedure.When there are limited prototype runs and a short time to market, knowing and comprehending how different design factors affect EMC performance is critical. This thesis will look at how different layout design factors impact the converter’s radiated emissions. Radiated emissions testing in the frequency range 30 MHz - 1 GHz are the focus. Based on the findings, appropriate mitigation measures are implemented to minimize radiated emission; Altium Designer used in the new converter layout design. The new converter was put through the same emission test as per standard in the lab to ensure its functioning.

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  • 273.
    Doelman, Reinier
    et al.
    Delft Univ Technol, Netherlands.
    Klingspor, Måns
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Hansson, Anders
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Löfberg, Johan
    Linköping University, Department of Electrical Engineering, Automatic Control. Linköping University, Faculty of Science & Engineering.
    Verhaegen, Michel
    Delft Univ Technol, Netherlands.
    Identification of the dynamics of time-varying phase aberrations from time histories of the point-spread function2019In: Optical Society of America. Journal A: Optics, Image Science, and Vision, ISSN 1084-7529, E-ISSN 1520-8532, Vol. 36, no 5, p. 809-817Article in journal (Refereed)
    Abstract [en]

    To optimally compensate for time-varying phase aberrations with adaptive optics, a model of the dynamics of the aberrations is required to predict the phase aberration at the next time step. We model the time-varying behavior of a phase aberration, expressed in Zernike modes, by assuming that the temporal dynamics of the Zernike coefficients can be described by a vector-valued autoregressive (VAR) model. We propose an iterative method based on a convex heuristic for a rank-constrained optimization problem, to jointly estimate the parameters of the VAR model and the Zernike coefficients from a time series of measurements of the point-spread function (PSF) of the optical system. By assuming the phase aberration is small, the relation between aberration and PSF measurements can be approximated by a quadratic function. As such, our method is a blind identification method for linear dynamics in a stochastic Wiener system with a quadratic nonlinearity at the output and a phase retrieval method that uses a time-evolution-model constraint and a single image at every time step. (c) 2019 Optical Society of America.

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  • 274.
    Doudorov, Grigori
    Linköping University, Department of Electrical Engineering.
    Evaluation of Si-LDMOS transistors for RF Power Amplifier in 2-6 GHz frequency range2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    In this thesis the models of Si-LDMOS transistors have been investigated with Agilent EEsof ADS version 2002a for operation in the 2-6 GHz frequency range. The first one is the Motorola’s (MRF21010) model based on a 30 mm prototype of a Si-LDMOS transistor. The second one is a model based on a 1 mm prototype of Si-LDMOS transistor developed at Chalmers University. Large-signal simulations of Chalmers’ model have demonstrated results, which lead to the conclusion that,this model cannot be efficiently utilised for design for a PA in the 2-6 GHz frequency range. However, additional simulations with reduced Rd (drain losses) show the deep impact of this parameter on the main properties of the designed PA. Hence, it is important to take it into account during new processes of Si-LDMOS as well as to improve the CAD model. The final conclusion regarding Si-LDMOS cannot be made just based on these simulation results, since they are not in accordance with the published ones. The next step should be aimed at improving the model and further investigation of Si-LDMOS to prove their ability to operate in the 2-6 GHz frequency range.

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  • 275.
    Doñoro Martín, Julia
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Khaddour Basmaji, Mohamad
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Development of Abstract Microcontroller Peripheral2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
  • 276.
    Drougge, Max
    Linköping University, Department of Management and Engineering, Fluid and Mechatronic Systems.
    Spårning av rotorblad på UAV2016Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [sv]

    Arbetet gick ut på att utvärdera befintliga spårningsmetoder, utforma en procedur för spårning, ge förslag på lämplig utrustning och om tid fanns, testa konceptet. Arbetet skulle också dokumenteras så att krav, design och beslut kan förstås av någon som inte varit delaktig i arbetet. För att minska vibrationerna i UAV behöver rotorbladen spåras, det vill säga, rotorbladen ska befinna sig på samma höjd vid samma position i rotationen. Om spårningen inte är korrekt kan detta leda till oönskade vibrationer som kan vara farliga för UAV:er. I dagsläget används en metod som är väldigt tidskrävande. Metoden har heller inte speciellt god precision i mätningarna. För att komma fram med en ny spårningsmetod jämfördes olika metoder som används idag. Vilka krav som fanns på metoden, även kostnad och tid togs med vid utformandet. Spårningsmetoden som tagits fram innefattar en avståndsmätare som använder sig av ljus. Mätning sker på respektive rotorblad, därefter skickas data för behandling till en mikrokontroller. Resultatet blev ett nytt spårningskoncept med stor potential. Med mer utvecklingsarbete och testning skulle det kunna bli en egen produkt som kan till exepel säljas tillsammans med UAV eller helt separat. Examensarbetet har utförts hos företaget CybAero AB.

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  • 277.
    Dubois, Tobias
    Linköping University, Department of Computer and Information Science.
    Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO2007Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    NXP Semiconductors (formerly Philips Semiconductors) has created a new embedded asynchronous FIFO module. It is a small and fast full-custom design with Design-for-Test (DfT) functionality. The fault detection qualities of a proposed manufacturing test for this FIFO have been analyzed by a defect-based method based on analog simulation. Resistive bridges and opens of different sizes in the bit-cell matrix and in the asynchronous control have been investigated.

    The fault coverage for bridge defects in the bit-cell matrix of the initial FIFO test has been improved by inclusion of an additional data background and low-voltage testing. 100% fault coverage is reached for low resistance bridges. The fault coverage for opens has been improved by a new test procedure including waiting periods.

    98.4% of the hard bridge defects in the asynchronous control slices can be detected with some modifications of the initial test.

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  • 278.
    Duhan, Isac
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Design of Automated Generation of Residual Generators for Diagnosis  of Dynamic Systems2011Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Diagnosis and Supervision of technical systems is used to detect  faults when they occur. To make a diagnosis, tests based on residuals can be used. Residuals are used to compare observations of  the system with a model of the system, to detect inconsistencies.

    There are often many different types of faults which affects the  state of the system. These states are modeled as fault modes. The  difference between fault modes are the presence of faults in the  model. For each fault mode a different set of model equations is  used to describe the behaviour of the real system. When doing fault  diagnosis in real time it is good, and sometimes vital, to be able to change fault mode of the model, when a fault suddenly occurs in the real system. If multiple faults can occur the number of  combinations of faults is often so big, even for relatively small  systems, that residuals for all fault modes can not be prepared. To  handle this problem, the residuals are to be generated when they are  needed.

    The main task in this thesis has been to investigate how residuals  can be automatically generated, given a fault mode with a  corresponding model. An algorithm has been developed and to verify  the algorithm a model of a satellite power system, called  ADAPT-Lite, has been used. The algorithm has been made in two versions. One is focusing on numerical calculations and the other is  allowing algebraical calculations. A numerical algorithm is preferred in an automatized process because  of generally shorter calculation times and the possibility to apply it to systems which can not be solved algebraically but the  algebraical algorithm gives slightly more accurate results in some  cases.

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  • 279.
    Duman, Yusuf
    Linköping University, Department of Electrical Engineering.
    FIFO-kostruktion baserat på ett enkel-ports SRAM2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Previous implementations of FIFO-architectures has often been asynchronous FIFO-constructions. This method has some limitations in high speed systems. Instead synchronous FIFOs has more and more replaced asynchronous FIFOs.

    The synchronous architecture has the same features as the asynchronous but with advantages such as higher speed and simplified interface.

    In the report different types of FIFO-constructions has been studied and comparison between synchronous and asynchronous architectures has been done. The memory unit developed by ISY decided which FIFO-architecture that were best suited for the implementation.

    The implemented FIFO-memory arrange in- and outdataflow to a single-port SRAM memory containing 256 words with 16 bits per word.

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  • 280.
    Duong, Quoc Tai
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, Faculty of Science & Engineering.
    Qazi, Fahad
    Catena AB, Stockholm, Sweden .
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering. Linköping University, Faculty of Science & Engineering.
    Analysis and design of low noise transconductance amplifier for selective receiver front-end2015In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 85, no 2, p. 361-372Article in journal (Refereed)
    Abstract [en]

    Analysis and design of a low-noise transconductance amplifier (LNTA) aimed at selective current-mode (SAW-less) wideband receiver front-end is presented. The proposed LNTA uses double cross-coupling technique to reduce noise figure (NF), complementary derivative superposition, and resistive feedback to achieve high linearity and enhance input matching. The analysis of both NF and IIP3 using Volterra series is described in detail and verified by SpectreRF (A (R)) circuit simulation showing NF less than 2 dB and IIP3 = 18 dBm at 3 GHz. The amplifier performance is demonstrated in a two-stage highly selective receiver front-end implemented in 65 nm CMOS technology. In measurements the front-end achieves blocker rejection competitive to SAW filters with noise figure 3.2-5.2 dB, out of band IIP3 greater than+17 dBm and blocker P-1dB greater than+5 dBm over frequency range of 0.5-3 GHz.

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  • 281.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, The Institute of Technology.
    Low Noise Linear and Wideband Transconductance Amplifier Design for Current-mode Frontend2014Conference paper (Refereed)
    Abstract [en]

    A low-noise transconductance amplifier (LNTA) aimed at current-mode (Saw-less, Software-define radio) wideband receiver frontend is presented. In this application, the LNTA operates with a capacitive load to provide high linearity and sufficient G<;sub>m<;/sub> gain over a wide frequency band. By combination of various circuit techniques the LNTA, which is designed in 65 nm CMOS, achieves in simulation the noise figure in range [1-1.34] dB and linearity of maximum IIP3 = 16.5 dBm over 0.5-6 GHz band. The maximum transconductance G<;sub>m<;/sub> = 12.9 mS, the return loss S11 <; -10 dB while the total power consumption is 4 mW for 1.2 V supply.

  • 282.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    Bhide, Ameya
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    Design and analysis of high-speed split-segmented switched-capacitor DACs2017In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 92, no 2, p. 199-217Article in journal (Refereed)
    Abstract [en]

    In order to achieve high speed and high resolution for switched-capacitor (SC) digital-to-analog converters (DACs), an architecture of split-segmented SC DAC is proposed. The detailed design considerations of kT/C noise, capacitor mismatch, settling time and simultaneous switching noise are mathematically analyzed and modelled. The design area WCu is defined based on that analysis. It is used not only to identify the maximum speed and resolution but also to find the design point (WCu) for certain speed and resolution of SC DAC topology. The segmentation effects are also considered. An implementation example of this type of DACs is a 12-bit 6-6 split-segmented SC DAC designed in 65 nm CMOS. The linear open-loop output driver utilizing derivation superposition technique for nonlinear cancellation is used to drive off-chip load for the SC array without compromising its performance. The measured results show that the SC DAC achieves a 44 dB spurious free dynamic range within a 1 GHz bandwidth of input signal at 5 GS/s while consuming 50 mW from 1 V digital and 1.2 V analog supplies. The overall performance that was achieved from measurement is poorer than expected due to lower power supply rejection ratio in fabricated chip. This DAC can be used in transmitter baseband for wideband wireless communications.

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  • 283.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, Faculty of Science & Engineering.
    Dabrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, Faculty of Science & Engineering.
    Highly linear open-loop output driver design for high speed capacitive DACs2013In: 2013 NORCHIP, 11–12 November, 2013, Vilnius, LITHUANIA, 2013, p. 1-4Conference paper (Refereed)
    Abstract [en]

    Design of a high speed output driver for capacitive digital-to-analog converters (SC DACs) is presented. As the output voltage swing of those DACs is usually greater than 300 mVpp the driver is designed for large signal operation that is a challenge in terms of the DAC linearity. Two non-linearity cancellation techniques are applied to the driver circuit, the derivative superposition (DS) and the resistive source degeneration resulting in HD3 <; -70 dB and HD2 <; -90 dB over the band of 0.5-4 GHz in 65-nm CMOS. For the output swing of 300 mVpp and 1.2 V supply its power consumption is 40 mW. For verification the driver is implemented in a 12-bit pipeline SC DAC. In simulations the complete Nyquist-rate DAC achieves SFDR of 64 dB for signal bandwidth up to 2.2 GHz showing a negligible non-linearity contribution by the designed driver for signal frequencies up to 1.3 GHz and a degradation by 3 dB at 2.2 GHz.

  • 284.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, Faculty of Science & Engineering.
    Dabrowski, Jerzy J.
    Linköping University, Department of Electrical Engineering, Communication Systems. Linköping University, Faculty of Science & Engineering.
    Focused Calibration for Advanced RF Test with Embedded RF Detectors2013In: European Conference on Circuit Theory and Design (ECCTD), 2013, IEEE , 2013, p. 1-4Conference paper (Refereed)
    Abstract [en]

    In this paper a technique suitable for on-chip IP3/IP2 RF test by embedded RF detectors is presented. A lack of spectral selectivity of the detectors and diverse nonlinearity of the circuit under test (CUT) impose stiff constraints on the respective test measurements for which focused calibration approach and a support by customized models of CUT is necessary. Also cancellation of second-order intermodulation effects produced by the detectors under the two-tone test is required. The test technique is introduced using a polynomial model of the CUT. Simulation example of a practical CMOS LNA under IP3/IP2 RF test with embedded RF detectors is presented showing a good measurement accuracy.

  • 285.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices.
    Dabrowski, Jerzy J.
    Linköping University, Department of Electrical Engineering, Electronic Devices.
    On-chip IP3 IP2 RF Advanced Test and Calibration Technique with Embedded RF Detectors2013Conference paper (Other academic)
  • 286.
    Duong, Quoc-Tai
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Dąbrowski, Jerzy
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Wideband RF Detector Design for High Performance On-Chip Test2012In: NORCHIP 2012, IEEE , 2012, p. 1-4Conference paper (Refereed)
    Abstract [en]

    A wideband, high dynamic range RF amplitude detector design aimed at on-chip test is presented. Boosting gain and sub-ranging techniques are applied to the detection circuit to increase gain over the full range of input amplitudes without compromising the input impedance. Followed by a variable gain amplifier (VGA) and a 9-bit A/D converter the RF detector system, designed in 65 nm CMOS, achieves in simulation the minimum detectable signal of -58 dBm and 63 dB dynamic range over 0.5 GHz - 9 GHz band with input impedance larger than 4 kΩ. The detector is intended for on-chip calibration and the attained specifications put it among the reported state-of-the-art solutions.

  • 287.
    Ebeed, Mohamed
    et al.
    Univ Jaen, Spain; Sohag Univ, Egypt.
    Ali, Shimaa
    Sohag Univ, Egypt.
    Kassem, Ahmed M.
    Sohag Univ, Egypt.
    Hashem, Mohamed
    Holding Co Water & Wastewater, Egypt.
    Kamel, Salah
    Aswan Univ, Egypt.
    Hussien, Abdelazim
    Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering. Fayoum Univ, Egypt; Middle East Univ, Jordan.
    Jurado, Francisco
    Univ Jaen, Spain.
    Mohamed, Emad A.
    Prince Sattam Bin Abdulaziz Univ, Saudi Arabia.
    Solving stochastic optimal reactive power dispatch using an Adaptive Beluga Whale optimization considering uncertainties of renewable energy resources and the load growth2024In: Ain Shams Engineering Journal, ISSN 2090-4479, E-ISSN 2090-4495, Vol. 15, no 7, article id 102762Article in journal (Refereed)
    Abstract [en]

    The electrical system performance can be improved considerably by controlling the reactive power flow in the system. The reactive power control can be achieved by optimal reactive power dispatch (ORPD) problem solution and optimal integration of the FACTS devices. With high penetration of renewable energy sources (RESs) and the load growth, the ORPD solution became a challenging and a complex task due to the stochastic nature of the RERs and the load growth. In this regard, the aim of this paper is to solve the stochastic optimal reactive power dispatch (SORPD) with optimal inclusion of PV units, wind turbines and the unified power flow controller (UPFC) under uncertainties of the load growth and the generated powers. An Adaptive Beluga Whale Optimization (ABWO) is proposed for solving the SORPD which is based on the Fitness-Distance Balance Selection (FDBS) strategy and the territorial solitary males' strategy of the Mountain Gazelle Optimizer. The proposed ABWO is tested on IEEE 30-bus system and a comparison with other optimization techniques for solving the ordinary ORPD is presented for validating the proposed ABWO. The obtained results reveal that the TEPL is reduced from 5.3168 MW to 3.97985 MW with optimal integration of the RERs and UPFC. Likewise, the TEVD is reduced from 0.1794p.u. to 0.10689p.u. and the TVSI is decreased from 0.1289p.u. to 0.0476p.u.

  • 288.
    Ebrahimi, Amir
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    Kihlberg, David
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems. Linköping University, Faculty of Science & Engineering.
    Design of radio frequency energy harvesting system: for use in implantable sensors2022Independent thesis Advanced level (degree of Master (Two Years)), 28 HE creditsStudent thesis
    Abstract [en]

    Implantable biomedical wireless sensors provide monitoring of vital health signs such as oxygen, temperature and intraocular pressure and may help to analyse and detect diseases in humans and animals. However, one of the design challenges of implantable devices is providing a safe and reliable energy source. Replaceable batteries are one of the most common methods for powering up implantable devices and have been used in e.g.cardiac pacemakers for decades. However, the need for a regular battery replacement may require surgical incisions. Multiple studies have been done on energy harvesting from ambient energy sources to provide the required power for the operation of the implantable sensor and thus reducing the need for battery replacement. In this work, a circuit-level radio frequency (RF) energy harvesting system has been designed and simulated in 65 nm CMOS process technology. The system consists of an AC-DC converter, a DC-DC converter, a Ring oscillator, a Buffer, and a Voltage sensor with comparators, dividers and a reference generator. The rectifier operates at a frequency of 900 MHz and offers a power conversion efficiency (PCE) of 71%. The doubler works at 50 MHz with a voltage conversion efficiency (VCE) of 98%. Additionally, the Voltage sensor monitors the voltage level of the energy-storing unit, that in this project is intended to be an mm-size rechargeable battery. If the voltage level is equal to or higher than a threshold value, Vref, the harvesting system will be in discharging mode. Similarly, if the voltage level is below Vref, then the system will be in charging mode.   

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  • 289.
    Ebrahimi Mehr, Golnaz
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Design of a Rom-Less Direct Digital Frequency Synthesizer in 65nm CMOS Technology2013Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    A 4 bit, Rom-Less Direct Digital Frequency Synthesizer (DDFS) is designed in 65nm CMOS technology. Interleaving with Return-to-Zero (RTZ) technique is used to increase the output bandwidth and synthesized frequencies. The performance of the designed synthesizer is evaluated using Cadence Virtuoso design tool. With 3.2 GHz sampling frequency, the DDFS achieves the spurious-free dynamic range (SFDR) of 60 dB to 58 dB for synthesized frequencies between 200 MHz to 1.6 GHz. With 6.4 GHz sampling frequency, the synthesizer achieves the SFDR of 46 dB to 40 dB for synthesized frequencies between 400 MHz to 3.2 GHz. The power consumption is 80 mW for the designed mixed-signal blocks.

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  • 290.
    Edbom, Emil
    et al.
    Linköping University, Department of Science and Technology.
    Henriksson, Henrik
    Linköping University, Department of Science and Technology.
    Design comparison between HiperLAN/2 and IEEE802.11a services2001Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This paper is a study and comparison between the two Wireless LAN (WLAN) standards HiperLAN/2 and IEEE 802.11a. WLANs are used instead or together with ordinary LANs to increase mobility in for example an office. HiperLAN/2 is an European standard developed by ETSI and the IEEEs standard is American.

    A WLAN-card consists roughly of a Medium Access Control (MAC), Physichal layer (PHY) and an antenna. The antenna is the same for the different standards.

    Both standards operates at 5.4 GHz with a maximum transmission rate at 54 Mbit/s and they use OFDM to modulate the signal. This means that the physical layer in the two standards is similar.

    The differences between the standards are in the Medium Access Control (MAC) layer. HiperLAN/2 has a much more complex MAC since it is developed with the starting point in cellular phones. Therefore this MAC is not very similar to ETHERNET that is the protocol used by regular network. On the other hand it is built to be compatible with cellular phones and other applications.

    The 802.11a MAC is very much the same as in the 802.11b standard that is the most used standard at present. The difference is that 802.11a can send at much higher data rates. This MAC is build with starting point in ETHERNET so it has a similar interface to the computer. This makes it less complex.

    The different MACs can provide different services. The greatest difference is that 802.11a can use a distributed send mode where any STA can send if the medium is idle. This reminds a lot of ETHERNET but they use different methods to sense if the medium is idle. In HiperLAN/2 are all transmissions scheduled by the AP. 802.11a can operate in a similar way but at the moment this mode is not as fully developed as in HiperLAN/2. There are working groups in IEEE that works toward an improvement of 802.11a so it can use queues with different priorities, this is already implemented in HiperLAN/2.

    Another important issue in wireless environment is security. Both standards use encryption to protect their messages. The difference is that HiperLAN/2 changes their encryption key for every connection where 802.11a uses the same key the whole time. This gives HiperLAN/2 a better security with todays standard but thereare working groups dealing with implementing key-exchange functions and Kerberos use in 802.11a. Chapter 8 is a description of a program that we developed in C++. The program is used to monitor the different registers and ports a WLAN-card use. It is written for a 802.11b card and should be used together with Windows 2000. The source code can be found in appendix C.

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  • 291.
    Edhammer, Jens
    Linköping University, Department of Electrical Engineering, Information Coding.
    Rigid Body Physics for Synthetic Data Generation2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    For synthetic data generation with concave collision objects, two physics simu- lations techniques are investigated; convex decomposition of mesh models for globally concave collision results, used with the physics simulation library Bullet, and a GPU implemented rigid body solver using spherical decomposition and impulse based physics with a spatial sorting-based collision detection.

    Using the GPU solution for rigid body physics suggested in the thesis scenes con- taining large amounts of bodies results in a rigid body simulation up to 2 times faster than Bullet 2.83. 

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  • 292.
    Edman, Anders
    Linköping University, Department of Physics, Measurement Technology, Biology and Chemistry. Linköping University, The Institute of Technology.
    High Data Throughput CMOS Circuits1998Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    This thesis describes some high-performance digital CMOS circuits and the design of these circuits.

    The goal is to have a higher utilization of standard CMOS processes in order to increase performance of digital circuits. This is done without the use of aggressive processes. The designs are targeted towards very high clock rate and low power consumption.

    At the high level, the design are adjusted to fit into a low level architecture optimized for high performance. The architecture is also optimized for the high level design. The logic style and the flip-flops are selected for high performance.

    The digital processing chips presented in this thesis are based on a principle of heavily pipelined uni-directional processing in a data path. The logic is pipelined to a logic depth of one or two gates per pipeline stage. This design method and architecture is used for applications with high throughput processing of data.

    Two chips are designed for processing of 10 Gb/s SDH (Synchronous Digital Hierarchy) data, for use in fiber optic transmission systems. They include processing for the framer and deframer functions of a SDH regenerator. The 10 Gb/s is internally processed with 16 bits in parallel at a clock rate of 622 MHz. The chips are implemented in standard 0.6-0.8 μm CMOS.

    A quadrature 350 MHz Direct Digital Frequency Synthesizer is implemented in 0.8 μm CMOS. This DDFS is a high-speed compact implementation with on-chip DIA converters for the four-phase output. It calculates the sine and cosine values with a precision of 8 bits and with a frequency resolution below 1 Hz by using a sparse ROM-table and interpolation.

    A correlator chip for satellite-based high-performance auto-correlator spectrometers is designed. This chip performs more than 0.5 Tera-Multiply and Accumulate operations per second at a speed of 320 MHz in 1664 multipliers and accumulators. This 58 mm2 chip contains 1.6 million transistors and is implemented in a 0.6 μm process. The power consumption per operation is reduced with more than 5 times compared with other implementations, without any reduction in supply voltage. The internal noise level is reduced by dividing the processing and clock signal distribution into blocks with a clock buffer in between.

    Finally, two different high-speed multiplexers are presented. A 2.4-Gb/s 4:1 multiplexer and a 4-Gb/s 2:1 multiplexer are implemented in 0.8 μm CMOS. Both multiplexers are designed to be clocked by an external high swing clock.

    All chips results have been verified by measurements.

    List of papers
    1. A 0.8 μm CMOS 350 MHz quadrature direct digital frequency synthesizer with integrated D/A converters
    Open this publication in new window or tab >>A 0.8 μm CMOS 350 MHz quadrature direct digital frequency synthesizer with integrated D/A converters
    1998 (English)In: 1998 Symposium on VLSI Circuits, 1998. Digest of Technical Papers, 1998, p. 54-55Conference paper, Published paper (Refereed)
    Abstract [en]

    This quadrature DDFS calculates sine and cosine values with a tuning resolution below 1 Hz, by only using an 8 word ROM and interpolation. Two internal 8-bit differential D/A converters generate the four-phase analog output signal. A spurious free dynamic range of 50 dB for low frequencies and 30 dB near Nyquist is achieved.

    National Category
    Engineering and Technology
    Identifiers
    urn:nbn:se:liu:diva-88624 (URN)10.1109/VLSIC.1998.688001 (DOI)0-7803-4766-8 (ISBN)
    Conference
    1998 Symposium on VLSI circuits, Honolulu, Hawaii, June 11-13 1998
    Available from: 2013-02-13 Created: 2013-02-13 Last updated: 2021-12-22
  • 293.
    Edman, Anders
    et al.
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Svensson, Christer
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Mesgarzadeh, Behzad
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Synchronous Latency-Insensitive Design for Multiple Clock Domain2005In: Proceedings of the IEEE International System-on-Chip Conference (SoCC), IEEE Explore , 2005, p. 83-86Conference paper (Refereed)
    Abstract [en]

    Modern system-on-chip designs often require multiple clock frequencies. On the other hand, global interconnects suffer large delays. This paper proposes a method that manages these two problems within the framework of conventional synchronous design flow. The design is partitioned into isochronous blocks already at behavioral level, where each block is synchronous using a local clock. The local clock frequencies are assumed related by rational numbers. Communication between blocks is managed with FIFOs at each receiver, which manage different clock frequencies and hide unknown delays or clock skews. This method guarantees clock true implementation of a clock true behavioral description utilizing a predefined block-to-block latency.

  • 294.
    Eek, Magnus
    et al.
    Saab Aeronaut, Aircraft Vehicle Syst, Modeling and Simulat, SE-58188 Linkoping, Sweden.
    Hallqvist, Robert
    Saab Aeronaut, Aircraft Vehicle Syst, Modeling and Simulat, SE-58188 Linkoping, Sweden.
    Gavel, Hampus
    Saab Aeronaut, Aeronaut Engn and Weapons, SE-58188 Linkoping, Sweden.
    Ölvander, Johan
    Linköping University, Department of Management and Engineering, Machine Design. Linköping University, Faculty of Science & Engineering.
    A Concept for Credibility Assessment of Aircraft System Simulators2016In: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, ISSN 1940-3151, Vol. 13, no 6, p. 219-233Article in journal (Refereed)
    Abstract [en]

    An efficient methodology for verification, validation, and credibility assessment of simulation models and simulator applications is an enabler for the aeronautical industrys increasing reliance on modeling and simulation in system design and verification and on training. As a complement to traditional document-centric approaches, this paper presents a method for credibility assessment of simulator applications, in which credibility information is presented to end users directly during simulation. The central idea is that each model in a simulator is extended with a metamodel describing different aspects of credibility. The metamodel includes a number of static credibility measures and a dynamic measure that may vary during simulation. The concept is implemented and tested in two system simulators for the Saab Gripen fighter aircraft. According to the evaluation, the concept facilitates an intuitive overview of model dependencies, as well as credibility information for individual models and for a simulator as a whole. This implies a support for detecting test plan deficiencies or that a simulator configuration is not a suitable platform for the execution of a particular test. Furthermore, model developers and end users are encouraged to reflect upon central credibility aspects like intended use, model fidelity, and test worthiness in their daily work.

  • 295. Order onlineBuy this publication >>
    Eghbali, Amir
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Contributions to Flexible Multirate Digital Signal Processing Structures2009Licentiate thesis, monograph (Other academic)
    Abstract [en]

    A current focus among communication engineers is to design flexible radio systems in order to handle services among different telecommunication standards. Efficient support of dynamic interactive communication systems requires flexible and cost-efficient radio systems. Thus, low-cost multimode terminals will be crucial building blocks for future generations of multimode communication systems. Here, different bandwidths, from different telecommunication standards, must be supported and, thus, there is a need for a system which can handle a number of different bandwidths. This can be done using multimode transmultiplexers (TMUXs) which make it possible for different users to share a common channel in a time-varying manner. These TMUXs allow bandwidth-on-demand so that the resulting communication system has a dynamic allocation of bandwidth to users. Each user occupies a specific portion of the channel where the location and width of this portion may vary with time.

    Another focus among communication engineers is to provide various wideband services accessible to everybody everywhere. Here, satellites with high-gain spot beam antennas, on-board signal processing, and switching will be a major complementary part of future digital communication systems. Satellites provide a global coverage and if a satellite is in orbit, customers only need to install a satellite terminal and subscribe to the service. Efficient utilization of the available limited frequency spectrum, by these satellites, calls for on-board signal processing to perform flexible frequency-band reallocation (FFBR).

    Considering these two focuses in one integrated system where the TMUXs operate on-ground and FFBR networks operate on-board, one can conclude that successful design of dynamic communication systems requires high levels of flexibility in digital signal processing structures. In other words, there is a need for flexible digital signal processing structures that can support different telecommunication scenarios and standards. This flexibility (or reconfigurability) must not impose restrictions on the hardware and, ideally, it must come at the expense of simple software modifications. In other words, the system is based on a hardware platform and its parameters can easily be modified without the need for hardware changes.

    This thesis aims to outline flexible TMUX and FFBR structures which can allow dynamic communication scenarios with simple software reconfigurations on the same hardware platform. In both structures, the system parameters are determined in advance. For these parameters, the required filter design problems are solved only once. Dynamic communications, with users having different time-varying bandwidths, are then supported by adjusting some multipliers of the proposed multimode TMUXs and a simple software programming in the channel switch of the FFBR network. These do not require any hardware changes and can be performed online. However, the filter design problem is solved only once and offline.

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  • 296.
    Eghbali, Amir
    Linköping University, Department of Electrical Engineering.
    On Filter Bank Based MIMO Frequency Multiplexing and Demultiplexing2006Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    The next generation satellite communication networks will provide multimedia services supporting high bit rate, mobility, ATM, and TCP/IP. In these cases, the satellite technology will act as the internetwork infrastructure of future global systems and assuming a global wireless system, no distinctions will exist between terrestrial and satellite communications systems, as well as between fixed and 3G mobile networks. In order for satellites to be successful, they must handle bursty traffic from users and provide services compatible with existing ISDN infrastructure, narrowcasting/multicasting services not offered by terrestrial ISDN, TCP/IP-compatible services for data applications, and point-to-point or point-to-multipoint on-demand compressed video services. This calls for onboard processing payloads capable of frequency multiplexing and demultiplexing and interference suppression.

    This thesis introduces a new class of oversampled complex modulated filter banks capable of providing frequency multiplexing and demultiplexing. Under certain system constraints, the system can handle all possible shifts of different user signals and provide variable bandwidths to users. Furthermore, the aliasing signals are attenuated by the stopband attenuation of the channel filter thus ensuring the approximation of the perfect reconstruction property as close as desired. Study of the system efficient implementation and its mathematical representation shows that the proposed system has superiority over the existing approaches for Bentpipe payloads from the flexibility, complexity, and perfect reconstruction points of view. The system is analyzed in both SISO and MIMO cases. For the MIMO case, two different scenarios for frequency multiplexing and demultiplexing are discussed.

    To verify the results of the mathematical analysis, simulation results for SISO, two scenarios of MIMO, and effects of the finite word length on the system performance are illustrated. Simulation results show that the system can perform frequency multiplexing and demultiplexing and the stopband attenuation of the prototype filter controls the aliasing signals since the filter coefficients resolution plays the major role on the system performance. Hence, the system can approximate perfect reconstruction property by proper choice of resolution.

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    FULLTEXT01
  • 297.
    Ehrenstråhle, Carl
    Linköping University, Department of Electrical Engineering, Computer Engineering.
    Polynomial Expansion-Based Displacement Calculation on FPGA2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis implements a system for calculating the displacement between two consecutive video frames. The displacement is calculated using a polynomial expansion-based algorithm. A unit tested bottoms-up approach is successfully used to design and implement the system. The designed and implemented system is thoroughly elaborated upon. The chosen algorithm and its computational details are presented to provide context to the implemented system. Some of the major issues and their impact on the system are discussed.

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    fulltext
  • 298.
    Eilertsen, Adrian
    Linköping University, Department of Electrical Engineering, Automatic Control.
    Modellering av reserv- och nödkraftsystem i JAS 39 Gripen2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Simulation is a vital tool during development of JAS 39 Gripen, since money and time can be saved.

    The Auxiliary and Emergency Power System, AEPS, is a subsystem of the secondary power system in Gripen. It has the function of providing the aircraft with electrical and hydraulical power before activation and after deactivation of the main engine. The system also functions as backup in case of a safety critical problem in the main power supply system. The system basically consists of a control unit and an auxiliary gearbox. The gearbox is driven by an air turbine. An auxiliary generator and a hydraulic pump are mounted on the gearbox to provide the aircraft with electrical and hydraulical power. The airflow to the turbine is regulated by an Air Modulating Valve, AMV.

    This report describes a new model of the AEPS. The model encompasses the logical control unit and a physical description of AMV, air turbine, auxiliary gearbox, auxiliary generator and the auxiliary hydraulic pump. The logical model is connected to the physical model whereby simulation of the whole system is made possible. The model is implemented in Matlab/Simulink.

    This work provides a complete model of the AEPS which enables simulation of the dynamical processes. Verification was done by comparing simulation results with measurements from the real physical system. Satisfactory results are achieved, especially for inlet pressure for the air turbine and the speed of the auxiliary generator.

     

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  • 299.
    Ek, Tobias
    Linköping University, Department of Electrical Engineering.
    GALS,Design och simulering för FPGA med VHDL2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Heat, clock scew and frequency optimization are some of the problems a semiconductor designer must face. By splitting a synchrounous block into multiple pieces which comunicates asynchronously with eachother and provide them with independent clocks, these problems may be reduced.

    GALS (Global Asynchronous Local Synchronous) is a wrapper that wraps a synchronous block and provides it with a clock. Multiple GALS-elements will make the whole system. The clockfrequency may be independently adjusted between each block. The clocks may be started and halted independantly depending on the workload.

    Describing the system in a hardware language as VHDL, and implement it into an FPGA (Field Programmable Grid Array), makes the development of applications fast and cheap.

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    FULLTEXT01
  • 300.
    Ekebrand, Terese
    et al.
    Linköping University, Department of Electrical Engineering.
    Funke, Nils
    Linköping University, Department of Electrical Engineering.
    A Parameterizable Standard Cell Generator2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This master thesis describes the creation of a fully parameterizable design tool, intended for automatic generation of standard cell layouts from basic schematic information. The thesis covers general background on programs for automatic layout generation, standard cells and basics in IC design. Algorithms commonly used in various parts of such programs are presented, and the ones used to implement the tool are described in depth.

    Download full text (pdf)
    FULLTEXT01
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