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  • 301.
    Ekelund, Vige
    et al.
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Hilleskog, Jakob
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Vision Based Temperature Input in PID-Controlled 3D-Printer Applications: Viability of IR-thermometer thermography for use in 3D printer applications2022Independent thesis Basic level (university diploma), 180 HE creditsStudent thesis
    Abstract [en]

    In 3D-printers, accurate control of temperature is important and most often a thermistor is used to regulate it. However, while thermistors are cheap, they tend to be quite inaccurate at the wide temperature range of 3D-printers. And since they need to be in contact with the object they are measuring, they have to withstand the temperature that the object operates in. This work explores the possibility and viability of using a contactless solution for temperature feedback for the PID-regulator in 3D-printers instead of thermistors. Originally this work was supposed to use a thermal camera but because of unforeseen shipping problems, the thermal camera did not arrive in time, instead an IR-thermometer was used. The work was done by modifying the software of the 3D-printer to receive temperature from an external source, two available pins on the motherboard of the 3D printer were connected to a Raspberry Pi and with a custom made communication protocol and modified firmware, temperature data could be transferred between them. An IR-thermometer was mounted on the extruder of the 3D-printer, measuring the temperature of the heating block, it was also connected to the Raspberry Pi and its reported temperature was sent to the 3D-printer. To measure the performance of the different solutions, important data was logged and a visual inspection of printed parts were conducted. The results of the work showed that it was possible to replace the thermistor with a contactless IR-thermometer with a print quality that was on par with the original solution. It was also found that the IR-thermometer had a faster response-time to changes in temperature compared to the thermistor. The IR-thermometer should also have a wider object temperature-range than the thermistor but because this work was delimited to one specific thermoplastic material with one temperature-range, this was not tested. In conclusion the contactless solution had a result better than expected and is a promising proof of concept. The price of the contactless solution is magnitudes higher than that of the thermistor but with its promising accuracy and response time to changes in temperature it could be a viable solution for industrial applications.

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  • 302.
    Eklund, Henrik
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Linearization of Resistive Digital-to-Analog Converter for RF-Applications Using Compensator and Digital Predistortion2021Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    High-speed digital-to-analog converters are critical components in many radiofrequency (RF) applications. The resistive DAC (RDAC) architecture is suitable for high-speed implementation in extremely scaled digital circuit nodes. An RDAC core can be implemented as a resistance network and a digital block, consisting of inverters as drivers to the resistive network. One disadvantage of the architecture is the input code-dependent supply current. Combined with a non-zero supply network impedance, the code-dependent current will introduce non-linearity in the output voltage. One way to circumvent the problem is to use a high-performance voltage regulator, which counteracts the voltage variation in the impedance in the RDAC supply network.

    In this thesis work, two alternative solutions are investigated; Compensation with another signal-dependent impedance in parallel with the RDAC core to reduce the impedance variations and a digital predistorter (DPD) which corrects the non-linearities of RDAC output voltage. The investigated techniques can be used for improving the linearity of an RDAC in certain cases. The current compensation technique works best at low frequencies, while the DPD can be used for all frequencies to relax requirements on routing resistance or voltage regulation design.

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  • 303.
    Eklund, Jan-Erik
    Linköping University, Department of Physics, Measurement Technology, Biology and Chemistry. Linköping University, The Institute of Technology.
    A/D Conversion for Sensor Systems1997Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Today, an important field for circuit design research is advanced mixed mode CMOS circuits for the most varying purposes. By designing these for implementation in basic and cheap digital technologies, building blocks for advanced systems are achieved. Two examples are described in this thesis; a smart CMOS camera and AID conversion for carrier frequency signals.

    The CMOS camera is developed using the Near-Sensor Image Processing concept, NSIP. The concept has previously been presented. It is based on a focal plane processor with one processor in each pixel. The two main properties, that make the concept successful are that the light intensity is converted to a time value, which means that we can process single bit information with maintained grey scale information, and an asynchronous propagation net, which can mark connected areas in the image. The contribution of this thesis is the implementation of an NSIP camera. A low power circuit technique with self clocked instructions is developed for this SIMD machine. The processor architecture based on NAND operations is developed for minimizing the area. The light sensor read-out circuitry is developed for low power and small area. A patent is pending for this part. The result is a 32 x 32 pixels test circuit with possibilities to extend to 128 x 128 pixels in existing technologies. The operation speed can be up to 100 MHz. The power consumption is 400 mW@ 10 MHz (in 128 x 128 pixels). The asynchronous mark operation can process 4 · 106 frames/s.

    The carrier frequency ADC is based on a patent describing a novel technique for finding Inphase and Quadrature signals from an intermediate frequency, fIF, signal. It has earlier been tested in a multi chip system. This thesis shows an implementation of this method in a single CMOS chip, by using Multiple Sampling Single Conversion, MSSC. A test circuit that operates on fIF= 30 MHz and gives 10 bits 2 MHz output was fabricated. The experiences from this circuit initiated studies about metastability and about high speed architectures for SA-ADCs. A model, which compares metastability with quantization noise, is presented. Design rules for achieving a desired SNR can be specified from this model. One high speed architecture was developed. The SA-ADC uses binary search among reference levels for finding the correct representation. The new architecture is based on a Reference Pre-Select, RPS, scheme, which minimizes the time between two comparisons. The result is 200 MHz 10 bits simulated performance. Partly working circuits have been fabricated.

  • 304.
    Eklund, Robert
    Linköping University, Department of Science and Technology.
    Linearization of Voltage-Controlled Oscillators in Phase-Locked Loops2005Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
    Abstract [en]

    This is a thesis report done as part of the Master of Science in Electronics Design Engineering given at Linköping University, Campus Norrköping. The thesis work is done at Ericsson AB in the spring of 2005. The thesis describes a method of removing variations in the tuning sensitivity of voltage-controlled crystal oscillators due to different manufacturing processes. These variations results in unwanted variations in the modulation bandwidth of the phase-locked loop the oscillator is used in. Through examination of the theory of phase-locked loops it is found that the bandwidth of the loop is dependent on the tuning sensitivity of the oscillator.

    A method of correcting the oscillator-sensitivity by amplifying or attenuating the control-voltage of the oscillator is developed. The size of the correction depends on the difference in oscillator-sensitivity compared to that of an ideal oscillator. This error is measured and the correct correction constant calculated.

    To facilitate the measurements and correction extra circuits are developed and inserted in the loop. The circuits are both analog and digital. The analog circuits are mounted on an extra circuit board and the digital circuits are implemented in VHDL in an external FPGA.

    Tests and theoretical calculations show that the method is valid and able to correct both positive and negative variations in oscillator-sensitivity of up to a factor ±2.5 times. The bandwidth of the loop can be adjusted between 2 to 15 Hz (up to ±8 dB, relative an unmodified loop).

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  • 305.
    Ekström, Eric
    Linköping University, Department of Electrical Engineering.
    Off-road Driving with Deteriorated Road Conditions for Autonomous Driving Systems2022Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Recent studies on robustness of machine learning systems shows that today’s autonomous vehicles struggle with very basic visual disturbances such as rain or snow. There is also a lack of training data that includes off road scenes or scenes with different forms of deformation to the road surface. The purpose of this thesis is to address the lack of off-road scenes in current dataset for training of autonomous vehicles and the issue of visual disturbances by building a simulated 3D environment for generating training scenarios and training data for specific environments. The synthesised scenes is implemented using modern OpenGL, and we propose methods to synthesis rutting and the formation of potholes on road surfaces as well as rain and fog with a parameterized approach. \\

    The generated datasets are tested through semantic segmentation using state of the art pretrained neural networks. The results show that the neural networks accurately identifies the road surface in in clear weather as long as the road surface is mostly coherent. The synthesised rain and fog decrease performance of the neural networks significantly. \\

    Generating training data with the method presented in this thesis and incorporating it as part of the training data used in training neural networks for autonomous driving systems could be used to improve performance in certain scenarios. Specifically, it could improve performance in driving scenes with heavy road deformations, and in scenes with low visibility. Further research is needed to conclude that the data is useful, but the results generated in this thesis is promising.

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  • 306.
    Eliasson, Viktor
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Digital videoregistrering2013Independent thesis Basic level (university diploma), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [en]

    This Bachelor thesis examines the possibility of replacing an outdated, analog video recording system to a digital counterpart. It is key that the video and audio signals remain synchronized, generator locked and time stamped. It is up to nine different video sources and a number of audio sources to be recorded and treated in such a manner which enables synchronized playback. The  different video sources do not always follow a universal standard, and differ from format as well as resolution. This thesis aims to compare a number of state of the art commercial of the shelf solutions with proprietary hardware. Great emphasis is placed on giving a functional view over the system features and to evaluate different compression methods. The report also discusses different transmission, storage and playback options. The report culminates in a series of proposed solutions to sub problems which are solved and treated separately, leading to a final proposal from the author. The final draft set how well the system meets pre-set requirements to price.

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  • 307.
    Elis, Sandberg
    Linköping University, Department of Electrical Engineering, Vehicular Systems.
    Second Life Applications for Degraded EV Batteries: Evaluating Benefits Basedon Remaining Useful Life and Battery Configurations2023Independent thesis Advanced level (degree of Master (Two Years)), 28 HE creditsStudent thesis
    Abstract [en]

    This thesis explores the potential of second-life electric vehicle batteries, which are no longer suitable for electro-mobility, to provide energy storage solutions. The study iden- tifies two potential applications for second-life batteries: charging stations and residential PV energy storage systems. The research uses the remaining useful life as a vital indicator of the benefit that emerges from each solution. A battery aging framework is proposed, tak- ing power demand and temperature as inputs and generating capacity loss and resistance increase utilizing aging models from the literature. It is observed that the prediction can vary significantly depending on the model. Additionally, the total costs of each solution are heavily influenced by the battery pack configuration, as EV batteries can be directly reused or refurbished. A lower degree of dis-aggregation and testing is more cost-effective and entails fewer wasted components, yet it introduces performance uncertainties. The study concludes that applications that can tolerate uncertainties and inflexibility are best suited to meet the supply of second-life EV batteries. Furthermore, by re-purposing second-life batteries, there is potential to maximize their value and reduce environmental impact by reducing the need for new batteries. 

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  • 308.
    Englund, Madeleine
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, The Institute of Technology.
    Hybrid Floating-point Units in FPGAs2012Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Floating point numbers are used in many applications that  would be well suited to a higher parallelism than that offered in a CPU. In  these cases, an FPGA, with its ability to handle multiple calculations  simultaneously, could be the solution. Unfortunately, floating point  operations which are implemented in an FPGA is often resource intensive,  which means that many developers avoid floating point solutions in FPGAs or  using FPGAs for floating point applications.

    Here the potential to get less expensive floating point operations by using ahigher radix for the floating point numbers and using and expand the existingDSP block in the FPGA is investigated. One of the goals is that the FPGAshould be usable for both the users that have floating point in their designsand those who do not. In order to motivate hard floating point blocks in theFPGA, these must not consume too much of the limited resources.

    This work shows that the floating point addition will become smaller withthe use of the higher radix, while the multiplication becomes smaller by usingthe hardware of the DSP block. When both operations are examined at the sametime, it turns out that it is possible to get a reduced area, compared toseparate floating point units, by utilizing both the DSP block and higherradix for the floating point numbers.

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  • 309.
    Engström, Fredrik
    Linköping University, Department of Electrical Engineering.
    VHDL-implementering av GMSK-demodulatorer för DARC i FPGA.2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [sv]

    DARC är ett sätt att sända digital information via FM-rundradionätet. Moduleringsmetoden för DARC är GMSK. Målsättningen var att jämföra kostnad/komplexitet och strömförbrukning för olika sätt att demodulera GMSK. Tre icke-koherenta demodulatorer och en koherent demodulator har jämförts. Man vill veta hur stor resursanvändningen var för olika FPGAer. De olika demodulatorerna har beskrivits med VHDL.

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  • 310.
    Erdemir, Sertac
    et al.
    Linköping University, Department of Electrical Engineering. Linköping University, Faculty of Science & Engineering.
    Yavuz Oruc, A.
    University of Maryland, MD 20742 USA.
    Noise Analysis of On-Chip Flexing Crossbars With a Geometric Model2016In: 2016 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), IEEE , 2016, p. 478-484Conference paper (Refereed)
    Abstract [en]

    Recently, a new family of sparse crossbar switches, called flexing crossbars were introduced in [1] for on-chip networking. This paper describes a geometric approach that incorporates victim-aggressor noise models into the noise analysis and layout of such networks to minimize the crosstalk noise caused by the proximity of crosspoints and wires. It has been shown that flexing crossbars have less crosstalk noise than ordinary crossbars. The approach is sufficiently general enough to be applicable to other switching fabrics in which capacitive wire coupling effects dominate other noise factors.

  • 311.
    Eriksson, Bo
    Linköping University, Department of Electrical Engineering.
    Design of a 32-bit CardBus PC-Card based System Test Platform for the SoCTRix Wireless LAN Transceiver2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Today, wireless communications is used more then ever before. Wired systems are replaced with wireless versions. New methods and transmission standards are developed and tested. The purpose of this thesis is development of a flexible high-performance System Test Platformfor test of the SoCTRix Wireless LAN Transceiver.

    The result is a Xilinx Virtex-II FPGA based System Test Platform board with CardBus PC Card interface to a computer. The hardware achieved has the following features:

    - 8-layer PCB

    - PCMCIA CardBus PC Card interface, enabling 133 MB/s data throughput

    - 1M Gate Virtex-II FPGA with reprogrammable configuration memory

    - Debugging via LEDs and Logic Analyzer connectors

    - 2x SPI EEPROM

    - 40 MHz system clock

    - Easy connection of two daughter-boards

    Specially designed for wireless transmitter development, can also be used for other computer related highperformance applications.

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  • 312.
    Eriksson, Christer
    et al.
    Linköping University, Department of Electrical Engineering.
    Lindahl, Erik
    Linköping University, Department of Electrical Engineering.
    Design av FPGA-baserad PCM-till-PWM-modulator för klass D-audioförstärkare2009Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

     

    This thesis experiments and evaluates methods for design of an FPGA based PCM-to-PWM modulator to be used in a class D audio amplifier. By utilizing mathematical analysis and simulations interpolation methods, pulse width modulation, cross point derivers and sigma delta modulators are discussed. The proposed design consists of upsampling, predistortion, noise shaping and pulse width modulation. The design has been validated through model based simulation and implementation in hardware.

     

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  • 313.
    Eriksson, Henrik
    Linköping University, Department of Electrical Engineering.
    Datorstödd implementering med hjälp av Xilinx System Generator2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The development in electronics increases the demand for good design methods and design tools in the field of electrical engeneering. To improve their design methods Ericsson Microwave Systems AB is interested in using computer tools to create a link between the specification and the implementation of a digital system in a FPGA.

    Xilinx System Generator for DSP is a tool for implementing a model of a digital signalprocessing algorithm in a Xilinx FPGA. To evaluate Xilinx System Generator two testcases has been designed.

    The testcases are selected to represent the FPGA designs made at Ericsson Microwave Systems. The testcases show that Xilinx System Generator can be used to effectivly implement a model made in Simulink in a FPGA from Xilinx. The result of the implementation is comparable to the implementation of VHDL code written by hand.

    The use of tools for implementation of a model in hardware cause change in the design methods used at Ericsson Microwave Systems. The higher level of abstraction introduced by System Generator results in the design decisions made at system level having a higher impact on the final realization.

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  • 314.
    Eriksson, Ina
    et al.
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    Fredriksson, Lina
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, Faculty of Science & Engineering.
    Data-driven methods for estimation of dynamic OD matrices2021Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The idea behind this report is based on the fact that it is not only the number of users in the traffic network that is increasing, the number of connected devices such as probe vehicles and mobile sources has increased dramatically in the last decade. These connected devices provide large-scale mobility data and new opportunities to analyze the current traffic situation as they traverse through the network and continuously send out different types of information like Global Positioning System (GPS) data and Mobile Network Data (MND). Travel demand is often described in terms of an Origin Destination (OD) matrix which represents the number of trips from an origin zone to a destination zone in a geographic area. The aim of this master thesis is to develop and evaluate a data-driven method for estimation of dynamic OD matrices using unsupervised learning, sensor fusion and large-scale mobility data. Traditionally, OD matrices are estimated based on travel surveys and link counts. The problem is that these sources of information do not provide the quality required for online control of the traffic network. A method consisting of an offline process and an online process has therefore been developed. The offline process utilizes historical large-scale mobility data to improve an inaccurate prior OD matrix. The online process utilizes the results and tuning parameters from the offline estimation in combination with real-time observations to describe the current traffic situation. A simulation study on a toy network with synthetic data was used to evaluate the data-driven estimation method. Observations based on GPS data, MND and link counts were simulated via a traffic simulation tool. The results showed that the sensor fusion algorithms Kalman filter and Kalman filter smoothing can be used when estimating dynamic OD matrices. The results also showed that the quality of the data sources used for the estimation is of high importance. Aggregating large-scale mobility data as GPS data and MND by using the unsupervised learning method Principal Component Analysis (PCA) improves the quality of the large-scale mobility data and so the estimation results.

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  • 315.
    Eriksson, Jens
    Linköping University, Department of Electrical Engineering.
    Evaluation of Hardware Test Methods for VLSI Systems2005Independent thesis Advanced level (degree of Magister), 10 points / 15 hpStudent thesis
    Abstract [en]

    The increasing complexity and decreasing technology feature sizes of electronic designs has caused the challenge of testing to grow over the last decades. The purpose of this thesis was to evaluate different hardware test methods/approaches based on their applicability in a complex SoC design. Among the aspects that were investigated are test implementation effort, test efficiency and the performance penalties implicated by the test.

    This report starts out by presenting a general introduction to the basics of hardware testing. It then moves on to review available standards and methodologies. In the end one of the more interesting methods is investigated through a case study. The method that was chosen for the case study has been implemented on a DSP, and is rather new and not as prolific as many of the standards discussed in the report. This type of method appears to show promising results when compared to more traditional ones.

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  • 316.
    Eriksson, Jens
    et al.
    Linköping University, Department of Electrical Engineering.
    Nilsson, Kristian
    Linköping University, Department of Electrical Engineering.
    Implementation of a Serial Communication Interface for a Signal Processor2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The purpose of this thesis was to implement a serial communication port model for a digital signal processor. It is a behavioral model, developed using VHDL, that is instruction comparisable to the Motorola digital signal processor DSP 56002. It supports five different data transfer modes and provides a programmable baud rate generator.

    This report starts out by giving a description of the external port, port C, the pin control logic and general purpose functionality. Then a more detailed description of the three pin dedicated serial communication interface is presented, the different operating modes and the baud rate generator are described.

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  • 317.
    Eriksson, Johan
    et al.
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Nilsson, Oscar
    Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
    Batterilös strömförsörjning av strömsnål granatelektronik2013Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [en]

    This bachelor thesis has been performed at Saab Dynamics AB (SBD) in Karlskoga, with the purpose to examine old designs of set-back-generators. A set-back-generator (SBG) shall provide instantaneous energy during firing of a projectile by a magnet moving through a coil. Previous designs of SBG:s is not providing enough energy to power electronics. New types of magnets have the potential to increase the energy yield significantly.

    SBD has a number of older SBG's and the work is based on these to examine the possibility to extract more energy by exchanging magnet. Other important parameters for an SBG's function has also been studied and tested in different configurations in the hope of further improvements. Expected results has then been analyzed and compared with the measurement results. On this basis suggestions and recommendations on a new SBG design has been delivered.

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    SBG
  • 318.
    Eriksson, Oscar
    Linköping University, Department of Electrical Engineering.
    Filterdesign och hårdvarukonstruktion för FMCW-radar2007Independent thesis Basic level (degree of Bachelor), 10 points / 15 hpStudent thesis
    Abstract [en]

    This bachelor thesis describes the design of an IF-filter and the hardware construction of a new version of a 77 GHz FMCW-radar demonstrator. The purpose of the demonstrator is to illustrate how the silicon germanium-, SiGe, technology could be used instead of the more conventional but also much more expensive gallium arsenide-, GaAs, technology. The old radar prototype that Acreo AB has developed is fully functional but needs to be redesigned to be able to evaluate the radar performance in a better way. The thesis presents the basic radar theory and equations to help understanding the construction of the system blocks. The report also describes the system architecture and how its functionality should be tested. The redesigned IF-filter has been simulated in a PSpice simulator and a prototype has been manufactured and measured. A 4-layer PCB-board of the whole system was done in Orcad Layout. Finally the report is concluded with suggestions on improvements for the next demonstrator version.

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  • 319.
    Eriksson, Rikard
    et al.
    Linköping University, Department of Science and Technology.
    Badea, Vlad
    Linköping University, Department of Science and Technology.
    Indoor navigation with pseudolites (fake GPS sat.)2005Independent thesis Advanced level (degree of Magister), 20 points / 30 hpStudent thesis
    Abstract [en]

    This Master Thesis was conducted by Rikard Eriksson and Vlad Badea for their Master of Science degree in Electronics Design Engineering at the University of Linköping (Linköpings Universitet), Sweden. HTC Sweden AB initialized this Thesis and the Thesis contains a pre study of pseudolite based indoor navigation systems, a design of a simple pseudolite and finally some recommendations of applications.

    The pre study starts off with an introduction of the GPS system. This since pseudolite based systems and GPS have many similarities. Different pseudolites based techniques were then investigated and the pre study is wrapped up with a very short briefing on the Hammerhead chip.

    Some of the pseudolite based techniques were worth some more looking into and a pseudolite was therefore designed and simulated. There was unfortunate not enough time to actually build the pseudolite and verify it.

    Some recommendations to HTC Sweden were given in the last chapter of this thesis. The authors of this thesis recommend some interesting techniques and how the future work could proceed.

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  • 320.
    Erixon, Mats
    Linköping University, Department of Science and Technology.
    Design of a Direct-conversion Radio Receiver Front-end in CMOS Technology2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology.

    Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end.

    The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated.

    The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.

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  • 321.
    Esmaeil Zadeh, Iman
    Linköping University, Department of Electrical Engineering, Electronic Devices.
    A Study and Implementation of On-Chip EMC Techniques2010Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    ElectroMagnetic Interferences (EMI) are emerging problems in today's high speed circuits. There are several examples that these interferences affected the circuits and systems. This work tries to reduce the abovementioned problems in synchronous systems by modifying the clock signal such that it produces less interferers.

    In this thesis first EMI and its sources and related definitions are studied in Chap.1 and then a theoretical background is presented in Chap.2, finally Chap.3 and Chap.4 are dedicated to circuit implementation and simulation results, respectively.

    A novel multi-segment clocking scheme is presented in this thesis. An analytical methods for formal verification of advantages of this clocking method is presented in Chap.2. Chap.3 and Chap.4 also are devoted to implementation, simulation and comparison of proposed clocking method versus other methods.

    Since proposed clocking method does not set any constraint on timing (speed of the circuit) and does not impose very high extra power consumption on the circuit, compared to the conventional clocking, this method could be used to reduce interferences in system.

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  • 322.
    Falk, Daniel
    Linköping University, Department of Physics, Chemistry and Biology, Biosensors and Bioelectronics.
    Patterning of Highly Conductive Conjugated Polymers for Actuator Fabrication2015Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Trilayer polypyrrole microactuators that can operate in air have previously been developed. They consist of two outer layers ofthe electroactive polymer polypyrrole (PPy) and one inner layer of a porous poly(vinylidene flouride) (PVDF) membranecontaining a liquid electrolyte. The two outer layers of PPy are each connected with gold electrodes and separated by the porousPVDF membrane. This microtool is fabricated by bottom-up microfabrication However, porous PVDF layer is not compatible with bottom upmicrofabrication and highly swollen SPE suffers from gold electrode delamination. Hence, in this MSc project/thesis a novelmethod of flexible electrode fabrication with conducting polymers was developed by soft lithography and drop-on-demandprinting. The gold electrodes were replaced by patterned vapor phase polymerized (VPP) poly(3,4-ethylenedioxythiophene) (PEDOT)electrodes due to its high electrical conductivity and versatile process ability. The replacement of the stiff gold electrodes byflexible and stretchable PEDOT allowed high volume change of the material and motions. The PEDOT electrodes werefabricated by patterning the oxidant iron tosylate using microcontact printing and drop-on-demand printing. Moreover, thePVDF membrane has been replaced by a nitrile butadiene rubber/poly(ethylene oxide) semi-interpenetrating polymer network(IPN) to increase ion conductivity and strechability and hence actuator performance.

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  • 323.
    Fall, Erik
    Linköping University, Department of Electrical Engineering, Computer Vision. Linköping University, The Institute of Technology.
    Compressed Sensing for 3D Laser Radar2014Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    High resolution 3D images are of high interest in military operations, where data can be used to classify and identify targets. The Swedish defence research agency (FOI) is interested in the latest research and technologies in this area. A draw- back with normal 3D-laser systems are the lack of high resolution for long range measurements. One technique for high long range resolution laser radar is based on time correlated single photon counting (TCSPC). By repetitively sending out short laser pulses and measure the time of flight (TOF) of single reflected pho- tons, extremely accurate range measurements can be done. A drawback with this method is that it is hard to create single photon detectors with many pixels and high temporal resolution, hence a single detector is used. Scanning an entire scene with one detector is very time consuming and instead, as this thesis is all about, the entire scene can be measured with less measurements than the number of pixels. To do this a technique called compressed sensing (CS) is introduced. CS utilizes that signals normally are compressible and can be represented sparse in some basis representation. CS sets other requirements on the sampling compared to the normal Shannon-Nyquist sampling theorem. With a digital micromirror device (DMD) linear combinations of the scene can be reflected onto the single photon detector, creating scalar intensity values as measurements. This means that fewer DMD-patterns than the number of pixels can reconstruct the entire 3D-scene. In this thesis a computer model of the laser system helps to evaluate different CS reconstruction methods with different scenarios of the laser system and the scene. The results show how many measurements that are required to reconstruct scenes properly and how the DMD-patterns effect the results. CS proves to enable a great reduction, 85 − 95 %, of the required measurements com- pared to pixel-by-pixel scanning system. Total variation minimization proves to be the best choice of reconstruction method. 

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  • 324.
    Fallqvist, Marcus
    Linköping University, Department of Electrical Engineering, Computer Vision.
    Automatic Volume Estimation Using Structure-from-Motion Fused with a Cellphone's Inertial Sensors2017Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The thesis work evaluates a method to estimate the volume of stone and gravelpiles using only a cellphone to collect video and sensor data from the gyroscopesand accelerometers. The project is commissioned by Escenda Engineering withthe motivation to replace more complex and resource demanding systems with acheaper and easy to use handheld device. The implementation features popularcomputer vision methods such as KLT-tracking, Structure-from-Motion, SpaceCarving together with some Sensor Fusion. The results imply that it is possible toestimate volumes up to a certain accuracy which is limited by the sensor qualityand with a bias.

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  • 325.
    Fandén, Petter
    Linköping University, Department of Science and Technology.
    Evaluation of Xilinx System Generator2001Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This Master’s Thesis is an evaluation of the software Xilinx System Generator (XSG) and blockset for Matlab. XSG is a module to simulink developed by Xilinx in order to generate VHDL code directly from functions implemented in Matlab. The evaluation was made at Saab Avionics AB in Järfälla, north of Stockholm.

    In order to investigate the performance of this new module XSG to simulink, a model of a frequency estimator often used in digital radar receivers were implemented in Matlab using XSG. Engineers working at SAAB Avionics implemented the same application directly in VHDL, without using Matlab and the XSG. After generating code the results were synthesised, analysed and compared.

    The frequency estimator basically contains an FFT, a windowing function and a sorting algorithm used to enable analyse of two real signals simultaneously. There were however problems during generation of the VHDL code and the model had to be broken into smaller parts containing only a 16-point FFT. The results of comparison in this report are based on models containing only this 16-point FFT and they show a small advantage for the System Generator according to the resource usage report generated during synthesis.

    Designing models for generation using Xilinx Blockset can create a lot of wiring between components. The reason for this is that the System Generator and Xilinx Blockset today is a new tool, not completely developed. There are many components found in simulink, Matlab that could not be found in Xilinx Blockset, this is however being improved. Another problem is long time for simulation and errors during generation.

    My opinion is that when used for smaller systems and with further development the System Generator can be a useful facility in designing digital electronics.

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  • 326.
    Fant, Sebastian
    Linköping University, Department of Electrical Engineering.
    A design of a future 10 kW converter2008Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This master thesis aim to design and evaluate a high power 3-phase DC/AC and AC/AC converter. The purpose is to use it for an electric motor in an aircraft possibly driving electric actuators, a propeller in an UAV or a small vehicle. Factors such as power loss and weight are of importance and will be estimated using known models supplied by various manufacturers of components. Different topologies of semiconductors suitable for this purpose are examined and presented. Extensive resources have been put to properly select the most suitable switching device according to their power loss and weight.

    The need for filters and protective circuits will be estimated according to regulations of common military avionic standards and will be included in the resulting estimation along with simulations to evaluate their need and importance. Snubber circuits will be presented and their specific ability to reduce voltage transients and switching losses will be examined along with some simulations to illustrate their performance. In the final part an estimation of efficiency and weight of higher and lower power models of the same inverter has been made using the same procedure as presented in this paper. Engineering rules have been formed from these estimations to simply be able to calculate the proportions of a future converter of arbitrary rated power.

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  • 327.
    Faraz, Sadia Muniza
    et al.
    NED Univ Engn & Technol, Pakistan.
    Jafri, Syed Riaz un Nabi
    NED Univ Engn & Technol, Pakistan.
    Tajvar, Zarreen
    NED Univ Engn & Technol, Pakistan.
    Alvi, Naveed ul Hassan
    RISE Res Inst Sweden, Sweden.
    Wahab, Qamar Ul
    Linköping University, Department of Physics, Chemistry and Biology. Linköping University, Faculty of Science & Engineering.
    Nur, Omer
    Linköping University, Department of Science and Technology, Physics, Electronics and Mathematics. Linköping University, Faculty of Science & Engineering.
    Effect of Annealing Atmosphere on the Diode Behaviour of ZnO/Si Heterojunction2021In: Elektronika ir Elektrotechnika, ISSN 1392-1215, Vol. 27, no 4, p. 49-54Article in journal (Refereed)
    Abstract [en]

    The effect of thermal annealing atmosphere on the electrical characteristics of Zinc oxide (ZnO) nanorods/p-Silicon (Si) diodes is investigated. ZnO nanorods are grown by low-temperature aqueous solution growth method and annealed in Nitrogen and Oxygen atmosphere. As-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characteristics of ZnO/Si heterojunction diodes are studied by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. Improvements in rectifying behaviour, ideality factor, carrier concentration, and series resistance are observed after annealing. The ideality factor of 4.4 for as-grown improved to 3.8 and for Nitrogen and Oxygen annealed improved to 3.5 nanorods diodes. The series resistances decreased from 1.6 to 1.8 times after annealing. An overall improved behaviour is observed for oxygen annealed heterojunction diodes. The study suggests that by controlling the ZnO nanorods annealing temperatures and atmospheres the electronic and optoelectronic properties of ZnO devices can be improved.

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  • 328.
    Farid, Amro M.
    et al.
    Masdar Institute of Science & Technology, Masdar City, Abu Dhabi, UAE.
    Ribeiro, Luis
    Linköping University, Department of Management and Engineering, Manufacturing Engineering. Linköping University, The Institute of Technology.
    An Axiomatic Design of a Multi-Agent Reconfigurable Manufacturing System Architecture2014In: Proceedings of ICAD2014 The Eighth International Conference on Axiomatic Design Campus de Caparica – September 24-26, 2014 / [ed] António M. Gonçalves-Coelho, Miguel Cavique and António Mourão, 2014, p. 51-58Conference paper (Refereed)
    Abstract [en]

    In recent years, the fields of reconfigurable manufacturing systems, holonic manufacturing systems, and multi-agent systems have made technological advances to support the ready reconfiguration of automated manufacturing systems.  While these technological advances have demonstrated robust operation and been qualitatively successful in achieving reconfigurability, their ultimate industrial adoption remains limited.  Amongst the barriers to adoption has been the relative absence of formal and quantitative multi-agent system design methodologies based upon reconfigurability measurement.  Hence, it is not clear 1.) the degree to which these designs have achieved their intended level of reconfigurability 2.) which systems are indeed quantitatively more reconfigurable and 3.) how these designs may overcome their design limitations to achieve greater reconfigurability in subsequent design iterations.  To our knowledge, this paper is the first multi-agent system reference architecture for reconfigurable manufacturing systems driven by a quantitative and formal design approach.  It is rooted in an established engineering design methodology called axiomatic design for large flexible engineering systems and draws upon design principles distilled from prior works on reconfigurability measurement.  The resulting architecture is written in terms of the mathematical description used in reconfigurability measurement which straightforwardly allows instantiation for system-specific application.

  • 329.
    Fazli Yeknami, Ali
    Linköping University, Department of Electrical Engineering.
    Design and Evaluation of A Low-Voltage, Process-Variation-Tolerant SRAM Cache in 90nm CMOS Technology2008Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis presents a novel six-transistor SRAM intended for advanced

    microprocessor cache application. The objectives are to reduce power

    consumption through scaling the supply voltage and to design a SRAM that is fully process-variation-tolerant, utilizing separate read and write access ports as well as exploiting asymmetry. Traditional six-transistor SRAM is designed and its strengths and weaknesses are discussed in detail. Afterwards, a new SRAM technology developed in the division of Electronic Devices, Linköping University is proposed and its capabilities and drawbacks are illustrated deeply. Subsequently, the impact of mismatch and process variation on both standard 6T and proposed asymmetric 6T SRAM cells is investigated. Eventually, the cells are compared regarding the voltage scalability, stability, and tolerability to variations in process parameters. It is shown that the new cell functions in 430mV while maintaining acceptable SNM margin in all process corners. It is also demonstrated that the proposed SRAM is fully process-variation-tolerant.

    Additionally, a dual-V t asymmetric 6T cell is introduced having wide SNM margin comparable with that of conventional 6T cell such that it is capable of functioning in 580mV.

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  • 330.
    Fazli Yeknami, Ali
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A 0.5-V 250-nW 65-dB SNDR Passive ΔΣ Modulator for Medical Implant Devices2013In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 May, 2013, 2013, p. 2010-2013Conference paper (Refereed)
    Abstract [en]

    A  0.5-V  ultra-low-power  second-order  DT  DS  modulator  is  presented  in  this  paper  for  medical  implant  devices.  The  modulator  employs  2nd-order  passive  low-pass filter  and  ultra-low-voltage  building  blocks,  including preamplifier, regenerative comparator, and clock controller, in order  to enable operation near 0.5 V supply. A  low-noise and gain-enhanced  single-stage  preamplifier  is  developed  using  a body-driven technique. Passive filter is gain boosted by power-efficient charge-redistribution amplification  scheme. Designed in  a  65nm CMOS  technology,  the modulator  achieves  65  dB peak SNDR over a 500 Hz signal bandwidth, while it consumes 250 nW  from  a  0.5 V  supply. The modulator  is  functional  at 0.45V and obtains 52 dB SNR, while consuming 200 nW.

  • 331.
    Fazli Yeknami, Ali
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A 0.7-V 400-nW Fourth-Order Active-Passive Delta-Sigma Modulator with One Active Stage2013Conference paper (Refereed)
    Abstract [en]

    A 0.7 V 400 nW fourth-order active-passive ΔΣ modulator with one active stage is presented in this paper using standard CMOS 65 nm technology. The modulator achieves 84 dB SNR and 80.3 dB SNDR in a signal bandwidth of 500 Hz with a sampling frequency of 256 kHz. The input-feedforward architecture is used to improve the voltage swing before the comparator of the traditional passive modulators, which enables simpler comparator design with no preamplifier as well as cascading three successive power-efficient passive filters. The first active stage is used to reduce the comparator's noise and offset and to minimize the capacitive area. The modulator achieves a high power-efficiency (47 fJ/step) in terms of widely used figure of merit.

  • 332.
    Fazli Yeknami, Ali
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A 270-mV  ΔΣ Modulator Using Gain-Enhanced, Inverter-Based Amplifier2013Manuscript (preprint) (Other academic)
    Abstract [en]

    An ultra-low-voltage low-power switched-capacitor ΔΣ modulator running at a supply voltage as low as 270 mV is presented for medical implant devices. To reduce the supply voltage and power consumption, an inverter-based amplifier is used in the integrator, whose DC-gain and gain-bandwidth (GBW) are boosted by a simple current-mirror output stage. The full feedforward loop topology offers low integrators internal swing, supporting ultra-low-voltage operation. The entire modulator operates at 270 mV supply only, while the switches are driven by charge pump clock doubler. Designed in 65 nm CMOS and clocked at 256 kHz, the simulation results show that the converter achieves 64.4 dB signal-to-noise-ratio (SNR) and 61 dB signal-to-noise-and-distortionratio (SNDR) in 1 kHz bandwidth while consuming 0.85 "W power.

  • 333.
    Fazli Yeknami, Ali
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    A Variable Bandwidth Amplifier for a Dual-mode Low-Power ΔΣ Modulator in Cardiac Pacemaker System2013In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2013, p. 1918-1921Conference paper (Refereed)
    Abstract [en]

    This paper presents the design and implementation of a variable bandwidth amplifier intended for ultra-low-power biomedical implants in 65nm CMOS, providing tunable gain-bandwidth in three modes: 0.9 MHz, 1.7 MHz, and 2.3 MHz with consistent 56 dB DC gain. The amplifier consumes 180nW static power in the lowest bandwidth mode, and consumes 315 nW static power in the full bandwidth mode with an 8 pF load from a 0.9-V supply voltage. To illustrate the concept, the presented programmable bandwidth amplifier is applied in a dual-mode ΔΣ modulator aiming for sensing/measuring stage of a cardiac pacemaker.

  • 334.
    Fazli Yeknami, Ali
    et al.
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Qazi, Fahad
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Alvandpour, Atila
    Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
    Low-Power DT ΔΣ Modulators Using SC Passive Filters in 65nm CMOS2014In: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, ISSN 1549-8328, E-ISSN 1558-0806, Vol. 61, no 2, p. 358-370Article in journal (Refereed)
    Abstract [en]

    A comparative design study of ultra-low-power discrete-time ΔΣ modulators (ΔΣ Ms) suited for medical implant devices is presented. Aiming to reduce the analog power consumption, the objective is to investigate the effectiveness of the switched-capacitor passive Þlter. Two design variants of 2nd-order ΔΣ are analyzed and compared to a power-optimized standard active modulator ΔΣΜΑΑ. The first variant ΔΣΜΑP employs an active filer in the 1st stage and a passive filter in the less critical 2nd stage. The second variant (OTA-less ΔΣΜpp) makes use of passive Þlters in both stages. For practical verfication, all three modulators are implemented on a single chip in 65 nm CMOS technology. Designed for 500-Hz signal bandwidth, the ΔΣΜΑΑ, ΔΣΜΑP and ΔΣΜpp achieve 76 dB, 70 dB and 67 dB peak SNDR, while consuming 2.1 μW, 1.27 μW, and 0.92 μW, respectively, from a 0.9 V supply. Furthermore, the ΔΣΜpp can operate at a supply voltage reduced to 0.7 V, achieving a 65 dB SNDR at 430 nW power and 0.296 pJ/step.

  • 335.
    Felekidis, Nikolaos
    et al.
    Linköping University, Department of Physics, Chemistry and Biology, Complex Materials and Devices. Linköping University, Faculty of Science & Engineering.
    Melianas, Armantas
    Stanford Univ, CA 94305 USA.
    Kemerink, Martijn
    Linköping University, Department of Physics, Chemistry and Biology, Complex Materials and Devices. Linköping University, Faculty of Science & Engineering.
    Automated open-source software for charge transport analysis in single-carrier organic semiconductor diodes2018In: Organic electronics, ISSN 1566-1199, E-ISSN 1878-5530, Vol. 61, p. 318-328Article, review/survey (Refereed)
    Abstract [en]

    Organic electronics is an emerging technology with numerous applications in which the active layer is composed of an organic semiconductor (OSC) or blends of multiple OSC. One of the key performance parameters for such devices is the charge carrier mobility which can be evaluated by different measurement techniques. Here, we review different formalisms for extraction and analysis of hole mobilities from temperature-dependent space-charge limited conductivity (SCLC) measurements for pristine OSC as well as for binary and ternary blends as used in e.g. photovoltaic applications. The model is also applicable to n-type materials. Possible sources of measurement errors, such as the presence of traps and series resistance, are discussed. We show that by a simple method of selecting a proper experimental data range these errors can be avoided. The Murgatroyd-Gill analytical model in combination with the Gaussian Disorder Model is used to extract zero-field hole mobilities as well as estimates of the Gaussian energetic disorder in the HOMO level from experimental data. The resulting mobilities are in excellent agreement with those found from more elaborate fits to a full drift-diffusion model that includes a temperature, field and density dependent charge carrier mobility; the same holds for the Gaussian disorder of pure materials and blends with low fullerene concentration. The zero-field mobilities are also analyzed according to an Arrhenius model that was previously argued to reveal a universal mobility law; for most -but not all- material systems in the present work this framework gave an equally good fit to the experimental data as the other models. An automated fitting freeware, incorporating the different models, is made openly available for download and minimizes error, user input and SCLC data analysis time; e.g. SCLC current-voltage curves at several different temperatures can be globally fitted in a few seconds.

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  • 336.
    Ferdeen, Mats
    Linköping University, Department of Electrical Engineering, Computer Engineering.
    Reducing Energy Consumption Through Image Compression2016Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The energy consumption to make the off-chip memory writing and readings are aknown problem. In the image processing field structure from motion simpler compressiontechniques could be used to save energy. A balance between the detected features suchas corners, edges, etc., and the degree of compression becomes a big issue to investigate.In this thesis a deeper study of this balance are performed. A number of more advancedcompression algorithms for processing of still images such as JPEG is used for comparisonwith a selected number of simpler compression algorithms. The simpler algorithms canbe divided into two categories: individual block-wise compression of each image andcompression with respect to all pixels in each image. In this study the image sequences arein grayscale and provided from an earlier study about rolling shutters. Synthetic data setsfrom a further study about optical flow is also included to see how reliable the other datasets are.

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  • 337.
    Ferreira, Joao Dias
    et al.
    Kungliga Tekniska Högskolan, Stockholm, Sweden.
    Ribeiro, Luis
    Linköping University, Department of Management and Engineering, Manufacturing Engineering. Linköping University, The Institute of Technology.
    Akillioglu, Hakan
    Kungliga Tekniska Högskolan, Stockholm, Sweden.
    Neves, Pedro
    Kungliga Tekniska Högskolan, Stockholm, Sweden.
    Maffei, Antonio
    Kungliga Tekniska Högskolan, Stockholm, Sweden.
    Characterization of an Agile Bio-inspired Shop-Floor2014In: Proceedings2014 12th IEEE International Conference on Industrial Informatics (INDIN), Porto Alegre, RS, Brazil 27-30 July, 2014, IEEE conference proceedings, 2014, p. 404-410Conference paper (Refereed)
    Abstract [en]

    Sustainability is currently one of the biggest challenges and driver of manufacturing industry. Nevertheless, with the decrease of product life cycles, the consumption of raw materials as well as the obsolescence of production systems increases. In this sense, agile shop-floors that enact companies with the ability to quickly reconfigure their shop-floors by deploying or removing modules are the key for sustainable industrial development. This paper attempts to characterize an innovative approach that relies on bio-inspired concepts as the main control mechanism, in order to foster sustainability by attaining the necessary shop-flooragility. Furthermore an experimental setup is presented and the results are analysed, in order to understand the influence and impact of the main properties that characterize the approach towards the system performance.

  • 338.
    Ferreira, João Dias
    et al.
    Kungliga Tekniska Högskolan, Stockholm, Sweden .
    Ribeiro, Luis
    Universidade Nova de Lisboa, Monte da Caparica, Portugal .
    Onori, Mauro
    Kungliga Tekniska Högskolan, Stockholm, Sweden.
    Barata, Jose
    Universidade Nova de Lisboa, Monte da Caparica, Portugal.
    Challenges and Properties for Bio-inspiration in Manufacturing2014In: Technological Innovation for Collective Awareness Systems: 5th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2014, Costa de Caparica, Portugal, April 7-9, 2014. Proceedings / [ed] Luis M. Camarinha-Matos, Nuno S. Barrento, Ricardo Mendonça, Springer Berlin/Heidelberg, 2014, Vol. 423, p. 139-148Chapter in book (Refereed)
    Abstract [en]

    The increasing market fluctuations and customized products demandhave dramatically changed the focus of industry towards organizationalsustainability and supply chain agility. Such critical changes inevitably have adirect impact on the shop-floor operational requirements. In this sense, anumber of innovative production paradigms emerged, providing the necessarytheoretical background to such systems. Due to similarities between innovativemodular production floors and natural complex systems, modern paradigmstheoretically rely on bio-inspired concepts to attain the characteristics ofbiological systems. Nevertheless, during the implementation phase, bio-inspiredprinciples tend to be left behind in favor of more traditional approaches,resulting in simple distributed systems with considerable limitations regardingscalability, reconfigurable ability and distributed problem resolution.This paper analyzes and presents a brief critical review on how bio-inspiredconcepts are currently being explored in the manufacturing environment, in anattempt to formulate a number of challenges and properties that need to beconsidered in order to implement manufacturing systems that closely follow thebiological principles and consequently present overall characteristics ofcomplex natural systems.

  • 339.
    Florentin, M.
    et al.
    IMB CNM CSIC C Tillers, Spain.
    Cabello, M.
    IMB CNM CSIC C Tillers, Spain.
    Rebollo, J.
    IMB CNM CSIC C Tillers, Spain.
    Montserrat, J.
    IMB CNM CSIC C Tillers, Spain.
    Brosselard, P.
    CALY Technology, France.
    Henry, Anne
    Linköping University, Department of Physics, Chemistry and Biology, Thin Film Physics. Linköping University, Faculty of Science & Engineering.
    Godignon, P.
    IMB CNM CSIC C Tillers, Spain.
    Al-implanted on-axis 4H-SiC MOSFETs2017In: Semiconductor Science and Technology, ISSN 0268-1242, E-ISSN 1361-6641, Vol. 32, no 3, article id 035006Article in journal (Refereed)
    Abstract [en]

    In this paper, the impact of temperature and time stress on gate oxide stability of several multi-implanted and epitaxied 4H-SiC nMOSFET is presented. The oxide layer was processed under a rapid thermal process (RTP) furnace. The variation of the main electrical parameters is shown. We report the high quality and stability of such implanted MOSFETs, and point out the very low roughness effect of the on-axis-cut sample. Particularly, in the best case, effective channel mobility (mu(fe)) overcomes 20 cm(2). V-1. s(-1) at 300 degrees C for a channel length of 12 mu m, which is very encouraging for implantation technology. Starting from 200 degrees C, the apparent increase of the mu(fe) peak of the MOSFET ceases and tends to saturate with further temperature increase. This is an indication of the potential of MOSFETs built on on-axis substrates. Thus, starting from the real case of an implanted MOSFET, the global purpose is to show that the electrical performance of such an on-axis-built device can tend to reach that of the ideal case, i.e. epitaxied MOSFET, and even overcome its electrical limitation, e.g. in terms of threshold voltage stability at high temperature.

  • 340.
    Florén, Johan
    et al.
    Linköping University, Department of Electrical Engineering.
    Lindberg, Daniel
    Linköping University, Department of Electrical Engineering.
    Bluetooth Communication For Remote Controlling Purpose2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    The concept of remote controlling electrical devices is not new; people of today are used to being able to control their household electronic items without making an effort to walk up to the device.

    In this thesis the aim is to use Bluetooth radio signals instead of the traditional infrared light to achieve the remote control functions. As a test application a Sony Compact Disc player is modified in order to be radio controlled with a standard Ericsson T39 mobile phone used as a remote. Since the test application is rather simple without any special requirements the development of a specific radio communication system has not been considered. Instead available pre-manufactured devices were examined. A Bluetooth evaluation kit was purchased and the test project consisted of the goal of linking the evaluation board to the CD player with an AVR microcontroller and getting the whole system to communicate with the mobile phone.

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  • 341.
    Fogdegård, Karl
    et al.
    Linköping University, Department of Science and Technology.
    Franzén, Johan
    Linköping University, Department of Science and Technology.
    Implementering av Constant Fraction Detection vid avståndsmätning2004Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    This thesis is performed at Saab Bofors Dynamics in Karlskoga and investigates a technique for ranging with laser pulses. The investigated technique is called Constant Fraction Detection (CFD). Described briefly, the received laser pulse is split into two equal parts, where one part is delayed half the pulse width and inverted. This signal is added to the original pulse. The resulting curve has the shape of a laying S and the detection of the zero level is used to stop the time measurement. The time measurement will be independent of the incoming signal’s amplitude. The CFD technique has the advantage of collecting accurate data for each send pulse, which results in an ability to collect values of measurement with a high frequency. The theses investigates a measurement frequency of 10 kHz that will give an opportunity to implement a scanning function with the possibility to, for example, reproduce a ground structure from a flying object.

    The theses include both digital and analog electronics, which makes it a complex design task. The detector was constructed using analog circuits, from the signal processing of the incoming reflected pulse to the generation of a voltage level as a representation of the distance. The analog part is controlled by digital signals generated by a FPGA, which also performs calculations to convert the voltage level into a distance displayed on a LCD.

    A large part of the work was dedicated to designing a layout and constructing a surface mounted printed circuit board (PCB) and therefor the report treats the whole development process, from technical requirement to construction and verification of a prototype.

    The conclusion states that the CFD technique is a suitable technique for ranging with demands on fast collection of data. The prototype has sufficient accuracy at constant amplitude and was at the time of presentation shown as a prototype for demonstration. The independence of amplitude on the incoming signal was never accomplished and the reason for this is stated in the report. However, further development should solve the problem.

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  • 342.
    Forsgren, Gustav
    Linköping University, Department of Electrical Engineering, Information Coding. Linköping University, The Institute of Technology.
    Multiple Synchronized Video Streams on IP Network2014Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Video surveillance today can look very different depending on the objective and on the location where it is used. Some applications need a high image resolution and frame rate to carefully analyze the vision of a camera, while other applications could use a poorer resolution and a lower frame rate to achieve it's goals. The communication between a camera and an observer depends much on the distance between them and on the contents. If the observer is far away the information will reach the observer with delay, and if the medium carrying the information is unreliable the observer has to have this in mind. Lost information might not be acceptable for some applications, and some applications might not need it's information instantly.

    In this master thesis, IP network communication for an automatic tolling station has been simulated where several video streams from different sources have to be synchronized. The quality of the images and the frame rate are both very important in these types of surveillance, where simultaneously exposed images are processed together.

    The report includes short descriptions of some networking protocols, and descriptions of two implementations based on the protocols. The implementations were done in C++ using the basic socket API to evaluate the network communication. Two communication methods were used in the implementations, where the idea was to push or to poll images. To simulate the tolling station and create a network with several nodes a number of Raspberry Pis were used to execute the implementations. The report also includes a discussion about how and which video/image compression algorithms the system might benefit of.

    The results of the network communication evaluation shows that the communication should be done using a pushing implementation rather than a polling implementation. A polling method is needed when the transportation medium is unreliable, but the network components were able to handle the amount of simultaneous sent information very well without control logic in the application.

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  • 343.
    Forsgren, Niklas
    Linköping University, Department of Electrical Engineering.
    Sampling Ocsilloscope On-Chip2003Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Signal-integrity degradation from such factors as supply and substrate noise and cross talk between interconnects restricts the performance advances in Very Large Scale Integration (VLSI). To avoid this and to keep the signal-integrity, accurate measurements of the on-chip signal must be performed to get an insight in how the physical phenomenon affects the signals.

    High-speed digital signals can be taken off chip, through buffers that add delay. Propagating a signal through buffers restores the signal, which can be good if only information is wanted. But if the waveform is of importance, or if an analog signal should be measured the restoration is unwanted. Analog buffers can be used but they are limited to some hundred MHz. Even if the high-speed signal is taken off chip, the bandwidth of on-chip signals is getting very high, making the use of an external oscilloscope impossible for reliable measurement. Therefore other alternatives must be used.

    In this work, an on-chip measuring circuit is designed, which makes use of the principle of a sampling oscilloscope. Only one sample is taken each period, resulting in an output frequency much lower than the input frequency. A slower signal is easier to take off-chip and it can easily be processed with an ordinary oscilloscope.

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  • 344.
    Fougstedt, Christoffer
    et al.
    Chalmers Univ Technol, Sweden.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
    Bae, Cheolyong
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
    Borjeson, Erik
    Chalmers Univ Technol, Sweden.
    Larsson-Edefors, Per
    Chalmers Univ Technol, Sweden.
    ASIC Design Exploration for DSP and FEC of 400-Gbitis Coherent Data-Center Interconnect Receivers2020In: 2020 OPTICAL FIBER COMMUNICATIONS CONFERENCE AND EXPOSITION (OFC), IEEE , 2020Conference paper (Refereed)
    Abstract [en]

    We perform exploratory ASIC design of key DSP and FEC units for 400-Gbit/s coherent data-center interconnect receivers. In 22-nm CMOS, the considered units together dissipate 5 W, suggesting implementation feasibility in power-constrained form factors. (C) 2020 The Authors

  • 345.
    Fougstedt, Christoffer
    et al.
    Chalmers University of Technology, Gothenburg, Sweden.
    Gustafsson, Oscar
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
    Bae, Cheolyong
    Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
    Börjesson, Erik
    Chalmers University of Technology, Gothenburg, Sweden.
    Larsson-Edefors, Per
    Chalmers University of Technology, Gothenburg, Sweden.
    ASIC Design Exploration for DSP and FEC of 400-Gbit/s Coherent Data-Center Interconnect Receivers2020Conference paper (Refereed)
    Abstract [en]

    We perform exploratory ASIC design of key DSP and FEC units for 400-Gbit/s coherent data-center interconnect receivers. In 22-nm CMOS, the considered units together dissipate 5 W, suggesting implementation feasibility in power-constrained form factors.

  • 346.
    Fowler, Scott
    et al.
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Shahidullah, Ahmed Omar
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Osman, Mohammed
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Karlsson, Johan M.
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Yuan, Di
    Linköping University, Department of Science and Technology, Communications and Transport Systems. Linköping University, The Institute of Technology.
    Analytical evaluation of extended DRX with additional active cycles for light traffic2015In: The International Journal of Computer Networks (COMNET), Elsevier, ISSN 1389-1286, Vol. 77, p. 90-102Article in journal (Refereed)
    Abstract [en]

    Abstract LTE and LTE-Advanced mobile technologies have integrated discontinuous reception (DRX) power saving method to optimize the power consumption at the user equipment (UE). The DRX method was proposed by the 3rd Generation Partnership Project (3GPP), and since then, the traffic behavior has been analyzed in several studies with a standard 3-state DRX model to describe the trade-off between power saving and delay. In this paper, we presented a novel 4-state and 5-state 3GPP LTE DRX mechanisms. The proposed mechanisms were developed by augmenting (an) active state(s) to deep and/or light sleep cycle of standard 3-state DRX for handling a small burst of packets, thereby bypassing the process of returning to the timer-dependent active mode. We have generated analytical models using a semi-Markov process for bursty packet data traffic and evaluated these augmented DRX mechanisms against a standard 3-state DRX method. Overall, the analytical results from varying timing parameters showed that our augmented DRX (both 4-state and 5-state) improved power saving factor (ranging between 1% and 8%) and reduced delay (ranging between 20% and 60%) compared to the standard 3-state DRX. Furthermore, the magnitude of improvement for both delay and power-saving was somewhat greater in 5-state than 4-state.

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  • 347.
    Frankel, Mark S
    et al.
    American Association for the Advancement of Science, U.S.A. .
    Elliott, Roger
    International Council for Science, UK .
    Blume, Martin
    American Physical Society, U.S.A. .
    Bourgois, Jean-Manuel
    Magnard/Vuibert Publishers, France .
    Hugenholtz, Bernt
    University of Amsterdam, The Netherlands .
    Lindquist, Mats G.
    Lund University Library, Sweden .
    Morris, Sally
    ciation of Learned & Professional Society Publishers, U.K. .
    Sandewall, Erik
    Linköping University, Department of Computer and Information Science, CASL - Cognitive Autonomous Systems Laboratory. Linköping University, The Institute of Technology.
    Defining and Certifying Electronic Publication in Science2000In: Learned Publishing, ISSN 0953-1513, E-ISSN 1741-4857, Vol. 13, no 4, p. 251-258Article in journal (Refereed)
  • 348.
    Fransson, Daniel
    Linköping University, Department of Electrical Engineering.
    Lågoffsetkomparator2002Independent thesis Basic level (professional degree)Student thesis
    Abstract [en]

    Detecting small signals with a comparator demands that the total voltage offset is lower than the actual signal. The total offset includes the voltage offset in the comparator and the voltage offset that is created by the offset currents that flows thru the load at the comparators input. The goal with this comparator that has been developed has been that it will have a total voltage offset at maximum 500 uV. The comparator does not need to be extremely fast or does not need to operate in a big frequency area. To have all the flexibility that is needed a full custom technique is used. When the mismatch is most unfavourable the total offset is 209.24 uV which is within the goal.

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  • 349.
    Franzen, Johan
    et al.
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Schweidenbach, Simon
    Linköping University, Department of Science and Technology, Physics and Electronics. Linköping University, The Institute of Technology.
    Further development of work samples for pump control2013Independent thesis Basic level (professional degree), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    IKG Östra Sverige AB var i behov av ett arbetsprov som nyanställda ska genom gå när de söker anställning hos IKG. Anställningsprovet togs fram för att testa de nyanställdas kunskaper i elteknik och styrteknik. Anställningsprovet gick ut på att nivåreglera en tank utifrån en funktionslista.

    Uppgiften med detta examensarbete är att vidareutveckla ett anställningsprov så att anställningsprovet kan sätta i bruk. I vidareutvecklingen ingår det att ta fram underlag till arbetsprovet, underlaget som ska tas fram består av arbetsritningar, apparatlista, kabellista och I/O-lista.

    Till IKG Östra Sverige AB togs det fram flera förslag på komponenter och utifrån komponenterna som valdes gjordes det arbetsritningar och en apparatlista. Arbetsritningarna utfördes i en äldre version av Elmaster design som är ett elritningsprogram. Kabelmärkning gjordes för att kunna följa upp ritningarna och en kabellista gjordes för att underlätta installationen. En I/O-lista arbetades fram för att få reda på hur inoch utgångar påverkade styrprocessen i tanken.

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  • 350.
    Fredriksson, Axel
    Linköping University, Department of Electrical Engineering, Integrated Circuits and Systems.
    Konstruktion av en solcellssimulator2017Independent thesis Basic level (degree of Bachelor), 10,5 credits / 16 HE creditsStudent thesis
    Abstract [sv]

    I denna rapport så genomförs en konstruktion av en solpanelkrets. Denna krets kommer att användas i utbildningssyfte så en användare kan skaffa sig en förståelse för hur en solpanel fungerar. Solpanelkretsen seriekopplas för att efterlikna riktiga solpaneler. På kretsen så kan en användare ställa in önskad skuggning som motsvarar olika väderförhållanden som en riktig solpanel kan befinna sig i, samt se hur skugga påverkar en solpanel och seriekopplade solpaneler. Kretsen styrs sedan med någon heter MPPT för att utvinna maximal effekt under alla väderförhållanden som en solpanel kan befinna sig i.

    I rapporten så presenteras först väsentlig solteori för att ge upphov till en ökad förståelse för hur solpaneler fungerar. Rapporten bygger mycket på att jämföra simulerade grafer från kretssimuleringsprogrammet Multisim med den fysiska byggda kretsen. Grafer från en solpanel och seriekopplade solpaneler med och utan bypass dioder presenteras. Mätningar från MPPT-styrningen genomförs för att visa vilken maximal effekt som utvanns från den fysiska byggda kretsen. Alla mätningar som genomförts finns i ett resultatkapitel och till sist så diskuteras resultatet och förslag på vidareutvecklingar.

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    Konstruktion av en solcellssimulator
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